CN103930981B - 半导体模块 - Google Patents

半导体模块 Download PDF

Info

Publication number
CN103930981B
CN103930981B CN201380003694.8A CN201380003694A CN103930981B CN 103930981 B CN103930981 B CN 103930981B CN 201380003694 A CN201380003694 A CN 201380003694A CN 103930981 B CN103930981 B CN 103930981B
Authority
CN
China
Prior art keywords
board connector
metallic board
bare chip
source electrode
flat part
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201380003694.8A
Other languages
English (en)
Other versions
CN103930981A (zh
Inventor
须永崇
金子昇
三好修
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NSK Ltd
Original Assignee
NSK Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NSK Ltd filed Critical NSK Ltd
Publication of CN103930981A publication Critical patent/CN103930981A/zh
Application granted granted Critical
Publication of CN103930981B publication Critical patent/CN103930981B/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K7/00—Constructional details common to different types of electric apparatus
    • H05K7/02—Arrangements of circuit components or wiring on supporting structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/35—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L24/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L24/41—Structure, shape, material or disposition of the strap connectors after the connecting process of a plurality of strap connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
    • H01L24/92—Specific sequence of method steps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199—Material of the matrix
    • H01L2224/29294—Material of the matrix with a principal constituent of the material being a liquid not provided for in groups H01L2224/292 - H01L2224/29291
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/32227—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the layer connector connecting to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/32238—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the layer connector connecting to a bonding area protruding from the surface of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
    • H01L2224/331—Disposition
    • H01L2224/3318—Disposition being disposed on at least two different sides of the body, e.g. dual array
    • H01L2224/33181—On opposite sides of the body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/35—Manufacturing methods
    • H01L2224/352—Mechanical processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/35—Manufacturing methods
    • H01L2224/358—Post-treatment of the connector
    • H01L2224/3583—Reworking
    • H01L2224/35847—Reworking with a mechanical process, e.g. with flattening of the connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L2224/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H01L2224/37001—Core members of the connector
    • H01L2224/3701—Shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L2224/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H01L2224/37001—Core members of the connector
    • H01L2224/3701—Shape
    • H01L2224/37012—Cross-sectional shape
    • H01L2224/37013—Cross-sectional shape being non uniform along the connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L2224/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H01L2224/37001—Core members of the connector
    • H01L2224/37099—Material
    • H01L2224/371—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/37117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/37124—Aluminium [Al] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L2224/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H01L2224/37001—Core members of the connector
    • H01L2224/37099—Material
    • H01L2224/371—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/37138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/37139—Silver [Ag] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L2224/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H01L2224/37001—Core members of the connector
    • H01L2224/37099—Material
    • H01L2224/371—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/37138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/37144—Gold [Au] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L2224/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H01L2224/37001—Core members of the connector
    • H01L2224/37099—Material
    • H01L2224/371—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/37138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/37147—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/4005—Shape
    • H01L2224/4009—Loop shape
    • H01L2224/40095—Kinked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401—Disposition
    • H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/40225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/40227—Connecting the strap to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/404—Connecting portions
    • H01L2224/40475—Connecting portions connected to auxiliary connecting means on the bonding areas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/404—Connecting portions
    • H01L2224/40475—Connecting portions connected to auxiliary connecting means on the bonding areas
    • H01L2224/40499—Material of the auxiliary connecting means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/41—Structure, shape, material or disposition of the strap connectors after the connecting process of a plurality of strap connectors
    • H01L2224/4101—Structure
    • H01L2224/4103—Connectors having different sizes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/41—Structure, shape, material or disposition of the strap connectors after the connecting process of a plurality of strap connectors
    • H01L2224/411—Disposition
    • H01L2224/4112—Layout
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73263—Layer and strap connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/77—Apparatus for connecting with strap connectors
    • H01L2224/7725—Means for applying energy, e.g. heating means
    • H01L2224/77272—Oven
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83191—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/832—Applying energy for connecting
    • H01L2224/8321—Applying energy for connecting using a reflow oven
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399—Material
    • H01L2224/834—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83417—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/83424—Aluminium [Al] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399—Material
    • H01L2224/834—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/83447—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/83801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/83801—Soldering or alloying
    • H01L2224/83815—Reflow soldering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/8438—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/84399—Material
    • H01L2224/844—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/84417—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/84424—Aluminium [Al] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/8438—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/84399—Material
    • H01L2224/844—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/84438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/84447—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/848—Bonding techniques
    • H01L2224/84801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/848—Bonding techniques
    • H01L2224/84801—Soldering or alloying
    • H01L2224/84815—Reflow soldering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9221—Parallel connecting processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/142—Metallic substrates having insulating layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L24/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H01L2924/13055—Insulated gate bipolar transistor [IGBT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007—Types of components
    • H05K2201/10166—Transistor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
    • H05K2201/1031—Surface mounted metallic connector elements
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
    • H05K2201/10409—Screws
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Abstract

提供了一种在实现缩短制造节拍和降低制造成本的同时能够提高组装性的半导体模块。半导体模块(30)具备：金属制的基板(31)；形成于基板(31)之上的绝缘层(32)；形成于绝缘层(32)上的多个布线图案(33a～33d)；通过焊锡(34a)封装于布线图案(33a)上的晶体管裸芯片(35)；以及通过焊锡(34b、34c)使晶体管裸芯片(35)的电极(S、G)上和布线图案(33b、33c)上接合的金属板连接器(36a、36b)。金属板连接器(36a、36b)是桥形，在部件中央部具有平整面和重心。

Description

半导体模块
技术领域
本发明涉及一种组装于汽车用电气设备的功率模块等半导体模块。
背景技术
近来，在汽车等车辆中的各种电气设备的控制中逐渐引入了电子装置。作为组装有电子装置的电气设备的一例，在电动助力转向装置中，在容纳与汽车的转向相关的电动马达的壳体内设置有马达驱动部，将电子装置搭载于该马达驱动部。该电子装置作为功率模块组装于马达驱动部。
功率模块由作为适于电动助力转向装置那样的以比较大的电流驱动的电气设备的控制、例如搭载了FET(FieldEffectTransistor)、IGBT(InsulatedGateBipolarTransistor)等功率元件的所谓的半导体模块而构成。这种功率模块由于搭载于车辆而也被称作车载模块(In-vehicleModule)。
以往，作为这种半导体模块，例如，存在专利文献1中记载的技术。该技术中，对用于将金属基板上的布线图案和晶体管裸芯片接合的电气布线使用了金属线。
另外，例如如专利文献2中记载的技术那样，也有对封装于金属基板上的半导体元件的电连接使用引线部件，还有用焊锡封装的。在此，对于半导体元件和基板之间的高度差异，通过使引线部件倾斜来进行接合。
并且，例如如专利文献3中记载的技术那样，为了缓和连接器布线的应力，而设置上升弯曲部，也有在布线中途设置保险丝形状(波形)。
现有技术文献
专利文献
专利文献1：JP2004-335725A
专利文献2：JP2007-95984A
专利文献3：JP2000-124398A
发明内容
发明要解决的问题
但是，对于上述专利文献1中记载的技术，由于采用了使用金属线的电气布线，所以需要利用引线接合装置来封装该电气布线。即，需要通过与其他电子部件的焊锡封装不同的制造工序进行引线接合，制造节拍变长。另外，由于需要引线接合的专用设备，所以制造成本变高。
另外，对于上述专利文献2中记载的技术，由于引线部件从半导体元件端向基板端倾斜，所以组装时(配置引线部件时)对引线部件进行吸附滞留的位置成为在引线部件的端部形成的平整部的一方。因此，可能会导致部件吸附时重量平衡较差，部件配置时位置偏移。
并且，对于上述专利文献3中记载的技术，由于在布线中途设置了保险丝形状，所以组装时能够吸附部件的位置成为在端部形成的平整面。因此，即使在这种情况下，也有可能导致部件吸附滞留时的重量平衡较差，部件配置时的位置偏差。
因此，本发明的课题为，提供实现缩短制造节拍和降低制造成本的同时能够提高组装性的半导体模块。
用于解决问题的方案
为了解决上述课题，本发明的半导体模块的一方式如以下所示。即，本发明的半导体模块的一方式，其特征在于，具备：金属制的基板；形成于该基板之上的绝缘层；形成于该绝缘层上的多个布线图案；通过焊锡封装于该多个布线图案中的一个布线图案上的晶体管裸芯片；以及用于通过焊锡使形成于该晶体管裸芯片的上表面的电极上和所述多个布线图案中的其他布线图案上接合的、由金属板构成的金属板连接器。所述金属板连接器是具有水平的平板部、以从该平板部的宽度方向一端朝下延伸的方式弯折并与所述电极接合的第一支脚部、和以从所述平板部的宽度方向另一端朝下延伸的方式弯折并与所述其他布线图案接合的第二支脚部的形状。并且，所述金属板连接器利用铜(Cu)、银(Ag)、金(Au)、铜合金及铝合金导体中的任意一种材料形成。此外，形成为在与基板水平的至少一个方向具有弹性的形状。
即，所述金属板连接器的热膨胀系数及热收缩系数与所述基板和绝缘层不同，由此，成为能够至少在一个方向上弹性地吸收在加热时或冷却时产生的金属板连接器接合部的相对位移的形状。此外，其特征在于，在所述第一支脚部和所述第二支脚部之间具有能够在组装时吸附滞留所述金属板连接器的平整面。
这样，作为晶体管裸芯片的电极和基板上的布线图案之间的接合部件，是使用由金属板构成的金属板连接器的方式，所以能够利用焊锡封装进行它们的接合。即，可以通过相同的设备进而是相同的工艺同时进行晶体管裸芯片的电极和基板上的布线图案之间的接合，以及将晶体管裸芯片或其他基板封装部件封装于基板上的布线图案上时进行的焊锡封装作业。因此，可以缩短半导体模块的制造节拍，并且不再需要引线接合的专用设备，可降低半导体模块的制造成本。
并且，通过将金属板连接器设为桥形，即使利用焊锡将所述支脚部与布线图案接合，支脚部间的相对位置变位的弹性吸收也成为更优选的方式。即，能够利用由于焊锡封装作业中包含的回流工序时的加热或半导体模块的工作热而产生的基板及金属板连接器的热收缩或热膨胀很好地缓和接合部产生的应力，确保接合部的可靠性。另外，通过将金属板连接器的形状设为利用平板部将第一支脚部和第二支脚部之间连接而成的桥形，从而可以使金属板连接器的重心位置为平板部的平整面的部分。因此，在进行组装时的部件吸附时包含金属板连接器的重心位置在内的吸引吸附滞留变得容易。通过对包含金属板连接器在内的重心位置进行吸附滞留，从而提高了吸附滞留的稳定性，所以提高了所谓的转移时的稳定性，可以确保部件配置位置的精度。
另外，在上述半导体模块中，也可以是，所述第一支脚部的一端通过第一弯曲部与所述平板部的宽度方向一端连接，并且在所述第一支脚部的另一端，通过第二弯曲部以在所述平板部的宽度方向向外突出的方式，连接有通过焊锡与所述电极上接合的接合面，所述第二支脚部的一端通过第三弯曲部与所述平板部的宽度方向另一端连接，并且在所述第二支脚部的另一端，通过第四弯曲部以在所述平板部的宽度方向向外突出的方式，连接有通过焊锡与所述布线图案上接合的接合面。
这样，通过设置四个弯曲部，可以将金属板连接器的平板部设为从基板分开的顶面，并且将该部分适当地设为平整面。另外，通过将金属板连接器设为也兼具桥形的截面帽子型的形状，可以成为更适于通过压制成形来制造的部件。即，可以抑制冲压加工中的回弹，可以提高部件精度。
进而，在上述半导体模块中，所述第一弯曲部、所述第二弯曲部、所述第三弯曲部及所述第四弯曲部的角度也可以分别是钝角。
这样，通过将四个弯曲部的角度设为钝角，可以改善压制成形时的脱模性，有助于降低制造成本。
发明效果
在本发明的半导体模块中，作为晶体管裸芯片的电极和基板的布线图案之间的接合部件，是使用由金属板构成的金属板连接器的方式，所以能够利用焊锡封装作业进行它们的接合。即，可以通过相同的设备进而是相同的工艺同时进行晶体管裸芯片的电极和基板的布线图案之间的接合，以及将晶体管裸芯片或其他基板封装部件封装于基板上的布线图案上时进行的焊锡封装作业。因此，可以缩短半导体模块的制造节拍，并且不再需要引线接合的专用设备，可以降低半导体模块的制造成本。
另外，由于将金属板连接器设为桥形，所以能够吸收上下左右方向的位移，能够利用由于焊锡封装作业中包含的回流工序时的加热或半导体模块的工作热而产生的基板及金属板连接器的热收缩或热膨胀来缓和接合部产生的应力，确保接合部的可靠性。进而，由于可以将重心设置在金属板连接器的平整面，所以通过在组装时的部件吸附时吸附金属板连接器的重心位置，能够均衡地吸附滞留部件。由此，可以提高转移时的稳定性，提高组装配置位置精度。
附图简要说明
图1是表示使用本发明的半导体模块的电动助力转向装置的基本结构的图。
图2是表示控制器的控制系统的方框图。
图3是包含半导体模块的控制器的分解立体图。
图4是半导体模块的俯视图。
图5是FET裸芯片的概略俯视图。
图6是用于说明FET裸芯片的电极和基板上的布线图案之间的接合状态的示意图。
图7是表示金属板连接器的形状的立体图。
图8是表示金属板连接器的形状的俯视图及主视图。
图9是表示金属板连接器的形状的另外例子的立体图。
图10是对半导体模块的制造方法进行说明的图。
具体实施方式
以下，基于附图对本发明的实施方式进行说明。
图1是表示使用了本发明的半导体模块的电动助力转向装置的基本结构的图。
在图1的电动助力转向装置中，方向盘1的柱轴2经减速齿轮3、万向接头4A及4B、齿轮齿条机构5与转向轮的拉杆6连结。在柱轴2上设置有对方向盘1的转向转矩进行检测的转矩传感器7，辅助方向盘1的转向力的电动马达8通过减速齿轮3与柱轴2连结。对控制电动助力转向装置的控制器10，在电池(未图示)供电的同时，经由点火钥匙(未图示)输入点火钥匙信号IGN(参照图2)。控制器10根据由转矩传感器7检测到的转向转矩TS和由车速传感器9检测到的车速V，进行助推(转向辅助)指令的转向辅助指令值的运算，根据算出的转向辅助指令值控制向电动马达8供给的电流。
控制器10主要由微型计算机构成，但若表示其控制装置的机构及构成，则如图2所示。
由转矩传感器7检测到的转向转矩Ts及由车速传感器9检测到的车速V输入到作为控制运算部的控制运算装置11，将由控制运算装置11算出的电流指令值输入到门极驱动电路12。将在门极驱动电路12中根据电流指令值等形成的门极驱动信号输入到由FET的桥结构所构成的马达驱动部13，马达驱动部13经由用于紧急停止的切断装置14驱动由三相无刷马达构成的电动马达8。由电流检测电路15来检测三相无刷马达的各相电流，将检测出的三相的马达电流ia～ic作为反馈电流输入到控制运算装置11。另外，三相无刷马达中安装有霍尔传感器等旋转传感器16，将来自旋转传感器16的旋转信号RT输入到转子位置检测电路17，将检测到的旋转位置θ输入到控制运算装置11。
另外，将来自点火钥匙的点火信号IGN输入到点火电压监控部18及电源电路部19，从电源电路部19输入电源电压Vdd到控制运算装置11的同时，向控制运算装置11输入用于装置停止的复位信号RS。而且，切断装置14由对两相进行切断的继电器触点141及142构成。
另外，若对马达驱动部13的电路构成进行说明，则串联连接的FETTr1及Tr2、FETTr3及Tr4、以及FETTr5及Tr6相对于电源线81串联连接。而且，相对于电源线81并联连接的FETTr1及Tr3、FETTr5及Tr2、以及FETTr4及Tr6与接地线82连接。由此，构成逆变器。在此，FETTr1及Tr2中，FETTr1的源电极S和FETTr2的漏电极D串联连接而构成三相马达的c相臂，在c相输出线91c输出电流。另外，FETTr3及Tr4，与FETTr3的源电极S和FETTr4的漏电极D串联连接而构成三相马达的a相臂，在a相输出线91a输出电流。进而，FETTr5及Tr6，与FETTr5的源电极S和FETTr6的漏电极D串联连接而构成三相马达的b相臂，在b相输出线91b输出电流。
图3是图1所示的电动助力转向装置的包含半导体模块的控制器10的分解立体图，控制器10具有外壳20、作为包含马达驱动部13的功率模块的半导体模块30、散热用薄板39、包含控制运算装置11及门极驱动电路12的控制电路基板40、电力及信号用连接器50、三相输出用连接器60和盖70。
在此，外壳20具有：形成为大致矩形状并用于放置半导体模块30的平板状的半导体模块载置部21；设置于半导体模块载置部21的长度方向端部并用于封装电力及信号用连接器50的电力及信号用连接器封装部22；以及设置于半导体模块载置部21的宽度方向端部并用于封装三相输出用连接器60的三相输出用连接器封装部23。
而且，在半导体模块载置部21形成有旋进用于安装半导体模块30的安装螺钉38的多个螺钉孔21a。另外，在半导体模块载置部21以及电力及信号用连接器封装部22垂直安装有用于安装控制电路基板40的多个安装柱子24，在各安装柱子24形成有旋进用于安装控制电路基板40的安装螺钉41的螺钉孔24a。进而，在三相输出用连接器封装部23形成有旋进用于安装三相输出用连接器60的安装螺钉61的多个螺钉孔23a。
另外，半导体模块30具有上述马达驱动部13的电路构成，如图4所示，在基板31上封装有6个FETTr1～Tr6、与电源线81连接的正极端子81a、及与接地线82连接的负极端子82a。另外，在基板31上封装有三相输出部90，该三相输出部90包括与a相输出线91a连接的a相输出端子92a、与b相输出线91b连接的b相输出端子92b以及与c相输出线91c连接的c相输出端子92c。另外，在基板31上封装有包括电容的其他基板封装部件37。并且，在半导体模块30的基板31上设置有用于安装半导体模块30的安装螺钉38进行插入的多个通孔31a。
在此，对在该半导体模块30中向基板31上封装6个FETTr1～Tr6进行说明。各FETTr1～Tr6由FET裸芯片(晶体管裸芯片)35构成，如图5所示，在FET裸芯片35上具备源电极S和栅电极G，另外，在FET裸芯片35的下表面具有未图示的漏电极。
如图6所示，半导体模块30具有金属制的基板31，在基板31之上形成有绝缘层32。基板31是由铝等金属制成。另外，在该绝缘层32上形成有多个布线图案33a～33d。各布线图案33a～33d由铜或铝等金属或包含该金属的合金构成。
而且，在多个布线图案33a～33d中的一个布线图案33a上通过焊锡34a封装有构成各FETTr1～Tr6的FET裸芯片35。在FET裸芯片35的下表面所形成的漏电极通过焊锡34a与布线图案33a接合。而且，利用源电极用金属板连接器36a分别通过焊锡34e、34b使FET裸芯片35的源电极S上和多个布线图案33a～33d中的其他布线图案33b上接合。源电极用金属板连接器36a是通过对金属板进行冲压及弯曲加工而形成的，具有：水平的平板部36aa；以从平板部36aa的宽度方向一端朝下延伸的方式弯折并延伸的通过焊锡34e与FET裸芯片35的源电极S接合的连接部36ab；以及以从平板部36aa的宽度方向另一端朝下延伸的方式弯折并延伸的通过焊锡34b与布线图案33b接合的连接部36ac。
另外，利用栅电极用金属板连接器36b分别通过焊锡34f、34c使FET裸芯片35的栅电极G上和多个布线图案33a～33d中的另外其他布线图案33c上接合。栅电极用金属板连接器36b是通过对金属板进行冲压及弯曲加工而形成的，具有：水平的平板部36ba；以从平板部36ba的宽度方向一端朝下延伸的方式弯折并延伸的通过焊锡34f与FET裸芯片35的栅电极G接合的连接部36bb；以及以从平板部36ba的宽度方向另一端朝下延伸的方式弯折并延伸的通过焊锡34c与布线图案33c接合的连接部36bc。
另外，在绝缘层32上所形成的多个布线图案33a～33d中的又另外其他的布线图案33d上通过焊锡34d封装有电容等其他基板封装部件37。
接着，对源电极用金属板连接器36a的形状进行说明。
如图7所示的立体图那样，源电极用金属板连接器36a由平板部36aa、连接部36ab(第一支脚部)和连接部36ac(第二支脚部)构成为桥形。更具体而言，源电极用金属板连接器36a在平板部36aa的左右方向(图7的X轴方向)一个端部通过第一弯曲部36ad连接了连接部36ab的一端，连接部36ab的另一端借助于第二弯曲部36ae形成有向外的接合面36af。该接合面36af的下表面通过焊锡34e与FET裸芯片35的源电极S接合。
另外，连接部36ab在接合面36af附近具有窄幅部36ag。窄幅部36ag为从第一弯曲部36ad向第二弯曲部36ae逐渐变窄的锥形。
在平板部36aa的左右方向另一端部通过第三弯曲部36ah连接了连接部36ac的一端，连接部36ac的另一端借助于第四弯曲部36ai形成有向外的接合面36aj。该接合面36aj的下表面通过焊锡34b与布线图案33b接合。
图8是表示源电极用金属板连接器36a的形状的图，(a)是俯视图，(b)是主视图。
如图8(a)所示，源电极用金属板连接器36a在平板部36aa的前后方向(图8(b)的上下方向)两端部设置压制成形时的顺序进给切割部36ak。该顺序进给切割部36ak以向平板部36aa的前后方向外侧突出的方式形成。另外，如图8(b)所示，源电极用金属板连接器36a具有四个弯曲部(36ad、36ae、36ah、36ai)，具有兼具桥形的截面帽子型的形状。在此，设各弯曲部的角度θ为钝角(例如95°)。
此外，对于源电极用金属板连接器36a的形状，如果是可以将源电极S和布线图案33b接合的桥形，则可以采用任意的形状。例如，如图9(A)所示，也可以设为未设置窄幅部36ag的形状。但是，在进行焊锡焊接时进行后述的回流接合，另外，由于半导体模块30工作时发热而成为高温，所以优选设为可以缓和热应力的形状。对于栅电极用金属板连接器36b也同样。
另外，在图7、图8、图9(A)中，对于源电极用金属板连接器36a的平板部36aa及栅电极用金属板连接器36b的平板部36ba，以重心(C)存在于平面(平整面)上的方式预先决定设计事项，由于在对所述源电极用金属板连接器36a、栅电极用金属板连接器36b进行吸引吸附时利用重心部进行，所以确保了转移时的稳定性。金属连接器36a、36b的位于平板部36aa、36ba的重心位置的吸附范围优选为2mm2左右的面积，更优选为2～5mm2左右的面积。
为了使得重心(C)位于源电极用金属板连接器36a的平板部36aa及栅电极用金属板连接器36b的平板部36ba的平面(平整面)上，例如如图9(B)所示那样，优选使平板部36aa(平板部36ba)的厚度比源电极用金属板连接器36a(栅电极用金属板连接器36b)的其他部分即连接部36ab(连接部36bb)、连接部36ac(连接部36bc)、接合面36af、接合面36aj的厚度大。不对平板部36aa(平板部36ba)的板厚的大小特别地进行限定，但是，例如，也可以设为源电极用金属板连接器36a(栅电极用金属板连接器36b)的其他部分即连接部36ab(连接部36bb)、连接部36ac(连接部36bc)、接合面36af、接合面36aj的板厚的大约3倍。
如图3所示，这样构成的半导体模块30通过多个安装螺钉38被安装于外壳20的半导体模块载置部21上。在半导体模块30的基板31形成有安装螺钉38进行插入的多个通孔31a。
此外，在将半导体模块30安装于半导体模块载置部21上时，将散热用薄板39安装于半导体模块载置部21上，从该散热用薄板39之上安装半导体模块30。利用该散热用薄板39，将半导体模块30产生的热量通过散热用薄板39向外壳20散热。
另外，控制电路基板40用于将多个电子器件封装于基板上而构成包含控制运算装置11及栅极驱动电路12的控制电路。在将半导体模块30安装于半导体模块载置部21上后，利用多个安装螺钉41在从半导体模块30的上方垂直安装于半导体模块载置部21以及电力及信号用连接器封装部22的多个安装柱子24上安装控制电路基板40。在控制电路基板40上形成有安装螺钉41进行插入的多个通孔40a。
另外，电力及信号用连接器50用于将来自电池(未图示)的直流电源输入到半导体模块30，将包含来自转矩传感器12和车速传感器9的信号的各种信号输入到控制电路基板40。利用多个安装螺钉51在设置于半导体模块载置部21的电力及信号用连接器封装部22安装电力及信号用连接器50。
而且，三相输出用连接器60用于输出来自a相输出端子92a、b相输出端子92b及c相输出端子92c的电流。利用多个安装螺钉61在设置于半导体模块载置部21的宽度方向端部的三相输出用连接器封装部23安装三相输出用连接器60。在三相输出连接器60形成有安装螺钉61进行插入的多个通孔60a。
并且，相对于安装有半导体模块30、控制电路基板40、电力及信号用连接器50及三相输出用连接器60的外壳20，以从控制电路基板40的上方覆盖该控制电路基板40的方式安装盖70。
接着，参照图10对半导体模块30的制造方法进行说明。
在制造半导体模块30时，首先，如图10(a)所示那样，在金属制的基板31的一方的主面上形成绝缘层32(绝缘层形成工序)。接着，在绝缘层32上形成多个布线图案33a～33d(布线图案形成工序)。
之后，如图10(b)所示那样，在多个布线图案33a～33d上分别涂布焊膏(焊锡34a～34d)(焊膏涂布工序)。
然后，如图10(c)所示那样，在多个布线图案33a～33d中的一个布线图案33a上所涂布的焊膏(焊锡33a)上搭载一个FET裸芯片35(FET裸芯片搭载工序)，并且在其他布线图案33d上所涂布的焊膏(焊锡34d)上搭载其他基板封装部件37。即使对于其他FET裸芯片35，也将其搭载于与布线图案33a相同的或者另外的布线图案上。
接着，如图10(d)所示那样，在形成于FET裸芯片35的上表面的源电极S及栅电极D上涂布焊膏(焊锡34e、34f)(焊膏涂布工序)。
之后，如图10(e)所示那样，在FET裸芯片35的源电极S上所涂布的焊膏(焊锡34e)上以及多个布线图案33a～33d中的搭载了FET裸芯片35的布线图案33a以外的其他布线图案33b上所涂布的焊膏(焊锡34b)上，搭载源电极用金属板连接器36a(源电极用金属板连接器搭载工序)。
另外，在FET裸芯片35的栅电极G上所涂布的焊膏(焊锡34f)上以及多个布线图案33a～33d中的搭载了FET裸芯片35的布线图案33a及搭载了源电极用金属板连接器36a的布线图案33b以外的另外其他布线图案33c上所涂布的焊膏(焊锡34c)上，搭载栅电极用金属板连接器36b(栅电极用金属板连接器搭载工序)。由此，构成半导体模块中间组装体。
而且，将通过以上的工序构成的半导体模块中间组装体放入到回流炉(未图示)，并集中进行如下的接合，即，通过焊锡34a将多个布线图案33a～33d中的一个布线图案33a和FET裸芯片35接合、通过焊锡34d将布线图案33d和其他基板封装部件37接合、通过焊锡34e将FET裸芯片35的上表面所形成的源电极S和源电极用金属板连接器36a接合、通过焊锡34b将多个布线图案33a～33d中的其他布线图案33b和源电极用金属板连接器36a接合、通过焊锡34f将FET裸芯片35的上表面所形成的栅电极G和栅电极用金属板连接器36b接合以及通过焊锡34c将多个布线图案33a～33d中的另外其他布线图案33c和栅电极用金属板连接器36b接合(接合工序)。
由此，制成半导体模块30。
在此，对FET裸芯片35的源电极S和基板31上的布线图案33b之间的接合使用源电极用金属板连接器36a，对FET裸芯片35的栅电极G和基板31上的另外的布线图案33c之间的接合使用栅电极用金属板连接器36b，从而可以通过焊锡封装作业进行这些接合。即，可以通过与在将FET裸芯片35或其他基板封装部件37封装于基板31上的布线图案33a、33d上时进行的焊锡封装作业相同的设备、进而是相同的工序同时进行FET裸芯片35的源电极S和基板31上的布线图案33b之间的接合以及FET裸芯片35的栅电极G和基板31上的另外的布线图案33c之间的接合。因此，可以缩短半导体模块30的制造节拍，并且不再需要线接合的专用设备，可以降低半导体模块30的制造成本。
然而，对于半导体模块30的基板31，使用了铝，对于源电极用金属板连接器36a及栅电极用金属板连接器36b使用了兼具刚性和高导电性的材料。铝的线膨胀系数是23.6×10-6/℃，作为一例，铜材的线膨胀系数是16.8×10-6/℃。即，与源电极用金属板连接器36a及栅电极用金属板连接器36b相比，针对温度变化，基板31更容易变形。
因此，若由于回流工序或电动助力转向(EPS)工作过程中的发热而形成高温，则由于基板31和金属板连接器36a、36b之间的膨胀率不同，使得在金属板连接器36a、36b产生应力。这时，若金属板连接器36a、36b为不能缓和该应力的结构，则有可能使与FET裸芯片35之间的焊点剥落。
对此，在本实施方式中，通过将金属板连接器36a及36b设为桥形，从而不仅桥形的各边进行伸缩，而且各弯曲部也可以在弯折的方向变形，所以得到板簧的效果，并且利用桥形骨架能够吸收上下左右方向(图7的Z轴方向、X轴方向)的变位。即，即使在由于热膨胀、热收缩而产生了基板31或金属板连接器36a、36b的变形的情况下，也可以容易地弯曲金属板连接器36a、36b。
这样，金属板连接器36a及36b在因回流工序而变形的情况或因EPS工作过程中的发热而变形的情况下，可以适当地吸收位移，所以可以防止金属板连接器36a及36b和FET裸芯片35之间的焊点的剥落，可以确保电连接的可靠性。
并且，通过将金属板连接器36a、36b设为桥形，可以将重心(C)设于金属板连接器36a、36b的大致中央部的平整面(平板部36aa)。因此，在进行向基板31的搭载时，在使输送工具利用空气将金属板连接器36a、36b吸附滞留的情况下，可以将该平整面设为吸附面。因此，可以对金属板连接器36a、36b均衡地进行吸附滞留，可以提高部件配置位置精度。
进一步详细说明，若在从正常的设置位置产生了位置偏差的状态下设置金属板连接器36a、36b并进行焊锡焊接，则与电极或布线图案之间的接合面积比正常的接合面积小，所以有可能在流过高电流时产生过热、点火等问题。但是，如果在对重心(C)进行吸附保持的同时转移金属板连接器36a、36b，则可以以优异的定位精度设置金属板连接器36a、36b，不会引起位置偏差(例如，向图7所示的X轴方向、Y轴方向或Z轴方向移动了的状态的位置偏差或以所述Z轴为中心进行了旋转的状态的位置偏差)而能够在正常的设置位置设置金属板连接器36a、36b。由此，即使在流过高电流时也难以产生过热、点火等问题。另外，由于能够在正常的设置位置准确地进行设置，所以该金属板连接器36a、36b对高密度封装是适宜的。
另外，由于在金属板连接器36a、36b的平整面(平板部36aa)设置顺序进给切割部36ak，所以容易进行切割，可以抑制切割工序中的部件变形。进而，由于将该顺序进给切割部36ak从平板部36aa向外侧突出形成，所以可以不使平板部36aa的平整面变形而进行切割。
另外，由于在金属板连接器36a、36b设置四个弯曲部，设为兼具桥形的截面帽子型的形状，所以可以成为更适于通过压制成形来制造的部件。即，可以防止冲压加工引起的回弹，提高部件精度。进而，由于将四个弯曲部的角度设为钝角，所以可以改善压制成形时的脱模性，有助于制造成本的降低。另外，若四个弯曲部的角度是钝角，则对于金属板连接器36a、36b，在平板部36aa、平板部36ba的宽度方向向内作用应力，所以可以以稳定的状态设置金属板连接器36a、36b。
如上所述，由于将金属板连接器36a、36b设为桥形，所以可以提高位移吸收性。另外，由于将金属板连接器36a、36b设为桥形，所以组装时的工具的空气吸附面是平整面并且成为重心，由此可以确保向基板搭载部件时的稳定性，因而可以防止位置偏差，确保电接触的可靠性。
另外，金属板连接器利用铜(Cu)、银(Ag)、金(Au)、铜合金、铝合金导体等兼具刚性和高导电性的材料形成为至少在与基板水平的方向具有弹性。
以上，对本发明的实施方式逐步进行了说明，但本发明不限定于此，可以进行各种变更、改进。
例如，在半导体模块30中使用了FET裸芯片35，但不限于FET裸芯片35，也可以使用IGBT裸芯片等其他晶体管裸芯片。而且，在使用其他晶体管裸芯片的情况下，只要利用金属板连接器通过焊锡使形成于晶体管裸芯片的上表面的电极上和多个布线图案中的接合了晶体管裸芯片的布线图案以外的其他布线图案上接合即可。由此，可以通过与在将晶体管裸芯片或其他基板封装部件封装于基板上的布线图案上时进行的焊接作业相同的设备、进而是相同的工序同时进行晶体管裸芯片的电极和基板上的布线图案之间的接合。
而且，在作为晶体管裸芯片使用IGBT裸芯片的情况下，优选，使用金属板连接器通过焊锡分别将形成于IGBT裸芯片上的发射极电极及栅电极接合于基板上的布线图案。
这样，当使用IGBT裸芯片并分别使用金属板连接器将在IGBT裸芯片上形成的发射极电极及栅电极通过焊锡与基板上的布线图案接合的情况下，可以通过与在将IGBT裸芯片或其他基板封装部件封装于基板上的布线图案上时进行的焊接作业相同的设备、进而是相同的工序同时进行IGBT裸芯片的发射极电极和基板上的布线图案之间的接合，以及IGBT裸芯片的栅电极和基板上的另外的布线图案之间的接合。
并且，在半导体模块30中，栅电极用金属板连接器是一个种类，源电极用金属板连接器是相对于栅电极用金属板连接器进行180°直线配置的第一源电极用金属板连接器(参照图4的Tr2及Tr4)和相对于栅电极用金属板连接器进行90°直角配置的第二源电极用金属板连接器(参照图4的Tr1、Tr3及Tr5)这两个种类，在一个FET裸芯片中，可以将一个种类的栅电极用金属板连接器与从两个种类的第一源电极用金属板连接器及第二源电极用金属板连接器中选择的任意一方的源电极用金属板连接器组合进行使用。
此外，对于第一源电极用金属板连接器相对于栅电极用金属板连接器的配置(栅电极用金属板连接器和第一源电极用金属板连接器所成的角度)，优选设为95～265°，更优选设为160～200°，更进一步优选设为175～185°，最优选设为180°。
另外，对于第二源电极用金属板连接器相对于栅电极用金属板连接器的配置(栅电极用金属板连接器和第二源电极用金属板连接器所成的角度)，优选设为5～175°，更优选设为70～120°，更进一步优选设为85～95°，最优选设为90°。
根据该半导体模块，与所述的半导体模块30同样，封装于基板上的晶体管裸芯片的配置上产生自由度，基板上的布线的设计自由度增大，可以使基板上的半导体模块的布局紧凑。并且，可以容易地使基板上的三相马达的各相路径的长度相同。由此，可以容易地使三相马达的各相特性、特别是各相的阻抗特性一致，能够提高转矩和速度等的脉动精度。
符号说明
1…方向盘、2…柱轴、3…减速齿轮、4A，4B…万向接头、5…齿轮齿条机构、6…拉杆、7…转矩传感器、8…电动马达、9…车速传感器、10…控制器、11…控制运算装置、12…门极驱动电路、13…马达驱动部、14…紧急停止用的切断装置、15…电流检测电路、16…旋转传感器、17…转子位置检测电路、18…IGN电压监视部、19…电源电路部、20…外壳、21…半导体模块载置部、21a…螺钉孔、22…电力及信号用连接器封装部、23…三相输出用连接器封装部、23a…螺钉孔、24…安装柱子、24a…螺钉孔、30…半导体模块、31…基板、31a…通孔、32…绝缘层、33a～33d…布线图案、34a～34d…焊锡、35…FET裸芯片(晶体管裸芯片)、36a…源电极用金属板连接器、36aa…平板部、36ab…连接部(第一支脚部)、36ac…连接部(第二支脚部)、36ad…第一弯曲部、36ae…第二弯曲部、36af…接合面、36ag…窄幅部、36ah…第三弯曲部、36ai…第四弯曲部、36aj…接合面、36ak…顺序进给切割部、36b…栅电极用金属板连接器、36ba…平板部、36bb…连接部、36bc…连接部、37…基板封装部件、38…安装螺钉、39…放热用薄板、40…控制电路基板、40a…通孔、41…安装螺钉、50…电力及信号用连接器、51…安装螺钉、60…三相输出用连接器、60a…通孔、61…安装螺钉、70…盖、81…电源线、81a…正极端子、82…接地线、82a…负极端子、90…三相输出部、91a…a相输出线、91b…b相输出线、91c…c相输出线、G…栅电极(电极)、S…源电极(电极)、C…重心。

Claims (3)

1.一种半导体模块，其特征在于，
具有：金属制的基板；形成于该基板之上的绝缘层；形成于该绝缘层上的多个布线图案；通过焊锡封装于该多个布线图案中的一个布线图案上的晶体管裸芯片；以及用于通过焊锡使形成于该晶体管裸芯片的上表面的电极上和所述多个布线图案中的其他布线图案上接合的、由金属板构成的金属板连接器，
所述金属板连接器具有水平的平板部、以从该平板部的宽度方向一端朝下延伸的方式弯折并与所述电极上接合的第一支脚部、和以从所述平板部的宽度方向另一端朝下延伸的方式弯折并与所述其他布线图案上接合的第二支脚部，并形成桥形，所述金属板连接器利用铜、银、金、铜合金及铝合金导体中的任意一种材料形成为至少在水平方向具有弹性，
所述金属板连接器的将所述第一支脚部和所述第二支脚部之间连接的所述平板部的重心在平面上，且该平板部是平面，
所述平板部的厚度比所述金属板连接器的其他部分的厚度大，
所述晶体管裸芯片是在上表面形成有源电极和栅电极的FET裸芯片，所述金属板连接器具备源电极用金属板连接器和栅电极用金属板连接器，利用所述源电极用金属板连接器通过焊锡使所述FET裸芯片的源电极上和所述多个布线图案中的其他布线图案上接合，利用所述栅电极用金属板连接器通过焊锡使所述FET裸芯片的栅电极上和所述多个布线图案中的另外其他布线图案上接合，
所述栅电极用金属板连接器是一个种类，所述源电极用金属板连接器是相对于所述栅电极用金属板连接器进行180°直线配置的第一源电极用金属板连接器和相对于所述栅电极用金属板连接器进行90°直角配置的第二源电极用金属板连接器这两个种类，在一个FET裸芯片中，将所述一个种类的栅电极用金属板连接器与从所述两个种类的第一源电极用金属板连接器及第二源电极用金属板连接器中选择的任意一方的源电极用金属板连接器组合进行使用。
2.根据权利要求1所述的半导体模块，其中，
所述第一支脚部的一端通过第一弯曲部与所述平板部的宽度方向一端连接，并且在所述第一支脚部的另一端，通过第二弯曲部以在所述平板部的宽度方向向外突出的方式，连接有通过焊锡与所述电极上接合的接合面，
所述第二支脚部的一端通过第三弯曲部与所述平板部的宽度方向另一端连接，并且在所述第二支脚部的另一端，通过第四弯曲部以在所述平板部的宽度方向向外突出的方式，连接有通过焊锡与所述布线图案上接合的接合面。
3.根据权利要求2所述的半导体模块，其特征在于，
所述第一弯曲部、所述第二弯曲部、所述第三弯曲部及所述第四弯曲部的角度分别为钝角。
CN201380003694.8A 2012-11-05 2013-10-25 半导体模块 Expired - Fee Related CN103930981B (zh)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
JP2012-243685 2012-11-05
JP2012243685 2012-11-05
JP2013-145651 2013-07-11
JP2013145651 2013-07-11
PCT/JP2013/006341 WO2014068936A1 (ja) 2012-11-05 2013-10-25 半導体モジュール

Publications (2)

Publication Number Publication Date
CN103930981A CN103930981A (zh) 2014-07-16
CN103930981B true CN103930981B (zh) 2016-07-13

Family

ID=50626885

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201380003694.8A Expired - Fee Related CN103930981B (zh) 2012-11-05 2013-10-25 半导体模块

Country Status (5)

Country Link
US (1) US9609775B2 (zh)
EP (1) EP2916349B1 (zh)
JP (1) JP5741772B2 (zh)
CN (1) CN103930981B (zh)
WO (1) WO2014068936A1 (zh)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102086792B1 (ko) * 2013-09-02 2020-03-09 삼성전자주식회사 착탈 가능한 장치를 포함하는 전자 장치
JP5874869B2 (ja) * 2013-10-21 2016-03-02 日本精工株式会社 半導体モジュール
USD954667S1 (en) 2017-01-13 2022-06-14 Wolfspeed, Inc. Power module
US10212838B2 (en) * 2017-01-13 2019-02-19 Cree Fayetteville, Inc. High power multilayer module having low inductance and fast switching for paralleling power devices
US10600712B2 (en) * 2017-02-20 2020-03-24 Shindengen Electric Manufacturing Co., Ltd. Electronic device
USD903590S1 (en) 2018-09-12 2020-12-01 Cree Fayetteville, Inc. Power module
JP7329919B2 (ja) * 2018-12-07 2023-08-21 新電元工業株式会社 半導体装置、半導体装置の製造方法及びクリップリード
CN111093342B (zh) * 2019-12-31 2021-07-13 维沃移动通信有限公司 电子设备

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008294390A (ja) * 2007-04-25 2008-12-04 Hitachi Ltd モジュール構成
CN101859755A (zh) * 2010-05-14 2010-10-13 上海凯虹科技电子有限公司 一种功率mosfet封装体及其封装方法
CN102194806A (zh) * 2010-03-18 2011-09-21 万国半导体股份有限公司 堆栈式双晶片封装及其制备方法
JP2012212712A (ja) * 2011-03-30 2012-11-01 Toshiba Corp 半導体装置の実装構造及び半導体装置の実装方法

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3604882A1 (de) * 1986-02-15 1987-08-20 Bbc Brown Boveri & Cie Leistungshalbleitermodul und verfahren zur herstellung des moduls
US5637922A (en) * 1994-02-07 1997-06-10 General Electric Company Wireless radio frequency power semiconductor devices using high density interconnect
JP2000124398A (ja) 1998-10-16 2000-04-28 Mitsubishi Electric Corp パワー半導体モジュール
JP4471555B2 (ja) * 2002-04-22 2010-06-02 三洋電機株式会社 半導体装置
US20040217488A1 (en) * 2003-05-02 2004-11-04 Luechinger Christoph B. Ribbon bonding
JP4075992B2 (ja) 2003-05-07 2008-04-16 トヨタ自動車株式会社 半導体モジュールの製造方法、半導体モジュール、それを用いた一体型モータおよび一体型モータを備える自動車
JP2006253516A (ja) * 2005-03-14 2006-09-21 Hitachi Ltd パワー半導体装置
JP4764692B2 (ja) 2005-09-29 2011-09-07 日立オートモティブシステムズ株式会社 半導体モジュール
US7755185B2 (en) * 2006-09-29 2010-07-13 Infineon Technologies Ag Arrangement for cooling a power semiconductor module
JP5076440B2 (ja) * 2006-10-16 2012-11-21 富士電機株式会社 半導体装置及び半導体装置の製造方法
US8164176B2 (en) * 2006-10-20 2012-04-24 Infineon Technologies Ag Semiconductor module arrangement
JP4720756B2 (ja) * 2007-02-22 2011-07-13 トヨタ自動車株式会社 半導体電力変換装置およびその製造方法
JP2009259981A (ja) * 2008-04-15 2009-11-05 Toshiba Corp 半導体装置およびその製造方法
DE102009046858B3 (de) * 2009-11-19 2011-05-05 Infineon Technologies Ag Leistungshalbleitermodul und Verfahren zum Betrieb eines Leistungshalbleitermoduls
US8987878B2 (en) * 2010-10-29 2015-03-24 Alpha And Omega Semiconductor Incorporated Substrateless power device packages
JP2012069640A (ja) 2010-09-22 2012-04-05 Toshiba Corp 半導体装置及び電力用半導体装置
EP2503595A1 (en) * 2011-02-18 2012-09-26 ABB Research Ltd. Power semiconductor module and method of manufacturing a power semiconductor module
EP2698817B1 (en) * 2011-08-10 2018-10-24 Fuji Electric Co., Ltd. Semiconductor device and method for manufacturing semiconductor device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008294390A (ja) * 2007-04-25 2008-12-04 Hitachi Ltd モジュール構成
CN102194806A (zh) * 2010-03-18 2011-09-21 万国半导体股份有限公司 堆栈式双晶片封装及其制备方法
CN101859755A (zh) * 2010-05-14 2010-10-13 上海凯虹科技电子有限公司 一种功率mosfet封装体及其封装方法
JP2012212712A (ja) * 2011-03-30 2012-11-01 Toshiba Corp 半導体装置の実装構造及び半導体装置の実装方法

Also Published As

Publication number Publication date
US20150342074A1 (en) 2015-11-26
US9609775B2 (en) 2017-03-28
JPWO2014068936A1 (ja) 2016-09-08
EP2916349A1 (en) 2015-09-09
EP2916349B1 (en) 2021-03-03
JP5741772B2 (ja) 2015-07-01
CN103930981A (zh) 2014-07-16
WO2014068936A1 (ja) 2014-05-08
EP2916349A4 (en) 2016-08-31

Similar Documents

Publication Publication Date Title
CN103930981B (zh) 半导体模块
CN103918066B (zh) 半导体模块
CN103918076B (zh) 半导体模块
CN103918067B (zh) 半导体模块及其制造方法
CN105474386B (zh) 半导体模块
CN103370788A (zh) 半导体装置及其制造方法
CN104604042B (zh) 连接器
CN106716723B (zh) 多极引线部件及基板的连接装置
CN105453259A (zh) 引线框、使用引线框的电子控制装置及引线框搭载方法
CN104078455A (zh) 电力转换装置
JP2014056710A (ja) コネクタ、及びコネクタを備える電動パワーステアリング装置
JP2014056711A (ja) コネクタ、及びコネクタを備える電動パワーステアリング装置
JP2015069990A (ja) 半導体モジュール

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20160713

Termination date: 20211025