CN203596346U - 多芯片无引线组件 - Google Patents

多芯片无引线组件 Download PDF

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CN203596346U
CN203596346U CN201320492741.7U CN201320492741U CN203596346U CN 203596346 U CN203596346 U CN 203596346U CN 201320492741 U CN201320492741 U CN 201320492741U CN 203596346 U CN203596346 U CN 203596346U
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lead
wire
integrated circuit
channel mosfet
electrode
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吴春林
史蒂文·萨普
B·多斯多斯
S·贝拉尼
尹成根
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Fairchild Semiconductor Corp
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Abstract

本申请涉及多芯片无引线组件，包括：具有多个电极的集成电路；具有第一和第二源极、第一和第二栅极和公共漏极的双沟道MOSFET；具有多个引线的引线框架，每个引线在组件的外底表面上有暴露的接触表面，每个引线用于将电功率传送入集成电路和双沟道MOSFET，或将电信号传送入或传送出集成电路和双沟道MOSFET；密封绝缘树脂，将引线框架、集成电路和双沟道MOSFET嵌入到组件中，并在组件的外底表面上限定引线的暴露的接触表面；第一和第二引线分别被连接到集成电路的第一和第二电极以及一个和另一双沟道MOSFET的栅极，第三和第四引线分别被连接到集成电路的第三和第四电极以及一个和另一个双沟道MOSFET的源极。

Description

多芯片无引线组件
背景技术
存在针对锂离子电池的多种保护机制。如果锂离子电池过充电，可能发生强烈的放热反应，并且导致火灾的可能性增加。为了防止锂离子电池过充电，使用电池保护电路。所述电池保护电路（其例示于图1）除其它部件之外，通常包含两个场效应晶体管（FET）开关22和24以及控制集成电路（IC）20。一个FET防止电流流入电池，另一个FET防止电流流出电池，除非控制IC使能它。 
存在包含控制IC和MOSFET在内的多芯片组件。然而，可以进行很多改进。例如，一些传统的多芯片组件在封装的所有四侧都包含引线。这导致组件变大，这是不期望的，因为这样的组件是用于诸如手机之类的小的电子设备的。可以减小多芯片组件的尺寸，但是这减小了可以用于这类封装的芯片的载流量。 
例如，见被转让给与本专利相同的受让人并以引用方式并入本专利的美国专利No.7,868,432，其公开了产生紧凑型多芯片组件的特征。首先，功率MOSFET的引线框架结构的管芯安装焊垫可以从多芯片组件的一个边缘完全延伸到另一边缘。这允许管芯安装焊垫上的功率芯片具有大尺寸，从而增大功率MOSFET的额定电流。其次，没有从功率芯片或IC芯片到引线框架结构的下结合（down bond）。第三，IC和功率MOSFET之间的连接是通过芯片间互连（即线互连）来完成的。第四，减少了MOSFET管芯安装焊垫附近的外部引线和信号路由元件的数量。通过减少外部引线并消除下结合，封装内部区域增大，以允许更大的功率MOSFET。增大功率MOSFET的尺寸减小了导通电阻，从而减少功率损耗并减少发热。这最终增加了电池的有用能量。 
实用新型内容
然而，甚至上述示例性设备的很多优势都可以被改进。‘432中的设备有若干会产生寄生电感、电阻和电容并且不利地影响性能的丝焊（wire bonds）。其它结合（bonding）技术可以减小源电阻。集成电路在装配期间可以更好地被保护，以提高批产量。希望有更小和改善的整体封装。 
多芯片无引线组件在一个管芯上有两个n沟道MOSFET，并且共用公共漏极。所述组件还包括控制集成电路。针对MOSFET使用倒装技术并针对集成电路使用诸如焊接凸点、铜栓或铜柱之类的凸起接触表面来装配所述设备，从而在不用焊线的情况下将MOSFET和集成电路连接到引线框架。所述设备被正面朝下安置在与设备互连并且延伸至密封树脂外部的引线上。 
组件中的所述设备被装配在有多个引线的引线框架上。每个引线在所述组件的外底表面有外部的、暴露的接触表面。引线将电功率传送入集成电路和双沟道MOSFET，并且还将电信号传送入或传送出集成电路和双沟道MOSFET。所述组件通过如下方式制造：将引线框架、集成电路和双沟道MOSFET封装在绝缘树脂中以形成所述组件并在所述组件外底表面上限定出引线的暴露的接触表面。引线框架上的引线被配置为减小所述组件的占位面积（footprint），降低其电阻并且减小寄生电容和电感。为了这个目的，第一引线被连接到集成电路的第一电极和一个双沟道MOSFET的栅极，第二引线被连接到集成电路的第二电极和另一个双沟道MOSFET的栅极，第三引线被连接到集成电路的第三电极和所述双沟道MOSFET之一的源极，第四引线被连接到集成电路的第四电极和另一个双沟道MOSFET的源极。 
所述双沟道MOSFET有制作在公共晶圆上的两个MOSFET管芯。两个管芯与晶圆分离但彼此并不分离。这样每个MOSFET有其自己的源极和栅极并共用公共漏极。所述控制集成电路有一个或多个电极，所述电极用于连接到双沟道MOSFET和诸如VDD、VM和TEST之类的外部系统节点。控制集成电路上的电极将其连接到MOSFET的栅极和源极。所述集成电路包括用于导通和关 断MOSFET的电路。 
所述控制集成电路和双沟道MOSFET被正面朝下安装在引线框架的引线上，所述引线框架随后被在密封绝缘树脂中塑模。这样就不会用到焊线。在装配期间，提供了引线框架的阵列。所述阵列由金属片冲压而成，所述金属片包括相对的轨和拉杆，以在装配和塑模期间固定引线框架。所述集成电路和MOSFET被焊接在引线上并在固定就位。引线框架的阵列被放置在模具的腔内，所述模具被放置在传递塑模机中。所述机器将融化的密封绝缘树脂输送到模具中，在模具中所述树脂被允许冷却和固化。此后，所述模具被打开，一个或多个加工机器将塑模的设备与其引线框架分离。所述密封绝缘树脂限定出外底表面。引线的外部接触表面被暴露在外底表面上，以用于连接到其它设备或系统元件。 
与丝焊组件相比，本实用新型的优选实施例有多芯片组件尺寸减小的优势。这是由非分割的双沟道MOSFET而成为可能的。管芯上的两个相邻MOSFET之间的物理距离非常小，但是大到足够有效地将MOSFET的电气操作彼此分离。非分割的MOSFET提供的公共漏极消除了用于连接MOSFET的漏极的工艺步骤和材料。通过以倒装法安装集成电路和双沟道MOSFET，所述优选实施例消除了焊线并减小了寄生电感和电容。较低的电感和电容允许所述组件以更高效的高频操作。所述多芯片组件与使用焊线和正面朝上安装设备的组件相比，具有较少的外部接触，并且占据较小的空间。与传统丝焊的组件相比，这给了所述优选实施例更小占位尺寸的优势。由于所述非分割的MOSFET和没有引线，所述优选实施例也有更低操作（RSS）电阻的优势。所述优选实施例通过将单个漏极夹片或散热片附着于公共漏极，改善了电性能和热性能。 
附图说明
图1A为传统的电池保护电路； 
图1B为多芯片组件的电气示意图； 
图2A为多芯片组件的示出轮廓上的密封绝缘树脂的透视图； 
图2B为多芯片组件的透视图； 
图3为单独的引线框架的透视图； 
图4为示出装配在引线框架上的IC和MOSFET的放大平面图； 
图5示出附着于双沟道MOSFET的两个漏极的夹片； 
图6A为双沟道MOSFET的通过栅极和源极接触区之一截取的剖面图； 
图6B为双沟道MOSFET的示出环绕栅极和源极接触区的钝化层的平面视图。 
具体实施方式
公开了用于调节电池（例如，手机电池）的充电的功率半导体开关和控制IC的集成。在本实用新型实施例中，公开了可以被安装在微型电路板上的小型（small form factor）多芯片组件。微型电路板可连接到电池组的一端。多芯片组件可构成电池保护电路的一部分。 
图1示出传统的电池保护电路。一些电池保护电路使用了分立元件来建立如图1所示的电路。当很多分立元件被用于形成图1所示的电路时，保护电路可能最终会占用相对大量的空间。例如，在电路板上仅针对分立IC和功率MOSFET可能需要最少八个焊垫。例如，见以引用方式并入本专利的美国专利No.7,868,432。 
转向图2A和图2B，多芯片无引线组件200显示其元件包括密封在树脂250内的集成电路（IC）150、双n沟道MOSFET110、IC引线210、211、212、栅极引线213、214以及源极引线217-220。IC150和双n沟道MOSFET110被正面朝下安装在引线上。IC引线210、211、212由平面金属制成，并分别连接到IC150上的电极TEST、VDD和VM。这样，IC150以倒装法附着于其引线210、211和212。使用一个或多个传统的方法（其包括但不限于：从IC150延伸至引线或焊垫的铜柱或铜栓）来进行电连接和机械连接。源极引线217和219是源极焊垫215的一部分；源极引线218和220是源极焊垫216的一部分。源极焊垫附着于双n沟道MOSFET110的各自源极上。源极和栅极正面朝下，公共 漏极114正面朝上。可选的漏极夹片或散热片280可以附着于公共漏极。见图5。这样的漏极夹片或散热片可延伸至并暴露于密封树脂250的顶部上表面254。公共漏极夹片不仅耗散热而且减小在两个漏极之间的电阻，从而防止由于漏极之间的电阻产生的不需要的热量。当夹片被暴露时，器件被引线框架的源极焊垫215和216和漏极夹片280双重冷却。所述夹片可以由金属或金属合金或任何能够有效地从双沟道MOSFET传导热量的任何其它材料制成。 
如图2B所示，引线和源极焊垫210-220有暴露于密封树脂250的底表面252上的外接触表面。所述215和216焊垫是从引线框架的顶部半蚀刻的。全铜引线框架限定出源极接触区域，并且该源极接触区域与在管芯处的源极接触的开口相匹配。在引线框架顶部半蚀刻的益处允许在不使用凸块晶圆（焊料或柱凸块）的情况下，直接在引线框架上倒装管芯。同时，容易控制和维持确定的焊接线的厚度。 
转向图3，引线框架100示出其引线210-220。特别地，引线218和220与一个有引线手指（lead finger）216（f）的源极焊垫216成一体。同样地，引线217和219与另一个有引线手指215（f）的源极焊垫215成一体。转向图4，IC150和双沟道MOSFET110的轮廓叠加于引线之上。引线内的虚线表明引线的顶表面被半蚀刻以提供接纳密封树脂250的浅腔，以将引线锁定在树脂内。引线被排列成阵列，每个引线的一端安置在树脂的外周附近，另一端安置在更深的树脂中，并且连接到元器件（component device）110和150之一的一个或多个电极。 
IC150有7个电极。IC150以倒装法被正面朝下安装，以便铜柱或铜栓160-166附着于相应的引线210-216。使用铜柱/栓160-166的倒装法安装在装配期间保护IC150。对于传统的丝焊连接，IC必须管芯附着到管芯焊垫，然后从其顶部触点通过管芯焊垫丝焊到引线框架的外周引线。传统的管芯附着过程将附着力的冲击集中到管芯的中心，这可能会折断芯片。与此相反，以倒装法安装的IC有七个柱/栓160-166用来将IC150附着于引线210-215上。这些多个触点将对管芯的冲击分散到七个柱或栓，没有将冲击力集中到IC150的中心。 
引线210接纳连接到IC TEST电极的柱/栓160。引线210从TEST电极延伸到树脂250的外周。引线211接纳连接到IC150的VDD电极的柱/栓161。引线211延伸到树脂250的顶部边缘。引线212接纳连接到VM电极的柱/栓162。引线212延伸到树脂250的底部边缘。引线213接纳连接到IC上的栅极控制电极和一个MOSFET的栅电极的柱/栓163。引线213从IC150延伸到树脂的底部边缘。另一个引线214接纳连接到另一个MOSFET的栅极和IC的另一个栅极控制电极的柱/栓164。引线214沿与引线213相反的方向延伸并在树脂250的相对（顶部）边缘终止。源极焊垫215有指向IC上的电极的手指215（f）。所述IC的柱/栓165延伸至引线215的手指215（f）。源极焊垫215有两个外部引线217和219，这两个外部引线217和219从源极焊垫以横贯手指215（f）的方向延伸并在封装的一个边缘终止。结果，外部源极引线217和219通过源极焊垫215和源极手指215（f）被连接到柱/栓165下面的一个IC电极。源极焊垫有指向IC150的另一个电极的相应手指216（f）。柱/栓116从IC150延伸并附着于手指216（f）。引线218和220延伸到封装的与引线217和219的末端相对的边缘。结果，外部源极引线218和220通过源极焊垫216和源极手指216（f）被连接到柱/栓166下面的另一IC电极。应该认识到，一个MOSFET的源极被连接到在封装的一侧上的两个外部引脚和IC150的内部电极，另一个MOSFET的源极被连接到在封装的另一侧上的另外两个外部引脚和IC150的另一个内部电极。以相似的方式，另外两个具有在封装的相对侧上的外部引脚的引线将MOSFET的栅极连接到内部IC电极。 
本领域技术人员熟悉各种各样的将导电凸块和柱应用于半导体和集成电路的方法。例如，见美国专利7,208,843，其是用于形成铜柱的已知方法的代表，并以引用的方式并入本文。例如，另见美国专利8,058,735和6,617,655，其是用于形成包括铜凸块在内的金属凸块的已知方法的代表，并以引用的方式并入本文。 
本领域技术人员理解，双沟道MOSFET是包含多个单元的栅格结构，所述单元包括由栅极区隔开的高掺杂源极区。高掺杂源极区在较为轻掺杂的漂移区 之上。底表面是带有金属层的高掺杂漏极区。为了解释的简单起见，让我们假定器件是沟槽栅极型双MOSFET。电流通路是沿着设定为邻近沟槽的沟道垂直的，并穿过漂移区。漂移区的掺杂决定了器件的导通电阻和击穿电压。 
转向图6A和6B，在各个MOSFET中，多个栅极区被电连接到一起，以形成用于传输栅极信号的单一栅极结构。在制造期间，栅极与源极区电隔离。例如，在典型的栅极沟槽工艺中，栅极被埋入高掺杂源极区内的沟槽中。沟槽的侧壁和顶部是绝缘的 
栅极沟槽上的顶部绝缘允许建立相对大的与沟槽栅极隔离的源极接触区。每个沟槽的一端被连接到埋入的、绝缘的有高掺杂多晶硅的头部沟槽518和519。头部沟槽分别在相对大的栅极接触区501和502终止。源极包括覆盖源极区的顶部的诸如铝层之类的金属层。 
在工艺临近结束时，双MOSFET110的顶部被覆盖钝化层507。钝化层利用光刻胶被图案化，来为栅极接触区源极接触区505和506限定出接触区501和502。在接触区501、502、505和506之上的钝化层507被去除，并且凸点下（under bump）金属（例如无电镀镍金（ENIG）或钛/镍/银）被沉积在接触区，以用于焊接到源极焊垫和栅极引线。钝化由玻璃、BPSG、氮化硅或聚合物材料制成。所述聚合物材料包括但不限于聚酰亚胺。 
为了装配封装，MOSFET110和IC150被制造为带有输入和输出电极以及铜柱和铜凸点。在优选实施例中，IC150有焊接凸点或铜栓/柱，MOSFET被直接以倒装法安装在焊垫215和216上。无引线引线框架110如图4所示。所述IC150和MOSFET110都被正面朝下安装在引线框架的引线和焊垫上。柱和凸点的顶部可能有焊料层。电粘合剂可能被涂覆于引线和焊垫和/或柱和凸块，以将器件固定在引线上。焊料层被回流，从而将柱和凸块永久地附着于引线框架的引线和焊垫。本领域技术人员理解，多个引线框架通常被制造成设置在对立的细长轨之间的阵列。引线框架通过拉杆（tie bar）被支撑在轨之间。在器件被装配并且永久地附着于引线框架之后，阵列被放置在传递模具之内，传递模具又被放置在传递模塑机之内。这种机器将熔融绝缘树脂输送到模具，以将器件 密封到绝缘树脂内。模具被允许冷却并固化，在引线框架阵列内密封的设备与它们各自的拉杆和轨分离。 

Claims (14)

1.一种多芯片无引线组件，其特征在于，包括： 
具有多个电极的集成电路； 
具有第一和第二源极、第一和第二栅极和公共漏极的双沟道MOSFET； 
具有多个引线的引线框架，每个引线在所述组件的外底表面上有暴露的接触表面，每个引线用于将电功率传送入所述集成电路和所述双沟道MOSFET，或用于将电信号传送入或传送出所述集成电路和所述双沟道MOSFET； 
密封绝缘树脂，其将所述引线框架、所述集成电路和所述双沟道MOSFET嵌入到组件中，并在所述组件的所述外底表面上限定出所述引线的暴露的接触表面； 
其中，第一引线被连接到所述集成电路的第一电极和一个双沟道MOSFET的栅极，第二引线被连接到所述集成电路的第二电极和另一个双沟道MOSFET的栅极，第三引线被连接到所述集成电路的第三电极和所述双沟道MOSFET之一的源极，第四引线被连接到所述集成电路的第四电极和另一个双沟道MOSFET的源极。 
2.根据权利要求1所述的多芯片无引线组件，其中，所述多个引线中除了第一、第二、第三、第四引线之外的一个或多个其它引线被分别连接到所述集成电路的所述多个电极中除了第一、第二、第三、第四电极之外的相应的一个或多个其它电极。 
3.根据权利要求1所述的多芯片无引线组件，其中，所述引线框架具有一个或多个半蚀刻的焊垫，每个焊垫用于接纳以倒装法安装的MOSFET。 
4.根据权利要求1所述的多芯片无引线组件，其中，所述集成电路包括一个或多个凸起表面，所述凸起表面用于附着于所述引线框架的引线。 
5.根据权利要求4所述的多芯片无引线组件，其中，所述引线框架包括第二源极焊垫，所述第二源极焊垫具有两个外部引线和向所述集成电路的第二电极延伸的内部手指。 
6.根据权利要求1所述的多芯片无引线组件，其中，所述集成电路具有用于Vdd、Vm和TEST的电极。 
7.根据权利要求1所述的多芯片无引线组件，其中，所述引线框架是半蚀刻的。 
8.根据权利要求1所述的多芯片无引线组件，进一步包括夹片，所述夹片附着于所述双沟道MOSFET的漏极。 
9.一种多芯片无引线组件，其特征在于，包括： 
具有多个电极的集成电路； 
具有第一和第二源极、第一和第二栅极和公共漏极的双沟道MOSFET； 
具有多个引线的引线框架，每个引线在所述组件的外底表面具有暴露的接触表面，每个引线用于将电功率传送入所述集成电路和所述双沟道MOSFET，或用于将电信号传送入或传送出所述集成电路和所述双沟道MOSFET； 
密封绝缘树脂，其将所述引线框架、所述集成电路和所述双沟道MOSFET嵌入到组件中，并在所述组件的所述外底表面上限定出所述引线的暴露的接触表面； 
其中，第一引线被连接到所述集成电路的第一电极和一个双沟道MOSFET的栅极，第二引线被连接到所述集成电路的第二电极和另一个双沟道MOSFET的栅极，第三引线被连接到所述集成电路的第三电极和所述双沟道MOSFET之一的源极。 
10.根据权利要求9所述的多芯片无引线组件，其中，所述多个引线中除了第一、第二、第三、第四引线之外的一个或多个其它引线被分别连接到所述集成电路的所述多个电极中除了第一、第二、第三、第四电极之外的相应的一个或多个其它电极。 
11.根据权利要求9所述的多芯片无引线组件，其中，所述引线框架具有一个或多个半蚀刻的焊垫，每个焊垫用于接纳以倒装法安装的MOSFET。 
12.根据权利要求9所述的多芯片无引线组件，其中，所述集成电路包括一个或多个凸起表面，所述凸起表面用于附着于所述引线框架的引线。 
13.根据权利要求9所述的多芯片无引线组件，其中，所述引线框架是半蚀刻的。 
14.根据权利要求9所述的多芯片无引线组件，进一步包括夹片，所述夹片附着于所述双沟道MOSFET的漏极。 
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