CN101432870A - 两面电极结构的半导体装置及其制造方法 - Google Patents
两面电极结构的半导体装置及其制造方法 Download PDFInfo
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- CN101432870A CN101432870A CNA2007800151245A CN200780015124A CN101432870A CN 101432870 A CN101432870 A CN 101432870A CN A2007800151245 A CNA2007800151245 A CN A2007800151245A CN 200780015124 A CN200780015124 A CN 200780015124A CN 101432870 A CN101432870 A CN 101432870A
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- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01046—Palladium [Pd]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01077—Iridium [Ir]
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12044—OLED
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
- H01L2924/15155—Shape the die mounting substrate comprising a recess for hosting the device the shape of the recess being other than a cuboid
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L2924/1517—Multilayer substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
- H01L2924/1533—Connection portion the connection portion being formed on the die mounting surface of the substrate the connection portion being formed both on the die mounting surface of the substrate and outside the die mounting surface of the substrate
- H01L2924/15331—Connection portion the connection portion being formed on the die mounting surface of the substrate the connection portion being formed both on the die mounting surface of the substrate and outside the die mounting surface of the substrate being a ball array, e.g. BGA
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Geometry (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Description
Claims (10)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
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JP120127/2006 | 2006-04-25 | ||
JP2006120127A JP3942190B1 (ja) | 2006-04-25 | 2006-04-25 | 両面電極構造の半導体装置及びその製造方法 |
PCT/JP2007/057812 WO2007125744A1 (ja) | 2006-04-25 | 2007-04-09 | 両面電極構造の半導体装置及びその製造方法 |
Publications (2)
Publication Number | Publication Date |
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CN101432870A true CN101432870A (zh) | 2009-05-13 |
CN101432870B CN101432870B (zh) | 2011-08-10 |
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CN2007800151245A Active CN101432870B (zh) | 2006-04-25 | 2007-04-09 | 两面电极结构的半导体装置及其制造方法 |
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US (2) | US7884466B2 (zh) |
JP (1) | JP3942190B1 (zh) |
KR (1) | KR101161572B1 (zh) |
CN (1) | CN101432870B (zh) |
WO (1) | WO2007125744A1 (zh) |
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CN110494995A (zh) * | 2017-03-21 | 2019-11-22 | Lg伊诺特有限公司 | 半导体元件封装和自动聚焦装置 |
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KR100811034B1 (ko) * | 2007-04-30 | 2008-03-06 | 삼성전기주식회사 | 전자소자 내장 인쇄회로기판의 제조방법 |
JP5215605B2 (ja) * | 2007-07-17 | 2013-06-19 | ラピスセミコンダクタ株式会社 | 半導体装置の製造方法 |
KR100859004B1 (ko) * | 2007-08-22 | 2008-09-18 | 삼성전기주식회사 | 전자소자 내장형 인쇄회로기판의 제조방법 |
JP4876173B2 (ja) * | 2008-01-25 | 2012-02-15 | イビデン株式会社 | 多層配線板およびその製造方法 |
US8320134B2 (en) * | 2010-02-05 | 2012-11-27 | Advanced Semiconductor Engineering, Inc. | Embedded component substrate and manufacturing methods thereof |
-
2006
- 2006-04-25 JP JP2006120127A patent/JP3942190B1/ja active Active
-
2007
- 2007-04-09 US US12/279,402 patent/US7884466B2/en active Active
- 2007-04-09 WO PCT/JP2007/057812 patent/WO2007125744A1/ja active Application Filing
- 2007-04-09 CN CN2007800151245A patent/CN101432870B/zh active Active
- 2007-04-09 KR KR1020087023980A patent/KR101161572B1/ko not_active IP Right Cessation
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2010
- 2010-12-27 US US12/978,877 patent/US20110089551A1/en not_active Abandoned
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110494995A (zh) * | 2017-03-21 | 2019-11-22 | Lg伊诺特有限公司 | 半导体元件封装和自动聚焦装置 |
CN110494995B (zh) * | 2017-03-21 | 2024-03-08 | Lg 伊诺特有限公司 | 半导体元件封装和自动聚焦装置 |
Also Published As
Publication number | Publication date |
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JP2007294634A (ja) | 2007-11-08 |
US20110089551A1 (en) | 2011-04-21 |
KR20080102271A (ko) | 2008-11-24 |
CN101432870B (zh) | 2011-08-10 |
US7884466B2 (en) | 2011-02-08 |
US20090072381A1 (en) | 2009-03-19 |
KR101161572B1 (ko) | 2012-07-04 |
JP3942190B1 (ja) | 2007-07-11 |
WO2007125744A1 (ja) | 2007-11-08 |
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