CN109755188A - 封装结构及其制造方法 - Google Patents

封装结构及其制造方法 Download PDF

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Publication number
CN109755188A
CN109755188A CN201810018345.8A CN201810018345A CN109755188A CN 109755188 A CN109755188 A CN 109755188A CN 201810018345 A CN201810018345 A CN 201810018345A CN 109755188 A CN109755188 A CN 109755188A
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CN
China
Prior art keywords
layer
tube core
encapsulating structure
hole
type
Prior art date
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Pending
Application number
CN201810018345.8A
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English (en)
Inventor
许峯诚
陈硕懋
郑心圃
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Application filed by Taiwan Semiconductor Manufacturing Co TSMC Ltd filed Critical Taiwan Semiconductor Manufacturing Co TSMC Ltd
Publication of CN109755188A publication Critical patent/CN109755188A/zh
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    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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Abstract

提供一种封装结构及其制造方法。所述封装结构包括管芯、包封体、重布线层结构及保护层。管芯包括彼此相对的第一表面与第二表面。包封体位于管芯侧边。重布线层结构通过多个导电凸块与管芯电性连接。重布线层结构位于管芯的第二表面及包封体下方。保护层位于管芯的第一表面及包封体之上。保护层用于控制封装结构的翘曲。

Description

封装结构及其制造方法
技术领域
本揭露涉及一种封装结构及其制造方法。
背景技术
随着各种电子组件(例如，晶体管、二极管、电阻器、电容器等)的集成密度的持续提高，半导体行业已经历快速发展。在很大程度上，集成密度的此种提高来自于最小特征尺寸(minimum feature size)的持续减小，此使得更多较小的组件能够集成到给定区域中。这些较小的电子组件也需要与先前的封装相比利用较小区域的较小封装。用于半导体组件的一些较小类型的封装包括四面扁平封装(quad flat package，QFP)、引脚阵列(pin gridarray，PGA)封装、球阵列(ball grid array，BGA)封装、倒装芯片(flip chip，FC)、三维集成电路(three-dimensional integrated circuit，3DIC)、晶片级封装(wafer levelpackage，WLP)及叠层封装(package on package，PoP)装置等。
当前，集成扇出型封装因其紧密度而正变得日渐流行。
揭露内容
根据本揭露的一些实施例，提供一种封装结构，所述封装结构包括管芯、包封体、重布线层结构及保护层。管芯包括彼此相对的第一表面与第二表面。包封体位于管芯侧边。重布线层结构通过多个导电凸块与管芯电性连接。重布线层结构位于管芯的第二表面及包封体下方。保护层位于管芯的第一表面及包封体之上。保护层用于控制封装结构的翘曲。
根据本揭露的一些实施例，提供一种封装结构，所述封装结构包括管芯、集成扇出型通孔、包封体、重布线层结构、保护层及顶盖。集成扇出型通孔位于管芯侧边。包封体包封集成扇出型通孔的侧壁及管芯的侧壁。重布线层结构通过多个导电凸块与管芯电性连接。保护层位于包封体、集成扇出型通孔及管芯之上。顶盖位于集成扇出型通孔上，覆盖集成扇出型通孔的部分顶表面。保护层用于控制封装结构的翘曲。
根据本揭露的一些实施例，提供一种制造封装结构的方法。将管芯通过多个导电凸块连接至重布线层结构。形成包封体以至少包封管芯的侧壁。在包封体及管芯之上形成保护层，以控制封装结构的翘曲。
附图说明
图1A至图1F是示出根据本揭露第一实施例的制造封装结构的方法的示意性剖视图。
图2A至图2B是示出根据本揭露一些实施例的制造封装结构的方法的示意性剖视图。
图3A至图3H是示出根据本揭露第二实施例的制造封装结构的方法的示意性剖视图。
图4A至图4C是示出根据本揭露一些实施例的制造封装结构的方法的示意性剖视图。
图5A至图5B是示出根据本揭露第三实施例的制造封装结构的方法的示意性剖视图。
图6A至图6D是示出根据本揭露第四实施例的制造封装结构的方法的示意性剖视图。
图7及图8分别示出根据本揭露一些实施例的叠层封装装置。
[符号的说明]
10：载板
11：剥离层
12：重布线层结构
13：衬底
14、25：接垫
15：钝化层
16、23、62、62a、65、67：连接件
17：管芯
17a：第一表面
17b：第二表面/有源表面
18、26：导电凸块
19、27、63：底部填充胶层
20、20a：包封体
21、121：保护层
24、66：集成无源装置
28、28a、28b、28c：集成扇出型通孔
29：开口
30：顶盖
31：表面
32：粘合层
50a、50b、50c、50d、50e、50f、60、64：封装结构
61：封装本体
70a、70b、70c、70d、70e：叠层封装装置
PM1、PM2、PM3、PM4：聚合物层
RDL1、RDL1a、RDL1b、RDL2、RDL3、RDL4、RDL4a、RDL4b：重布线层
T：迹线
T1、T2：厚度
V：通孔
W1、W2、W3、W10、W20：宽度
θ：底角
具体实施方式
以下公开内容提供用于实现所提供主题的不同特征的许多不同的实施例或实例。以下阐述组件及配置的具体实例以简化本揭露。当然，这些仅为实例而非用以限制。举例来说，以下说明中将第二特征形成于第一特征“之上”或第一特征“上”可包括第二特征及第一特征被形成为直接接触的实施例，且也可包括第二特征与第一特征之间可形成有附加特征而使得所述第二特征与所述第一特征可能不直接接触的实施例。另外，本公开内容可能在各种实例中重复使用元件符号及/或字母。这种重复是出于简洁及清楚的目的，而不表示所论述的各种实施例及/或配置本身之间的关系。
此外，为易于说明，本文中可能使用例如“之下(beneath)”、“下面(below)”、“下部的(lower)”、“位于……上(on)”、“上方(above)”、“上部的(upper)”等空间相对性用语来阐述图中所示的一个元件或特征与另一(其他)元件或特征的关系。除了附图中所绘示的定向之外，所述空间相对性用语意欲涵盖元件在使用或操作中的不同定向。设备可具有其他定向(旋转90度或其他定向)，且本文中所使用的空间相对性描述语可同样相应地进行解释。
以下揭露也可包括其他特征及工艺。举例来说，可包括测试结构，以对三维封装(3D packaging)或三维集成电路装置进行验证测试。所述测试结构可包括例如在重布线层中或在衬底上形成的测试接垫(test pad)，所述测试接垫能够测试三维封装或三维集成电路、使用探针及/或探针卡(probe card)等。可对中间结构以及最终结构执行验证测试。另外，本文中所公开的结构及方法可与包括对已知良好管芯(known good die)进行中间验证的测试方法结合使用，以提高良率(yield)并降低成本。
图1A至图1F是示出根据本揭露第一实施例的制造封装结构的方法的示意性剖视图。
参照图1A，提供载板10。载板10可为玻璃载板、陶瓷载板或类似载板。以例如是旋转涂布方法(spin coating method)在载板10上形成剥离层(de-bonding layer)11。在一些实施例中，剥离层11可由例如紫外(Ultra-Violet，UV)胶、光热转换(Light-to-HeatConversion，LTHC)胶等粘合剂或者其他类型的粘合剂形成。剥离层11能够在光热作用下分解，以使载板10从将在后续步骤中形成的上覆结构脱离。
在载板10及剥离层11之上形成重布线层(redistribution layer，RDL)结构12。在一些实施例中，重布线层结构12包括交替堆叠的多个聚合物层PM1、PM2、PM3及PM4与多个重布线层RDL1、RDL2、RDL3及RDL4。聚合物层或重布线层的数目在本揭露中不受限制。在一些实施例中，重布线层结构12包括至少三层重布线层。在一些实施例中，重布线层结构12不含有衬底。
在一些实施例中，重布线层RDL1穿透聚合物层PM1，且重布线层RDL1的底表面与聚合物层PM1的底表面彼此实质上齐平，且与剥离层11接触。重布线层RDL2穿透聚合物层PM2，与重布线层RDL1电性连接。重布线层RDL3穿透聚合物层PM3，与重布线层RDL2电性连接。重布线层RDL4穿透聚合物层PM4，与重布线层RDL3电性连接。
在一些实施例中，重布线层RDL4也被称作接垫(pad)，且重布线层RDL4位于用于在后续工艺中与管芯连接的区域中。在一些实施例中，重布线层RDL4从聚合物层PM4的顶表面突出而暴露出来，也就是说，重布线层RDL4的顶表面高于聚合物层PM4的顶表面，但本揭露并非仅限于此。在另一些实施例中，重布线层RDL4的顶表面可与聚合物层PM4的顶表面实质上齐平。
在一些实施例中，重布线层RDL1、RDL2、RDL3及RDL4分别包括彼此连接的多个通孔V与多条迹线(trace)T。通孔V穿透聚合物层PM1、PM2、PM3及PM4，以连接重布线层RDL1、RDL2、RDL3及RDL4的迹线T。迹线T分别位于聚合物层PM1、PM2、PM3及PM4上，且分别在聚合物层PM1、PM2、PM3及PM4的顶表面上延伸。
参照图1A中的通孔V及迹线T的放大图，在一些实施例中，通孔V的横截面形状为倒梯形，但本揭露并非仅限于此。在一些实施例中，通孔V的底角θ为钝角，且通孔V的顶表面的宽度W20大于通孔V的底表面的宽度W10。在一些实施例中，通孔V的顶表面的面积大于通孔V的底表面的面积。在另一些实施例中，通孔V的横截面形状可为正方形或矩形，且通孔V的底角θ为直角。
在一些实施例中，聚合物层PM1、PM2、PM3及PM4分别包含感光性材料。感光性材料例如是聚苯并恶唑(polybenzoxazole，PBO)、聚酰亚胺(polyimide，PI)、苯并环丁烯(benzocyclobutene，BCB)、其组合或其类似物。聚合物层PM1、PM2、PM3及PM4的形成方法例如是包括旋转涂布、化学气相沉积(chemical vapor deposition，CVD)、等离子体增强型化学气相沉积(plasma-enhanced chemical vapor deposition，PECVD)、叠层(lamination)或类似的适合的制作技术。在一些实施例中，重布线层RDL1、RDL2、RDL3及RDL4分别包含导电材料。所述导电材料包括金属，例如是铜、镍、钛、其组合或其类似物，且是通过电镀工艺(electroplating process)形成。在一些实施例中，重布线层RDL1、RDL2、RDL3及RDL4分别包括晶种层(图中未示出)及形成于所述晶种层上的金属层(图中未示出)。晶种层可为金属晶种层，例如铜晶种层。在一些实施例中，晶种层包括第一金属层(例如钛层)及位于所述第一金属层之上的第二金属层(例如铜层)。金属层可为铜或其他适合的金属。
参照图1B，在重布线层结构12之上放置管芯17，管芯17与重布线层结构12电性连接。具体来说，管芯17通过多个导电凸块18与重布线层结构12的重布线层RDL4连接。管芯17可为专用集成电路(application-specific integrated circuit，ASIC)芯片、模拟芯片(analog chip)、传感器芯片(sensor chip)、无线射频芯片(wireless and radiofrequency chip)、电压调节器芯片(voltage regulator chip)或存储器芯片(memorychip)。图1B中所示管芯17的数目仅用于示例说明，且本揭露并非仅限于此。在一些实施例中，可将两个或更多个管芯17安装到重布线层结构12上，且所述两个或更多个管芯17可为相同类型的管芯或不同类型的管芯。
在一些实施例中，管芯17包括衬底13、多个接垫14、钝化层(passivation layer)15及多个连接件16。接垫14可为内连线结构(图中未示出)的一部份，且电性连接到管芯17的集成电路装置(图中未示出)。钝化层15覆盖接垫14的一部分。钝化层15包含绝缘材料，例如氧化硅、氮化硅、聚合物或其组合。接垫14的一部分被钝化层15暴露出来，且用作管芯17的外部连接(external connection)。连接件16与未被钝化层15覆盖的接垫14接触并电性连接。连接件16包括焊料凸块、金凸块、铜凸块、铜杆(copper post)、铜柱(copper pillar)或其类似物。
管芯17具有彼此相对的第一表面17a(即，顶表面)与第二表面17b(即，底表面)。在一些实施例中，第一表面17a为衬底13的远离连接件16的表面。第二表面17b为管芯17的有源表面17b，其面对重布线层结构12的顶表面。在一些实施例中，第二表面17b包括连接件16的部分表面及钝化层15的部分表面。也就是说，重布线层结构12位于管芯17的前侧(靠近连接件16的一侧)。在一些实施例中，重布线层结构12的通孔V的顶表面比通孔V的底表面相对更靠近管芯17的第二表面17b，重布线层结构12的通孔V的底表面比通孔V的顶表面相对更远离管芯17的第二表面17b。换句话说，在一些实施例中，通孔V的具有较大面积的顶表面比通孔V的底表面相对更靠近管芯17的有源表面17b。
仍然参照图1B，导电凸块18位于管芯17的连接件16与重布线层结构12的重布线层RDL4之间。在一些实施例中，导电凸块18还覆盖连接件16的部分侧壁及重布线层RDL4的部分侧壁。在一些实施例中，导电凸块18为焊料凸块、银球、铜球或任何其他适合的金属球。在一些实施例中，可将助焊剂(soldering flux)(图中未示出)涂覆到导电凸块18上以得到更好的粘合。在一些实施例中，在将管芯17连接到重布线层结构12之后，形成底部填充胶层(underfill layer)19，以填充于管芯17与重布线层结构12之间，从而覆盖管芯17的有源表面17b以及聚合物层PM4的部分顶表面，且底部填充胶层19环绕连接件16、导电凸块18及重布线层RDL4。在一些实施例中，底部填充胶层19还覆盖管芯17的部分侧壁。在一些实施例中，底部填充胶层19包含聚合物，例如环氧树脂(epoxy)。
参照图1C，接着在重布线层结构12上形成包封体(encapsulant)20，以包封管芯17的侧壁、管芯17的第一表面17a及底部填充胶层19的侧壁。在一些实施例中，包封体20包含模塑化合物、模塑底部填充胶、树脂(例如环氧树脂)、其组合或其类似物。在另一些实施例中，包封体20包含可轻易地通过曝光及显影工艺(exposure and development process)或激光钻孔工艺(laser drilling process)来图案化的感光性材料，例如聚苯并恶唑、聚酰亚胺、苯并环丁烯、其组合或其类似物。在替代性实施例中，包封体20包含：氮化物(例如氮化硅)、氧化物(例如氧化硅)、磷硅酸盐玻璃(phosphosilicate glass，PSG)、硼硅酸盐玻璃(borosilicate glass，BSG)、掺杂硼的磷硅酸盐玻璃(boron-doped phosphosilicateglass，BPSG)、其组合或其类似物。包封体20例如是通过旋转涂布、叠层、沉积、或相似的工艺等适合的制作技术形成。在一些实施例中，包封体20的顶表面高于管芯17的第一表面17a或位于管芯17的第一表面17a之上，使得管芯17的第一表面17a被包封体20包封。然而，本揭露并非仅限于此。
参照图1D，在一些实施例中，接着在管芯17及包封体20之上形成保护层(protection layer)21。换句话说，保护层21是形成在管芯17背侧(与前侧相对)的背侧膜。在一些实施例中，保护层21完全覆盖包封体20的顶表面。在一些实施例中，保护层21被称作翘曲控制层(warpage control layer)，且优选地向其下伏结构(即，位于其下方的结构)提供足够程度的刚性(rigidity)以控制其下伏结构的翘曲。保护层21可包括单层结构或多层结构。在一些实施例中，保护层21包含无机材料、有机材料或其组合。无机材料包括氮化硅、低温氮化物(例如氮化铝、氮化镓、氮化铝镓(aluminum gallium nitride))或其组合。有机材料包括聚合物，例如聚苯并恶唑、聚酰亚胺、苯并环丁烯、味之素堆积膜(ajinomotobuildup film，ABF)、阻焊膜(solder resist film，SR)、其类似物或其组合。然而，本揭露并非仅限于此，保护层21可包含任意种类的材料，只要所述材料向其下伏结构提供抵抗翘曲及扭曲(twisting)的足够程度的刚性即可。保护层21例如是通过适合的制作技术形成，例如旋转涂布、叠层、化学气相沉积(CVD)、等离子体增强型化学气相沉积(PECVD)或类似工艺。在一些实施例中，保护层21的厚度T1的范围为5微米(μm)至100μm。
参照图1E，将剥离层11在光热作用下分解，且接着将载板10从其上覆结构脱离。在一些实施例中，在载板10脱离之前，将框架胶带(frame tape)(图中未示出)贴合到保护层21，且在载板10脱离之后移除所述框架胶带。之后，重布线层RDL1暴露出来，以在后续工艺中用于电性连接。在一些实施例中，重布线层RDL1包括重布线层RDL1a及重布线层RDL1b。重布线层RDL1a也被称作球下金属(under-ball metallurgy，UBM)层，所述球下金属层用于植球。重布线层RDL1b可为在后续工艺中用以与集成无源装置(integrated passive device，IPD)24连接的微凸块(micro bump)。
参照图1E及图1F，在重布线层结构12的重布线层RDL1a上形成多个连接件23，所述多个连接件23与重布线层结构12的重布线层RDL1a电性连接。在一些实施例中，连接件23被称作导电端子。在一些实施例中，连接件23例如是焊料球(solder ball)或球阵列(BGA)球。在一些实施例中，连接件23的材料包括铜、铝、无铅合金(例如，金合金、锡合金、银合金、铝合金或铜合金)或铅合金(例如，铅-锡合金)。在一些实施例中，连接件23通过植球工艺放置在重布线层RDL1a上。
仍然参照图1F，在一些实施例中，将包括多个接垫25的集成无源装置(IPD)24通过位于集成无源装置24与重布线层RDL1b之间的多个导电凸块26电性连接至重布线层RDL1b。集成无源装置24可为电容器、电阻器、电感器、其类似物或其组合。集成无源装置24可被选择性地连接到重布线层结构12，且集成无源装置24的数目并非仅限于图1F中所示的数目，而是可根据产品的设计来进行调整。形成底部填充胶层27，填充于集成无源装置24与重布线层结构12之间。底部填充胶层27覆盖集成无源装置24的部分表面及重布线层结构12的部分底表面，且环绕集成无源装置24的接垫25以及导电凸块26。底部填充胶层27的材料与底部填充胶层19的材料相似，在此不再赘述。
仍然参照图1F，至此，封装结构50a即已完成。封装结构50a包括管芯17、包封体20、重布线层结构12、连接件23、集成无源装置24及保护层21。连接件23及集成无源装置24通过重布线层结构12与管芯17电性连接。保护层21被形成用于控制封装结构50a的翘曲，也就是说，保护层21向封装结构50a提供抵抗翘曲及扭曲的足够程度的刚性。此后，封装结构50a可通过连接件23连接到其他封装组件，例如印刷电路板(printed circuit board，PCB)、挠性印刷电路板(flex PCB)或其类似物。
在封装结构50a中，包封体20包封管芯17的侧壁及第一表面17a。然而，本揭露并非仅限于此。
参照图2A，执行与图1A至图1C所示工艺相似的工艺，在一些实施例中，在如图1C中所示形成包封体20之后，执行研磨或抛光工艺(例如化学机械抛光(chemical mechanicalpolishing，CMP)工艺)，以移除部分包封体20，使得管芯17的第一表面17a暴露出来，并形成包封管芯17的侧壁的包封体20a。在一些实施例中，包封体20a的顶表面与管芯17的第一表面17a实质上共面。
参照图2B，在形成包封体20a之后，随后执行与图1D至图1F所示工艺相似的工艺，以形成封装结构50b。封装结构50b与封装结构50a的不同之处在于包封体20a的顶表面与管芯17的第一表面17a实质上齐平，且保护层21与包封体20a的顶表面及管芯17的第一表面17a接触。在一些实施例中，保护层21完全覆盖包封体20a的顶表面及管芯17的第一表面17a。封装结构50b的其他结构特性与封装结构50a的结构特性相似，于此不再赘述。
图3A至图3H是示出根据本揭露第二实施例的制造封装结构的方法的示意性剖视图。第二实施例与第一实施例的不同之处在于在管芯17侧边形成多个集成扇出型通孔(through integrated fan-out via，TIV)28。
参照图3A，与图2A及图2B所示工艺相似，在载板10之上形成包括聚合物层PM1、PM2、PM3、PM4及重布线层RDL1、RDL2、RDL3、RDL4的重布线层结构12。在一些实施例中，重布线层RDL4包括重布线层RDL4a及重布线层RDL4b。重布线层RDL4b位于重布线层RDL4a侧边，环绕重布线层RDL4a。在重布线层RDL4a上放置管芯17，管芯17通过多个导电凸块18与重布线层RDL4a电性连接。形成底部填充胶层19，填充于管芯17与重布线层结构12之间。管芯17、重布线层结构12、导电凸块18及底部填充胶层19的结构特性与第一实施例中的结构特性相似，于此不再赘述。
在重布线层RDL4b上形成多个集成扇出型通孔28，所述多个集成扇出型通孔28与重布线层RDL4b电性连接。在一些实施例中，集成扇出型通孔28包含铜、镍、焊料、其合金或其类似物。在一些实施例中，集成扇出型通孔28包括晶种层及形成在所述晶种层上的导电层(图中未示出)。所述晶种层例如为钛或/及铜复合层。所述导电层例如为铜层。集成扇出型通孔28的示例性形成方法包括在载板10之上形成光致抗蚀剂层(photoresist layer)(例如干膜抗蚀剂(dry film resist))。之后，在光致抗蚀剂层中形成开口，所述开口暴露出重布线层RDL4b的部分顶表面，接着通过电镀在所述开口中形成集成扇出型通孔28。在另一些实施例中，集成扇出型通孔28还包括位于晶种层下方的阻挡层(barrier layer)(图中未示出)，以防止金属扩散。举例来说，阻挡层的材料包括金属氮化物，例如氮化钛、氮化钽或其组合。
仍然参照图3A，管芯17位于集成扇出型通孔28之间，被集成扇出型通孔28环绕，也就是说，集成扇出型通孔28位于管芯17侧边或环绕管芯17。在一些实施例中，集成扇出型通孔28的顶表面高于管芯17的第一表面17a，但本揭露并非仅限于此。在另一些实施例中，集成扇出型通孔28的顶表面与管芯17的第一表面17a实质上齐平。
参照图3B，在重布线层结构12之上形成包封体20，以包封集成扇出型通孔28的侧壁、重布线层RDL4b的侧壁以及部分表面、底部填充胶层19的侧壁、管芯17的侧壁及第一表面17a。包封体20的材料与第一实施例中包封体20的材料相似。包封体20可通过以下方式形成：在载板10之上形成包封材料层，包封材料层包封管芯17的顶表面及侧壁以及集成扇出型通孔28的顶表面及侧壁。之后，执行研磨或抛光工艺，以移除部分包封材料层，使得集成扇出型通孔28的顶表面暴露出来。在一些实施例中，集成扇出型通孔28的顶表面与包封体20的顶表面实质上共面，且高于管芯17的第一表面17a或位于管芯17的第一表面17a之上，但本揭露并非仅限于此。
参照图3B及图3C，接着在管芯17、包封体20及集成扇出型通孔28之上形成保护层21。在一些实施例中，保护层21被称作翘曲控制层。保护层21的材料及形成方法与第一实施例中保护层21的材料及形成方法相似。
参照图3C及图3D，移除部分保护层21，以形成多个开口29。移除方法包括曝光及显影工艺、激光钻孔工艺、光刻及刻蚀工艺或其组合。开口29穿透保护层21，以暴露出集成扇出型通孔28的部分顶表面。开口29也被称作凹槽(recess)。
仍然参照图3D，之后，在开口29中及集成扇出型通孔28上形成多个顶盖(cap)30。在一些实施例中，顶盖30被形成以用于保护集成扇出型通孔28免受氧化或污染。顶盖30包含金属、有机材料或其组合。在一些实施例中，顶盖30包含焊料、焊料膏粘合剂(solderpaste adhesive)或其组合，顶盖30可通过在开口29中滴入焊料球并接着执行回焊工艺(reflow process)来形成。在另一些实施例中，顶盖30包含有机材料，例如有机可焊性保护剂(organic solderability preservative，OSP)，且顶盖30被称作有机可焊性保护剂层，例如铜有机可焊性保护剂层。在一些实施例中，有机可焊性保护剂层包含苯并三唑、苯并咪唑、其组合或其衍生物。在一些实施例中，有机可焊性保护剂层是通过涂布(coating)形成，且有机可焊性保护剂涂层是通过以下方式来涂覆：将开口29中暴露出的集成扇出型通孔28的表面浸没在有机可焊性保护剂溶液中，或者将有机可焊性保护剂溶液喷涂在开口29中暴露出的集成扇出型通孔28的表面上。有机可焊性保护剂溶液可含有烷基咪唑(alkylimidazole)、苯并三唑、松香(rosin)、松香酯或苯并咪唑化合物。或者，有机可焊性保护剂涂层是由苯基咪唑(phenylimidazole)或包含2-芳基咪唑(2-arylimidazole)作为活性成分的其他咪唑化合物制成。
在一些实施例中，顶盖30被形成在开口29内，且顶盖30的顶表面低于保护层21的顶表面，但本揭露并非仅限于此。在另一些实施例中，顶盖30可填满开口29并从保护层21的顶表面突出。顶盖30的横截面形状可为倒梯形、具有弧形底边(arced base)的倒梯形、正方形、矩形、半圆形或任何其他形状，只要顶盖30覆盖集成扇出型通孔28以保护集成扇出型通孔28免受氧化即可。
参照图3E及图3F，执行与图1E及图1F相似的工艺，以形成封装结构50c。使剥离层11在光热作用下分解，且接着将载板10从其上覆结构脱离。之后，在重布线层结构12的重布线层RDL1a上形成多个连接件23，所述多个连接件23与重布线层结构12的重布线层RDL1a电性连接。集成无源装置24通过多个导电凸块26与重布线层RDL1b电性连接。
参照图3F，至此，封装结构50c即已完成。封装结构50c包括管芯17、包封体20、集成扇出型通孔28、重布线层结构12、连接件23、集成无源装置24及保护层21。保护层21覆盖并接触包封体20的顶表面及集成扇出型通孔28的部分顶表面。保护层21具有暴露出集成扇出型通孔28的多个开口29，且在开口29中具有多个顶盖30，以保护集成扇出型通孔28免受氧化或污染。也就是说，集成扇出型通孔28的部分顶表面被保护层21覆盖，集成扇出型通孔28的另一部分顶表面被顶盖30覆盖。
参照图3G及图3H，在一些实施例中，封装结构50c进一步连接至封装结构60，以形成叠层封装(PoP)装置70a。
参照图3G，提供封装结构60。根据叠层封装装置70a的功能性需求，封装结构60可为任意种类的封装结构。在一些实施例中，封装结构60包括封装本体61及与封装本体61连接的多个连接件62。在一些实施例中，连接件62被称作导电端子。连接件62的材料及形成方法与封装结构50c的连接件23的材料及形成方法相似。在一些实施例中，连接件62位于与封装结构50c的开口29的位置对应的位置处。
参照图3G及图3H，至少对连接件62执行回焊工艺，从而形成连接件62a，以连接封装结构50c与封装结构60。连接件62a与集成扇出型通孔28电性接触。在一些顶盖30是由焊料、焊料膏粘合剂或其组合形成的实施例中，在回焊工艺期间顶盖30熔化并与连接件62熔融在一起，也就是说，连接件62a是由连接件62及顶盖30形成。在一些顶盖30为有机可焊性保护剂层的实施例中，在执行回焊工艺之前，执行清洁工艺(cleaning process)以移除顶盖30，也就是说，连接件62a是由连接件62形成。
参照图3H，在一些实施例中，还形成底部填充胶层63，填充于封装结构50c与封装结构60之间，并环绕连接件62a。至此，包含封装结构50c及封装结构60的叠层封装装置70a即已完成，封装结构50c与封装结构60通过连接件62a进行连接。如图3H中所示的叠层封装装置70a仅用于示例说明，且本揭露并非仅限于此。
参照图3B、图4A及图4B，在另一些实施例中，在如图3B所示形成包封体20之后，执行研磨或抛光工艺，使得集成扇出型通孔28的顶表面及管芯17的第一表面17a暴露出来，并形成包封体20a。在一些集成扇出型通孔28被形成为具有比管芯17的第一表面17a高的顶表面的实施例中，部分包封体20及部分集成扇出型通孔28在研磨或抛光工艺中被移除。在一些集成扇出型通孔28被形成为具有与管芯17的第一表面17a实质上齐平的顶表面的实施例中，部分包封体20在研磨或抛光工艺期间被移除。在一些实施例中，集成扇出型通孔28的顶表面、包封体20a的顶表面及管芯17的第一表面17a彼此实质上共面。换句话说，保护层21与管芯17的第一表面17a、集成扇出型通孔28的顶表面及包封体20a的顶表面接触。在一些实施例中，保护层21完全覆盖管芯17的第一表面17a、集成扇出型通孔28的顶表面及包封体20a的顶表面。
参照图4B，接着执行与图3C至图3F所示工艺相似的工艺，以形成封装结构50d。
参照图3F及图4B，封装结构50d与封装结构50c的不同之处在于集成扇出型通孔28的顶表面、包封体20a的顶表面及管芯17的第一表面17a彼此共面，且保护层21与管芯17的第一表面17a接触。封装结构50d的其他结构特性与封装结构50c的结构特性相似。类似地，封装结构50d还可连接到其他封装结构以形成叠层封装装置。
参照图4B及图4C，执行与图3G至图3H所示工艺相似的工艺，使得封装结构50d与封装结构60连接，以形成叠层封装装置70b。
图5A至图5B是示出根据本揭露第三实施例的制造封装结构的方法的示意性剖视图。第三实施例与前述实施例的不同之处在于在管芯17的背侧形成保护层121。在一些实施例中，保护层121充当翘曲控制层及散热体(heat spreader)。
参照图2A及图5A，在一些实施例中，在管芯17侧边形成包封体20a之后，包封体20a的顶表面与管芯17的第一表面17a形成表面31。将保护层121通过粘合层32贴合到表面31。粘合层32与管芯17及包封体20a接触。在一些实施例中，保护层121为板材(plate)或片材(sheet)，作为用于防止或减少下伏结构翘曲的翘曲控制层，以及作为将热量从管芯17传导出的散热体。在一些实施例中，粘合层32也可有助于将热量从管芯17传导出。
保护层121可包含单一材料或复合材料，且可为单层结构或多层结构。在一些实施例中，保护层121包含导热材料，且导热率(thermal conductivity)大于管芯17及包封体20a的导热率。在一些实施例中，保护层121包含导电材料且是浮置(floating)的，也就是说，保护层121不与任何其他层电性连接。在一些实施例中，保护层121包含刚性金属(例如，铜、钢或其组合)、陶瓷材料、含硅材料、金刚石或其组合。在一些实施例中，保护层121为铜层、钢层或金刚石膜。在另一些实施例中，保护层121包含由基质材料(matrix material)及填料(filler)构成的复合材料。在一些实施例中，基质材料包括石墨、石墨烯、聚合物或其组合。填料包括金刚石、氧化物(例如氧化铝或氧化硅)、碳化物(例如碳化硅)或其组合。然而，保护层121的材料并不仅限于上述材料，保护层121可包含任何材料，只要保护层121优选地提供足够程度的刚性以防止或减少其下伏结构的翘曲，且可有效地将热量从管芯17传导出即可。
在一些实施例中，粘合层32包括管芯贴合膜(die attach film，DAF)、热界面材料(thermal interface material，TIM)或其组合。在一些实施例中，粘合层32的材料也为导热的，且其导热率大于管芯17及包封体20a的导热率。在一些实施例中，粘合层32的导热率与保护层121的导热率可相同或不同。在一些实施例中，粘合层32的导热率可大于或小于保护层121的导热率。
仍然参照图5A，在一些实施例中，保护层121的厚度T2的范围为30μm至400μm。保护层121的厚度T2取决于保护层121的材料。在一些保护层121为金刚石膜的实施例中，保护层121的厚度T2可小于30μm。在一些实施例中，保护层121的宽度W1实质上与表面31的宽度W2相同。管芯17的第一表面17a及包封体20a的顶表面被保护层121覆盖。在一些实施例中，管芯17的第一表面17a及包封体20a的顶表面被保护层121完全覆盖。在另一些实施例中，保护层121的宽度W1小于表面31的宽度W2，且大于管芯17的宽度W3。也就是说，管芯17的第一表面17a以及包封体20a的部分顶表面被保护层121覆盖。在又一替代性实施例中，保护层121的宽度W1可实质上相同于或略小于管芯17的第一表面17a的宽度W3，以使管芯17的第一表面17a被保护层121覆盖或部分覆盖。也就是说，可调整保护层121的厚度T2及宽度W1，只要保护层121提供实现本揭露的目的所必需的性质即可。
参照图5A及图5B，之后，执行与图1E至图1F所示工艺相似的工艺，以使剥离层11在光热作用下分解，从而使载板10脱离。之后，将多个连接件23电性连接至重布线层结构12的重布线层RDL1a。集成无源装置24通过多个导电凸块26电性连接至重布线层RDL1b。
参照图5B，至此，封装结构50e即已完成。封装结构50e包括管芯17、包封体20a、重布线层结构12、连接件23、集成无源装置24及保护层121。在一些实施例中，保护层121用于控制封装结构50e的翘曲且用于对管芯17进行散热。封装结构50e的其他结构特性与封装结构50b的结构特性相似。
图6A至图6D是示出根据本揭露第四实施例的制造封装结构的方法的示意性剖视图。第四实施例与第三实施例的不同之处在于在管芯17侧边形成多个集成扇出型通孔28。
参照图6A，在管芯17侧边形成集成扇出型通孔28及包封体20a(如图4A中所示)之后，将保护层121通过粘合层32贴合至管芯17及包封体20a。在一些实施例中，保护层121覆盖管芯17的第一表面17a以及包封体20a的部分顶表面。集成扇出型通孔28不被保护层121覆盖，而暴露出来。在另一些实施例中，保护层121仅覆盖或部分覆盖管芯17的第一表面17a，且不覆盖包封体20a的顶表面及集成扇出型通孔28。保护层121的材料及粘合层32的材料与第三实施例中的保护层的材料及粘合层的材料实质上相同。
参照图6A及图6B，在集成扇出型通孔28上形成多个顶盖30，以至少覆盖集成扇出型通孔28的顶表面。在一些实施例中，集成扇出型通孔28的顶表面被顶盖30完全覆盖。在一些实施例中，集成扇出型通孔28的顶表面以及包封体20a的部分顶表面被顶盖30覆盖。顶盖30的材料、形成方法及性质与第二实施例的顶盖的材料、形成方法及性质相似。在一些实施例中，顶盖30的横截面形状可为半圆形、弧形、正方形、矩形、梯形或其组合。顶盖30可为任何形状，只要集成扇出型通孔28被覆盖保护，而免受氧化或污染即可。
仍然参照图6A及图6B，通过使剥离层11在光热作用下分解而将载板10脱离。之后，将多个连接件23电性连接至重布线层结构12的重布线层RDL1a。将集成无源装置24通过多个导电凸块26电性连接至重布线层RDL1b。
参照图6B，至此，封装结构50f即已完成。封装结构50f包括管芯17、包封体20a、集成扇出型通孔28、重布线层结构12、连接件23、集成无源装置24及保护层121。集成扇出型通孔28被顶盖30覆盖。在一些实施例中，集成扇出型通孔28被覆盖保护，以防止氧化或污染。在一些实施例中，保护层121用于控制封装结构50f的翘曲以及对管芯17进行散热。封装结构50f可进一步耦合至其他封装结构，以形成叠层封装装置。
参照图6C及图6D，在一些实施例中，提供封装结构60，其包括封装本体61及多个连接件62，接着执行回焊工艺，以形成连接件62a，连接封装结构50f与封装结构60。与第二实施例相似，连接件62a可由连接件62形成或由连接件62及顶盖30形成，连接件62a的形成方法与如图3G至图3H中所示第二实施例的连接件的形成方法相似。
之后，形成底部填充胶层63，填充于封装结构50f与封装结构60之间。至此，叠层封装装置70c即已完成。
在第二实施例及第四实施例中，如图3H、图4C及图6D中所示，封装结构50c、50d、50f与封装结构60连接，以形成叠层封装装置70a、70b、70c，然而，可耦合至封装结构50c、50d、50f的封装结构的数目并非仅限于此。在另一些实施例中，有多于一个的封装结构连接至封装结构50c、50d、50f，且集成无源装置也可耦合至封装结构50c、50d、50f。为简明起见，以封装结构50c为例。
参照图7，在一些实施例中，形成包括封装结构50c、封装结构60及封装结构64的叠层封装装置70d。封装结构50c包括多个集成扇出型通孔28。集成扇出型通孔28包括多个集成扇出型通孔28a及多个集成扇出型通孔28b。集成扇出型通孔28a位于管芯17侧边及周围。集成扇出型通孔28b位于集成扇出型通孔28a侧边，且与集成扇出型通孔28a相比相对更远离管芯17，也就是说，没有管芯被集成扇出型通孔28b环绕，但本揭露并非仅限于此。
仍然参照图7，封装结构60通过连接件62a电性耦合至封装结构50c。通过与如图3G至图3H所述方法相似的方法，将封装结构64通过连接件65电性耦合至封装结构50c。封装结构60及封装结构64可为相同类型或不同类型的封装结构。封装结构60连接至封装结构50c的集成扇出型通孔28a，封装结构64连接至封装结构50c的集成扇出型通孔28b。
参照图8，在一些实施例中，除封装结构60及封装结构64耦合至封装结构50c以外，还有集成无源装置66通过多个连接件67电性耦合至封装结构50c，至此，叠层封装装置70e即已完成。集成无源装置66可为电容器、电阻器、电感器、其类似物或其组合。在一些实施例中，集成扇出型通孔28包括位于集成扇出型通孔28a与集成扇出型通孔28b之间的多个集成扇出型通孔28c。封装结构60连接至集成扇出型通孔28a。在一些实施例中，封装结构64连接至集成扇出型通孔28b。集成无源装置66连接至集成扇出型通孔28c。集成无源装置66位于封装结构60与封装结构64之间，但本揭露并非仅限于此。
在本揭露中，在管芯的背侧形成保护层。在一些实施例中，保护层充当翘曲控制层以控制封装结构的翘曲。在一些实施例中，保护层还充当管芯的散热体。
根据本揭露的一些实施例，提供一种封装结构，所述封装结构包括管芯、包封体、重布线层结构及保护层。管芯包括彼此相对的第一表面与第二表面。包封体位于管芯侧边。重布线层结构通过多个导电凸块与管芯电性连接。重布线层结构位于管芯的第二表面及包封体下方。保护层位于管芯的第一表面及包封体之上。保护层用于控制封装结构的翘曲。
在上述封装结构中，管芯的第二表面是面对重布线层结构的有源表面。
在上述封装结构中，包封体的顶表面位于管芯的第一表面之上，且包封体包封管芯的侧壁。
在上述封装结构中，包封体的顶表面与管芯的第一表面实质上共面。
在上述封装结构中，保护层包含氮化硅、聚合物或其组合。
在上述封装结构中，还包括位于保护层与管芯之间的粘合层。
在上述封装结构中，保护层及粘合层至少覆盖管芯的部分第一表面，且粘合层与管芯的第一表面接触。
在上述封装结构中，保护层用作散热体。
在上述封装结构中，保护层包含铜、钢或包含基质材料及填料的复合材料。
根据本揭露的一些实施例，提供一种封装结构，所述封装结构包括管芯、集成扇出型通孔、包封体、重布线层结构、保护层及顶盖。集成扇出型通孔位于管芯侧边。包封体包封集成扇出型通孔的侧壁及管芯的侧壁。重布线层结构通过多个导电凸块与管芯电性连接。保护层位于包封体、集成扇出型通孔及管芯之上。顶盖位于集成扇出型通孔上，覆盖集成扇出型通孔的部分顶表面。保护层用于控制封装结构的翘曲。
在上述封装结构中，顶盖位于保护层的凹槽中，以覆盖在凹槽中暴露出的集成扇出型通孔的顶表面。
在上述封装结构中，包封体的顶表面、集成扇出型通孔的顶表面及管芯的顶表面彼此实质上共面。
在上述封装结构中，包封体还包封管芯的顶表面，且集成扇出型通孔的顶表面及包封体的顶表面位于管芯的顶表面之上。
在上述封装结构中，还包括位于保护层与管芯之间的粘合层，其中保护层至少覆盖管芯的部分第一表面，且保护层用作管芯的散热体。
在上述封装结构中，重布线层结构电性连接至另一封装结构，以形成叠层封装(PoP)装置，其中重布线层结构包括至少三个重布线层且不含有衬底。
根据本揭露的一些实施例，提供一种制造封装结构的方法。将管芯通过多个导电凸块连接至重布线层结构。形成包封体以至少包封管芯的侧壁。在包封体及管芯之上形成保护层，以控制封装结构的翘曲。
在上述制造封装结构的方法中，还包括在形成包封体之前，在管芯侧边形成集成扇出型通孔，其中包封体还包封集成扇出型通孔的侧壁。
在上述制造封装结构的方法中，还包括在集成扇出型通孔上形成顶盖，其中顶盖覆盖集成扇出型通孔的部分顶表面。
在上述制造封装结构的方法中，在形成顶盖之前，移除部分保护层，以形成凹槽，所述凹槽暴露出集成扇出型通孔的部分顶表面，且顶盖形成在凹槽中。
在上述制造封装结构的方法中，还包括将保护层通过粘合层贴合至管芯，其中集成扇出型通孔的顶表面及包封体的部分顶表面不被保护层覆盖。
以上概述了若干实施例的特征，以使本领域技术人员可更好地理解本揭露的各个方面。本领域技术人员应理解，其可容易地使用本揭露作为设计或修改其他工艺及结构的依据，来实现与本文中所介绍的实施例相同的目的及/或达到相同的优点。本领域技术人员还应理解，这些等效的配置并不悖离本揭露的精神及范畴，且本领域技术人员在不悖离本揭露的精神及范畴的情况下可对本文作出各种改变、置换及变更。

Claims (1)

1.一种封装结构，其特征在于，包括：
管芯，其中所述管芯包括彼此相对的第一表面与第二表面；
包封体，位于所述管芯侧边；
重布线层结构，通过多个导电凸块与所述管芯电性连接，其中所述重布线层结构位于所述管芯的所述第二表面及所述包封体下方；以及
保护层，位于所述管芯的所述第一表面及所述包封体之上，
其中所述保护层用于控制所述封装结构的翘曲。
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