CN100585843C - 带有集成无源元件的硅基封装结构 - Google Patents

带有集成无源元件的硅基封装结构 Download PDF

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CN100585843C
CN100585843C CN200710109609A CN200710109609A CN100585843C CN 100585843 C CN100585843 C CN 100585843C CN 200710109609 A CN200710109609 A CN 200710109609A CN 200710109609 A CN200710109609 A CN 200710109609A CN 100585843 C CN100585843 C CN 100585843C
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silicon based
package structure
based package
plug
antenna
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CN101118890A (zh
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尼尔斯·D.·霍维克
克里斯托弗·V.·贾尼斯
约翰·M.·库特
约翰·哈罗德·麦格莱恩
约翰·U.·尼克博克
奇拉格·S.·帕特尔
布赖恩·保罗·高谢尔
刘兑现
贾内斯·格兹布
尤尔里奇·R.·费弗
考内利亚·K.-I·曾
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Core Usa Second LLC
GlobalFoundries Inc
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Abstract

描述了一种装置,结合了具有用于天线结构的一部分的空腔和导体通孔的内插件,具有互连导线和用于在其上电气安装集成电路芯片的焊盘的顶端Si部件,其中顶端Si部件在电气上和机械上与内插件配合。内插件和顶端Si部件可以堆叠以提供一个功能单元的阵列。本发明克服了在信号频率从1至100GHz的Si封装内结合高效率天线和集成电路芯片的问题,克服了屏蔽邻近天线的元件的问题,并减少了由TCE失配产生的应变。

Description

带有集成无源元件的硅基封装结构
技术领域
本发明涉及硅基封装工艺,具体地说是针对高频应用,其中受保护的RFIC(射频集成电路,radio frequency integrated circuit)芯片、用于I/O信号的通孔、天线、及所需的RF无源元件(电阻、电容、电感、滤波器、开关等)都可以组合到一个模块中或者处于具有一个公共Si内插件(interposer)的阵列的同一位置。
背景技术
在无线电子工业微型化的持续趋势下,毫米波(mmWave)系统的性能、尺寸和成本经常受到所选的封装技术的制约。所选的封装方法必须既提供机械支持又对各种微波元件进行电气连接。关键元件包括RFIC芯片、高效天线、传输线、电容、电感、电阻、MEMS器件和各种类型的滤波器。RFIC芯片利用各种半导体技术来制造,例如Si、GaAs、CMOS或SiGe可以附着在封装内。
用于工作在1至100GHz的毫米波收发器应用的封装方法需要结合一个天线以完全实现无线电的功能。现在,将任何天线结构集成到一个合适的封装内的最大挑战是确保适当的天线效率。由于对天线性能的干扰,像Si这类的材料按照传统是要避免在高频条件下使用的,或者谨慎地将其用于高频条件下。传统上唯一的选择就是使用高复杂度和高成本的封装技术,或者昂贵的低温共烧陶瓷(low-temperatureco-fired ceramic,LTCC)衬底。最近有塑料封装可能成为低成本单芯片解决方案的报道,但是这种封装办法难以用于大批量生产。而且,用于波束导向的相控阵列和焦平面成像阵列需要大量的像素(每个像素由一个天线表示),它们要求毫米波RFIC芯片、RF无源元件和天线的低成本晶圆级集成。
人们已经提出了各种各样的生成所谓的封装系统(system-in-a-package,SiP)的方法,这些封装内系统包含某一给定RF应用所需的RFIC芯片、屏蔽和无源元件,其中最常用的方法是简单地将分立的器件组合到一个共同的衬底上。这就是人们公知的,单个封装的系统/子系统集成了一个或多个IC(或RFIC)和/或嵌入式无源元件的RF SiP。一些典型的应用包括收发器SiP、全无线电SiP、FEM(前端模块,Front End Module)、ASM(天线开关模块,AntennaSwitch Module)和PAM(功率放大器模块,Power Amplifier Module)。但是,这些应用中同样的问题是,独立的器件不是衬底固有的部分,因此它们必须被安装或连接到一个公共的衬底。这种方法与公知的多芯片模块(Multi-Chip module,MCM)非常相似,其中,若干IC芯片在一个定制的包含互连层的公共衬底上被连接在一起。
进一步,对多层薄膜MCM衬底的增强已经展示了将简单的RF无源元件,如电阻、电感和电容,嵌入到互连层的结合方式。这样的衬底于是可以进一步作为生成RFSiP的基本构件,其中有源器件(RFIC芯片)和分立的无源元件(PIN二极管,变容二极管等)可以附着并组装到表面,并通过导线或芯片倒装接合(flip-chip bonding)连接。J.A.C.Tilmans等人在Journal of Micromechanics andMicroengineering,13(2003)S139-S163中发表的文章“MEMS forwireless communication:‘from RF-MEMS component toRF-MEMS-SiP’”中描述了包括无源元件的RF-MEMS-SiP模块形式的封装。因此,作为一种封装技术平台,SiP在封装结构方面具有高度的灵活性,尤其是对于RF应用[3]。J.Wu等人2004年在Gaasmantech发表的文章“RF SiP Technology:Integration andInnovation”中描述了RF SiP封装。这些封装方法(Sip和MCM)最大的挑战就是附着在共同的承载衬底上的各种元件之间的热失配。第二,对于高频应用,有源电路与无源器件(例如天线)之间设置的物理距离极大地考验RF电路的优化。
为了在封装内集成天线同时保证适当的天线效率,2006年1月5日公布的美国专利No.20060001572描述了一种相对复杂的封装方法,这种方法使用芯片倒装法安装的天线结合印刷电路板工作。尽管这种方法展示了一种可能的自动化装配的途径,但这种封装方法不能利用大规模生产方法的低成本特性。进一步地,利用这种方法对元件的密封是有争议的,而不是现实可用的。
发明内容
本发明提供了一种用于生成硅基封装的方法,所述硅基封装带有用于I/O信号的通孔、无源元件和天线,并具有用于高频应用的被保护RFIC,这些部分都组合到一个单独模块中。这种封装方法也可以包含其他无源器件,例如RF-MEMS开关、电感、固定或可变电容,同时保证最小的占用面积(footprint)。对于可能需要受保护以免受环境损害的器件,在晶圆接合(bonding)过程中使用金属对金属的接合来实现对RFIC芯片和MEMS器件的密封。
本发明进一步提供一种包括内插件的装置,该内插件包含具有上和下表面的衬底,上表面具有至少一个用于形成天线结构的一部分的空腔,内插件包含从上表面到下表面的导电通孔,该导电通孔在下表面处适合用来与电信号源和电压源相耦合;顶端Si部件,具有位于下表面上的互连导线,并具有用于在其上电气安装集成电路芯片的第一焊盘,该顶部Si部件具有位于下表面上的第二焊盘,与位于内插件的上表面的多个导电通孔相配合,并且具有位于空腔上方的天线,用于在顶端Si部件与内插件配合时形成天线结构。
本发明还对采用了使用常规IC制造或表面微机械加工技术制造的RF无源元件和集成天线的毫米波系统提供了一种改进的封装。
本发明还提供了将RF无源元件从RFIC芯片传送到封装的多种选择,以便实现互连技术的灵活性。
本发明进一步提供了一种全Si方法,显著克服了在RFIC和所采用的封装材料之间典型存在的TCE失配问题。
附图的简要说明
通过下面结合附图对本发明所进行的详细描述,本发明的上述和其它特征、目的和优点将变得清楚,在附图中:
图1是完整的低配硅基封装剖面图,包含RFIC、集成MEMS发送/接收开关和天线。该附图没有按比例绘制。
图2是完整的硅基封装剖面图,包含RFIC、集成MEMS发送/接收开关和天线,其中RFIC芯片未包含在封装中。这种方法允许大功率RFIC器件通过外部的冷却方法冷却。该附图没有按比例绘制。
图3A是硅基封装剖面图,其中天线以上的区域/区用不同于Si的、具有所需特性的合适的材料回填。这将允许使用更厚的天线衬底,使得机械上更坚固。
图3B是硅基封装剖面图,其中天线以上的区域/区被合适的电介质材料回填,以在天线上生成一个透镜。
图4A是硅基封装剖面图,该封装带有一个具有所需几何形状的、用于转变传播天线信号方向角度的成形的反射器。
图4B是硅基封装剖面图,该封装具有一个用于聚焦天线传播信号的成形的天线反射器;
图5A是硅基封装剖面图,该封装具有一个侧馈(edge-launched)天线结构。这种方法不需要天线空腔底部的反射器。
图5B是图5A所示的侧馈天线结构的顶视图。
具体实施方式
在本发明的第一实施例中,将两个或更多用硅制造的部件,包括RFIC芯片、RFIC芯片空腔、天线空腔、通孔、天线和利用微机械加工技术制造的无源器件组合到一个封装中。然后将这些部件接合到一起,生成一个总括全部的硅基毫米波封装,如图1所示。该封装的下部由下列组成:内插件1,用Si制造,带有用于RFIC芯片21和天线结构22的蚀刻空腔,以及通孔3,用于外部I/O连接,如电源和控制电压等。为确保适当的天线效率和所需的性能,天线下面的空腔涂覆有金属41。涂覆于空腔底部的金属的作用是将天辐射反射回天线结构22,同时涂覆有金属的空腔壁42确保辐射信号不会传播到Si衬底1中,有效地减少了对其它有源元件的电磁辐射并改善天线结构22的效率。类似地,用于RFIC芯片的空腔21也可以涂覆金属43以利于屏蔽。根据应用目的,天线5系统可以使用简单至一对折叠偶极子,或复杂至相控天线阵列。对于印刷电路板的附着,通孔3结合C4或BGA焊盘31使用。内插件1的厚度为450至500微米。通孔3可以是环形的,包括Cu或W,其直径为125至175微米,优选150微米。金属涂层41和43可以是Cu。组合封装(内插件1和顶端Si部件6)和天线结构可以工作在1至100GHz频率范围内,优选的是30至100GHz。除了用于内插件1和顶端Si部件6的Si材料,也可以使用石英材料。
顶端Si部件6包含互连导线71-74、MEMS器件8、和内嵌的或制造在电介质12顶部的天线5。顶端Si部件可以是一片薄Si衬底,厚度为150至450微米。互连导线71-74和/或电介质12的厚度可以是5至10微米。互连导线71-74可以用与形成在芯片上的集成电路芯片导线或后段工艺(back of the line,BEOL)导线相同的方式制成。在大部分RF应用中,期望在顶端Si部件6中使用高阻Si以改善天线辐射并减少与耗散到导电Si层中的电磁辐射相关的损失。在接合两个Si部件1和6之前,使用常规的C4突块(bump)附着或使用微型突块10将RFIC芯片9芯片倒装接合到顶端部件。如有必要,对RFIC芯片9和MEMS器件8的组合密封可以通过使用由与用于接合焊盘32的金属相同的接合金属组成的密封环11实现,用于信号从通孔3到在顶端Si部件6上的焊盘71的传播。如果仅有MEMS器件8需要密封,举例来说,可以使用分离的接合或包括金锡的密封环111。
可以并排地复制图1来展示一个相接合的内插件和顶端Si部件的阵列,其中内插件1和顶端Si部件6贯穿整个阵列是公共的。这样该阵列具有多个空腔,用于形成多个天线结构、多个天线、多个集成电路芯片(RF-IC)和多个互连导线各自的部分。
在第二实施例中,如图2所示,RFIC芯片9没有嵌入Si内插件1的空腔中,而是接合到顶端Si部件6后表面上的互连层75。这种方法在大功率应用时有用,那种情况下RFIC可能需要额外的冷却。
在另一实施例中,如图3A所示,可以使用一个更厚的常规的非高阻顶端Si部件或衬底61,还可以包括电介质材料131,适用于确保和增强适当的天线性能。
图3B所示的是包含用于会聚天线信号传播的透镜状内嵌电介质132的顶端Si部件或衬底6。
在另一实施例中,天线结构22具有一个如图4A所示形状的反射器空腔。反射器空腔有一个平坦的底表面,其以与内插件1上表面相交的角度倾斜,用于引导天线传播信号。在图4B中,空腔有一个相对内插件1上表面凹陷的底表面,用于会聚天线信号能量。
图5A和5B所示的是使用了侧馈天线结构5的另一实施例。
尽管描述的例子只说明了将MEMS开关与天线组合到一个密闭封装中,这种硅基封装方法能够进一步包括几乎任何所需的常用于RF频率(1-100GHz)的无源元件组。例如,其他的应用可能包括大或小容量的去耦/旁路电容,高Q因数、大电感值的电感,电阻,谐振器和滤波器(微机械加工的、压电的、空腔的或LC),并且高性能互连都可以集成到Si封装中。利用各种半导体技术制造的有源RFIC芯片可以附着到这个封装。
这种方法相比常规封装方法的另一个益处是避免了热膨胀失配应力,因为大多数或者所有元件都由Si制造。第二,同时使用集成电路(IC)处理技术和Si微机械加工相比利用低温共烧陶瓷(LTCC)衬底、PCB或其它塑料封装技术构成的器件,可以制造具有小得多的设计公差的RF无源元件。
尽管描述并说明的Si基封装包含RFIC芯片、互连导线、通孔、MEMS器件和天线,对于本领域技术人员,很明显的是可以作出各种修改和变化而不偏离本发明的广阔范围,而本发明的范围应仅由所附的权利要求所限制。

Claims (20)

1、一种硅基封装结构,包括:
内插件,包括具有上和下表面的衬底,所述上表面具有至少一个用于形成天线结构的一部分的空腔,所述内插件包括从所述上表面到所述下表面的导电通孔,所述导电通孔在所述下表面处适合用来与电信号源和电压源相耦合,
顶端Si部件,具有位于下表面上的互连导线并具有用于在其上电气安装集成电路芯片的第一焊盘,
所述顶端Si部件在所述下表面上具有与位于所述内插件的所述上表面的多个导电通孔相配合的第二焊盘,并且具有位于所述空腔上的天线,用于在所述顶端Si部件与所述内插件配合时形成所述天线结构。
2、如权利要求1所述的硅基封装结构,其中,所述内插件具有至少一个空腔用于接纳集成电路芯片,并且其中所述第一焊盘被放置成使得当所述顶端Si部件与所述内插件配合时,所述集成电路芯片被置于所述空腔内。
3、如权利要求2所述的硅基封装结构,其中,所述内插件和所述顶端Si部件被接合在一起以形成至少包围所述集成电路芯片的外围密封。
4、如权利要求1所述的硅基封装结构,其中,所述至少一个空腔中的至少一个具有涂覆有导体的底表面。
5、如权利要求1所述的硅基封装结构,其中,所述至少一个空腔中的至少一个具有底表面和多个涂覆有导体的侧壁。
6、如权利要求2中的硅基封装结构,其中,所述至少一个用于接纳集成电路芯片的空腔具有多个涂覆有导体的侧壁以提供对所述的天线结构的屏蔽。
7、如权利要求5所述的硅基封装结构,其中,所述至少一个用于接纳集成电路芯片的空腔具有多个涂覆有导体的侧壁。
8、如权利要求1所述的硅基封装结构,进一步包括MEMS器件,该MEMS器件位于所述顶端Si部件上并被耦合在所述集成电路芯片和所述天线结构之间。
9、如权利要求1所述的硅基封装结构,其中,所述集成电路芯片能够收发频率在1至100GHz范围内的RF电信号。
10、如权利要求1所述的硅基封装结构,其中,所述内插件使用Si或者石英制造。
11、如权利要求10所述的硅基封装结构,其中,所述顶端Si部件使用Si或者石英制造,由此所述顶端Si部件的热膨胀系数与所述内插件的热膨胀系数相匹配。
12、如权利要求1所述的硅基封装结构,其中,所述顶端Si部件包括电介质材料区域,该区域在所述天线结构的一部分之上从所述下表面延伸到上表面,以增强适当的天线性能。
13、如权利要求1的硅基封装结构,其中,所述顶端Si部件包括电介质材料区域,该区域被成形为在所述天线结构之上形成透镜,以会聚天线信号的传播。
14、如权利要求1所述的硅基封装结构,其中,所述空腔具有一个相对于所述内插件的所述上表面有一倾斜角度的平坦底表面。
15、如权利要求1所述的硅基封装结构,其中,所述空腔具有一个相对所述内插件上表面凹陷的底表面,用于会聚天线信号的传播。
16、如权利要求1所述的硅基封装结构,其中,所述天线包括两个分隔开的、其间间隔从一端到另一端增加的电极,以提供远离所述分隔开的电极的天线信号传播,其中在所述电极的平面中所述间隔最大。
17、如权利要求3所述的硅基封装结构,其中,所述的外围密封是金属对金属的密封。
18、如权利要求17所述的硅基封装结构,其中,所述的外围密封围绕所述内插件所述上表面的边缘延伸。
19、如权利要求1所述的硅基封装结构,其中,所述互连导线包括多个层,所述的层由电介质和金属导体组成,所述的层分隔开并由过孔互连。
20、如权利要求1所述的硅基封装结构,进一步包括多个空腔,该多个空腔中的一些空腔用于形成多个天线结构的一部分,其他空腔用于容纳多个集成电路芯片。
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CN101118890A (zh) 2008-02-06
US20080029886A1 (en) 2008-02-07
US20080186247A1 (en) 2008-08-07
US7808798B2 (en) 2010-10-05

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