CN100440501C - 具有翼状物的互连结构 - Google Patents

具有翼状物的互连结构 Download PDF

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Publication number
CN100440501C
CN100440501C CNB2005100026500A CN200510002650A CN100440501C CN 100440501 C CN100440501 C CN 100440501C CN B2005100026500 A CNB2005100026500 A CN B2005100026500A CN 200510002650 A CN200510002650 A CN 200510002650A CN 100440501 C CN100440501 C CN 100440501C
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CN
China
Prior art keywords
contact portion
layer
transistor
metal layer
metal
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Expired - Fee Related
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CNB2005100026500A
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English (en)
Chinese (zh)
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CN1805138A (zh
Inventor
S·苏塔迪亚
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kavim International Inc
Marvell International Ltd
Marvell Asia Pte Ltd
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Mawier International Trade Co Ltd
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Publication of CN1805138A publication Critical patent/CN1805138A/zh
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/482—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes for individual devices provided for in groups H10D8/00 - H10D48/00, e.g. for power transistors
    • H10W20/484—Interconnections having extended contours, e.g. pads having mesh shape or interconnections comprising connected parallel stripes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85—Complementary IGFETs, e.g. CMOS
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65—Shapes or dispositions of interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/427—Power or ground buses
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/20—Arrangements for cooling
    • H10W40/22—Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H10W72/07331—Connecting techniques
    • H10W72/07336—Soldering or alloying
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/076—Connecting or disconnecting of strap connectors
    • H10W72/07631—Techniques
    • H10W72/07636—Soldering or alloying
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/076—Connecting or disconnecting of strap connectors
    • H10W72/07631—Techniques
    • H10W72/07637—Techniques using a polymer adhesive, e.g. an adhesive based on silicone or epoxy
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/29—Bond pads specially adapted therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/726—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/761—Package configurations characterised by the relative positions of pads or connectors relative to package parts of strap connectors
    • H10W90/764—Package configurations characterised by the relative positions of pads or connectors relative to package parts of strap connectors between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Junction Field-Effect Transistors (AREA)
CNB2005100026500A 2004-01-26 2005-01-12 具有翼状物的互连结构 Expired - Fee Related CN100440501C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/765,474 2004-01-26
US10/765,474 US7265448B2 (en) 2004-01-26 2004-01-26 Interconnect structure for power transistors

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
CNB2005100020307A Division CN100435330C (zh) 2004-01-26 2005-01-12 具有平面型连接的集成电路

Publications (2)

Publication Number Publication Date
CN1805138A CN1805138A (zh) 2006-07-19
CN100440501C true CN100440501C (zh) 2008-12-03

Family

ID=34750426

Family Applications (3)

Application Number Title Priority Date Filing Date
CNB2005100026500A Expired - Fee Related CN100440501C (zh) 2004-01-26 2005-01-12 具有翼状物的互连结构
CNB2005100020307A Expired - Lifetime CN100435330C (zh) 2004-01-26 2005-01-12 具有平面型连接的集成电路
CNA2005100026483A Pending CN1805137A (zh) 2004-01-26 2005-01-12 具有铝芯的互连结构

Family Applications After (2)

Application Number Title Priority Date Filing Date
CNB2005100020307A Expired - Lifetime CN100435330C (zh) 2004-01-26 2005-01-12 具有平面型连接的集成电路
CNA2005100026483A Pending CN1805137A (zh) 2004-01-26 2005-01-12 具有铝芯的互连结构

Country Status (5)

Country Link
US (2) US7265448B2 (https=)
EP (3) EP1571708B1 (https=)
JP (3) JP4596925B2 (https=)
CN (3) CN100440501C (https=)
TW (3) TWI354369B (https=)

Families Citing this family (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7851872B2 (en) 2003-10-22 2010-12-14 Marvell World Trade Ltd. Efficient transistor structure
US7960833B2 (en) 2003-10-22 2011-06-14 Marvell World Trade Ltd. Integrated circuits and interconnect structure for integrated circuits
US7414275B2 (en) 2005-06-24 2008-08-19 International Business Machines Corporation Multi-level interconnections for an integrated circuit chip
JP4424331B2 (ja) * 2005-08-01 2010-03-03 セイコーエプソン株式会社 静電アクチュエータ、液滴吐出ヘッド、液滴吐出ヘッドの駆動方法及び静電アクチュエータの製造方法
CA2626977A1 (en) * 2005-10-27 2007-05-03 Rosetta Inpharmatics Llc Nucleic acid amplification using non-random primers
US9147644B2 (en) 2008-02-26 2015-09-29 International Rectifier Corporation Semiconductor device and passive component integration in a semiconductor package
US8786072B2 (en) * 2007-02-27 2014-07-22 International Rectifier Corporation Semiconductor package
WO2008115468A2 (en) * 2007-03-15 2008-09-25 Marvell World Trade Ltd. Integrated circuits and interconnect structure for integrated circuits
KR100851065B1 (ko) * 2007-04-30 2008-08-12 삼성전기주식회사 전자기 밴드갭 구조물 및 인쇄회로기판
JP2009111110A (ja) * 2007-10-30 2009-05-21 Nec Electronics Corp 半導体装置
JP4945619B2 (ja) * 2009-09-24 2012-06-06 株式会社東芝 半導体記憶装置
US8018027B2 (en) * 2009-10-30 2011-09-13 Murata Manufacturing Co., Ltd. Flip-bonded dual-substrate inductor, flip-bonded dual-substrate inductor, and integrated passive device including a flip-bonded dual-substrate inductor
US9583478B1 (en) * 2010-04-16 2017-02-28 Silego Technology, Inc. Lateral power MOSFET
JP2012019063A (ja) * 2010-07-08 2012-01-26 Renesas Electronics Corp 半導体装置
US8614488B2 (en) * 2010-12-08 2013-12-24 Ying-Nan Wen Chip package and method for forming the same
CN102543190B (zh) * 2010-12-28 2015-05-27 炬芯（珠海）科技有限公司 半导体装置、芯片及修改比特数据的方法
TWI469311B (zh) * 2011-04-29 2015-01-11 萬國半導體股份有限公司 聯合封裝的功率半導體元件
TWI469292B (zh) * 2011-07-26 2015-01-11 萬國半導體股份有限公司 應用雙層引線框架的堆疊式功率半導體裝置及其製備方法
US8853860B2 (en) * 2012-03-23 2014-10-07 Teledyne Scientific & Imaging, Llc Method and apparatus for reduced parasitics and improved multi-finger transistor thermal impedance
US8759956B2 (en) * 2012-07-05 2014-06-24 Infineon Technologies Ag Chip package and method of manufacturing the same
KR101420536B1 (ko) * 2012-12-14 2014-07-17 삼성전기주식회사 전력 모듈 패키지
US8884420B1 (en) * 2013-07-12 2014-11-11 Infineon Technologies Austria Ag Multichip device
DE102016203906A1 (de) * 2016-03-10 2017-09-28 Robert Bosch Gmbh Halbleiterbauelement, insbesondere Leistungstransistor
US9960231B2 (en) * 2016-06-17 2018-05-01 Qualcomm Incorporated Standard cell architecture for parasitic resistance reduction
JP6658441B2 (ja) * 2016-10-06 2020-03-04 三菱電機株式会社 半導体装置
US10283526B2 (en) * 2016-12-21 2019-05-07 Qualcomm Incorporated Standard cell circuits employing voltage rails electrically coupled to metal shunts for reducing or avoiding increases in voltage drop
US10236886B2 (en) 2016-12-28 2019-03-19 Qualcomm Incorporated Multiple via structure for high performance standard cells
US10249711B2 (en) * 2017-06-29 2019-04-02 Teledyne Scientific & Imaging, Llc FET with micro-scale device array
US11276624B2 (en) * 2019-12-17 2022-03-15 Infineon Technologies Austria Ag Semiconductor device power metallization layer with stress-relieving heat sink structure
US11508659B2 (en) * 2020-09-10 2022-11-22 Taiwan Semiconductor Manufacturing Company Ltd. Interconnect structure in semiconductor device and method of forming the same
US20240204005A1 (en) * 2022-12-14 2024-06-20 International Business Machines Corporation Transistors with dielectric stack isolating backside power rail

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0867929A2 (en) * 1997-03-25 1998-09-30 P.C.B. Ltd. Electronic interconnect structure and method for manufacturing it
US20010045670A1 (en) * 2000-05-29 2001-11-29 Matsushita Electric Industrial Co., Ltd. Semiconductor device
US6486557B1 (en) * 2000-02-29 2002-11-26 International Business Machines Corporation Hybrid dielectric structure for improving the stiffness of back end of the line structures

Family Cites Families (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03248528A (ja) * 1990-02-27 1991-11-06 Nec Kansai Ltd 半導体装置の製造方法
US5323036A (en) * 1992-01-21 1994-06-21 Harris Corporation Power FET with gate segments covering drain regions disposed in a hexagonal pattern
JP3378334B2 (ja) * 1994-01-26 2003-02-17 株式会社東芝 半導体装置実装構造体
FR2748601B1 (fr) * 1996-05-07 1998-07-24 Sgs Thomson Microelectronics Procede de formation d'interconnexions dans un circuit integre
IL120866A0 (en) * 1997-05-20 1997-09-30 Micro Components Systems Ltd Process for producing an aluminum substrate
US6057171A (en) * 1997-09-25 2000-05-02 Frequency Technology, Inc. Methods for determining on-chip interconnect process parameters
JPH11111860A (ja) * 1997-10-06 1999-04-23 Mitsubishi Electric Corp 半導体装置
JP4015746B2 (ja) * 1997-10-30 2007-11-28 松下電器産業株式会社 半導体装置
US6178082B1 (en) * 1998-02-26 2001-01-23 International Business Machines Corporation High temperature, conductive thin film diffusion barrier for ceramic/metal systems
JP3671999B2 (ja) * 1998-02-27 2005-07-13 富士ゼロックス株式会社 半導体装置およびその製造方法ならびに半導体実装装置
JP3407020B2 (ja) * 1998-05-25 2003-05-19 Ｎｅｃエレクトロニクス株式会社 半導体装置
IL127256A (en) 1998-11-25 2002-09-12 Micro Components Ltd Device for electronic packaging, a process for manufacturing thereof, and a pin jig fixture for use in the process
JP4479015B2 (ja) * 1999-06-10 2010-06-09 パナソニック株式会社 コンデンサ内蔵キャリア基板およびその製造方法
JP4034477B2 (ja) * 1999-07-01 2008-01-16 株式会社日立製作所 インターポーザ及びその製造方法とそれを用いた回路モジュール
DE19958906A1 (de) 1999-12-07 2001-07-05 Infineon Technologies Ag Herstellung von integrierten Schaltungen
US6278264B1 (en) * 2000-02-04 2001-08-21 Volterra Semiconductor Corporation Flip-chip switching regulator
JP4854845B2 (ja) * 2000-02-25 2012-01-18 イビデン株式会社 多層プリント配線板
JP4120133B2 (ja) * 2000-04-28 2008-07-16 沖電気工業株式会社 半導体装置及びその製造方法
WO2002007312A2 (en) * 2000-07-13 2002-01-24 Isothermal Systems Research, Inc. Power semiconductor switching devices, power converters, integrated circuit assemblies, integrated circuitry, power current switching methods, methods of forming a power semiconductor switching device, power conversion methods, power semiconductor switching device packaging methods, and methods of forming a power transistor
JP2002289817A (ja) 2001-03-27 2002-10-04 Toshiba Corp 半導体集積回路装置及びその製造方法
US6426558B1 (en) * 2001-05-14 2002-07-30 International Business Machines Corporation Metallurgy for semiconductor devices
JP4124981B2 (ja) 2001-06-04 2008-07-23 株式会社ルネサステクノロジ 電力用半導体装置および電源回路
TWI312166B (en) * 2001-09-28 2009-07-11 Toppan Printing Co Ltd Multi-layer circuit board, integrated circuit package, and manufacturing method for multi-layer circuit board
US6477034B1 (en) * 2001-10-03 2002-11-05 Intel Corporation Interposer substrate with low inductance capacitive paths
JP2003142623A (ja) * 2001-10-31 2003-05-16 Hitachi Ltd 配線基板とその製造方法，半導体装置並びに配線基板形成用のベース基板
JP3760857B2 (ja) * 2001-12-17 2006-03-29 松下電器産業株式会社 プリント配線板の製造方法
JP2003347727A (ja) * 2002-05-30 2003-12-05 Hitachi Ltd 配線基板および両面実装半導体製品
JP3708082B2 (ja) 2003-02-27 2005-10-19 株式会社ルネサステクノロジ 電力半導体装置
JP2006222298A (ja) * 2005-02-10 2006-08-24 Renesas Technology Corp 半導体装置およびその製造方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0867929A2 (en) * 1997-03-25 1998-09-30 P.C.B. Ltd. Electronic interconnect structure and method for manufacturing it
US6486557B1 (en) * 2000-02-29 2002-11-26 International Business Machines Corporation Hybrid dielectric structure for improving the stiffness of back end of the line structures
US20010045670A1 (en) * 2000-05-29 2001-11-29 Matsushita Electric Industrial Co., Ltd. Semiconductor device

Also Published As

Publication number Publication date
TWI354367B (en) 2011-12-11
EP1571708B1 (en) 2019-06-19
JP2006080540A (ja) 2006-03-23
JP2006093712A (ja) 2006-04-06
US20060175709A1 (en) 2006-08-10
EP1571708A3 (en) 2006-06-14
CN1649141A (zh) 2005-08-03
HK1090752A1 (en) 2006-12-29
TW200536106A (en) 2005-11-01
CN100435330C (zh) 2008-11-19
CN1805138A (zh) 2006-07-19
EP1571708A2 (en) 2005-09-07
EP1727200A2 (en) 2006-11-29
EP1727200A3 (en) 2006-12-13
US7459381B2 (en) 2008-12-02
TW200603387A (en) 2006-01-16
EP1727200B1 (en) 2020-04-15
TW200603386A (en) 2006-01-16
TWI354369B (en) 2011-12-11
US7265448B2 (en) 2007-09-04
JP4596925B2 (ja) 2010-12-15
JP5502255B2 (ja) 2014-05-28
JP2005210114A (ja) 2005-08-04
EP1727199A3 (en) 2006-12-13
US20050161706A1 (en) 2005-07-28
CN1805137A (zh) 2006-07-19
EP1727199A2 (en) 2006-11-29
TWI354368B (en) 2011-12-11

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