CN100440496C - 无焊剂倒装芯片互连 - Google Patents

无焊剂倒装芯片互连 Download PDF

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Publication number
CN100440496C
CN100440496C CNB028109333A CN02810933A CN100440496C CN 100440496 C CN100440496 C CN 100440496C CN B028109333 A CNB028109333 A CN B028109333A CN 02810933 A CN02810933 A CN 02810933A CN 100440496 C CN100440496 C CN 100440496C
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China
Prior art keywords
temperature
metal
chip
substrate
bumps
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Expired - Fee Related
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CNB028109333A
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English (en)
Chinese (zh)
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CN1513206A (zh
Inventor
J·库波塔
K·塔卡哈施
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Intel Corp
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Intel Corp
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Publication of CN1513206A publication Critical patent/CN1513206A/zh
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Publication of CN100440496C publication Critical patent/CN100440496C/zh
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    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
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    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
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    • H01L21/603Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation involving the application of pressure, e.g. thermo-compression bonding
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    • H01L23/485Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body (electrodes) consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
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    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15312Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA
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    • H05K2201/03Conductive materials
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    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
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    • H05K3/3494Heating methods for reflowing of solder
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
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    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49144Assembling to base an electrical component, e.g., capacitor, etc. by metal fusion

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Wire Bonding (AREA)
  • Coils Or Transformers For Communication (AREA)
CNB028109333A 2001-03-28 2002-02-21 无焊剂倒装芯片互连 Expired - Fee Related CN100440496C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/821,331 US6495397B2 (en) 2001-03-28 2001-03-28 Fluxless flip chip interconnection
US09/821,331 2001-03-28

Publications (2)

Publication Number Publication Date
CN1513206A CN1513206A (zh) 2004-07-14
CN100440496C true CN100440496C (zh) 2008-12-03

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Family Applications (1)

Application Number Title Priority Date Filing Date
CNB028109333A Expired - Fee Related CN100440496C (zh) 2001-03-28 2002-02-21 无焊剂倒装芯片互连

Country Status (10)

Country Link
US (1) US6495397B2 (enExample)
EP (1) EP1386356B1 (enExample)
JP (1) JP2005500672A (enExample)
KR (1) KR100555354B1 (enExample)
CN (1) CN100440496C (enExample)
AT (1) ATE360888T1 (enExample)
AU (1) AU2002245476A1 (enExample)
DE (1) DE60219779T2 (enExample)
MY (1) MY122941A (enExample)
WO (1) WO2002080271A2 (enExample)

Families Citing this family (72)

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US6642136B1 (en) 2001-09-17 2003-11-04 Megic Corporation Method of making a low fabrication cost, high performance, high reliability chip scale package
US8021976B2 (en) 2002-10-15 2011-09-20 Megica Corporation Method of wire bonding over active area of a semiconductor circuit
US6666368B2 (en) * 2000-11-10 2003-12-23 Unitive Electronics, Inc. Methods and systems for positioning substrates using spring force of phase-changeable bumps therebetween
US6815324B2 (en) 2001-02-15 2004-11-09 Megic Corporation Reliable metal bumps on top of I/O pads after removal of test probe marks
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