ATE379847T1 - Anordnung zur herstellung von löthöckern auf halbleitersubstraten unter generierung elektrischer ladung, methode und anordnung zum entfernen dieser ladungen, und elektrische ladung generierendes halbleitersubstrat - Google Patents

Anordnung zur herstellung von löthöckern auf halbleitersubstraten unter generierung elektrischer ladung, methode und anordnung zum entfernen dieser ladungen, und elektrische ladung generierendes halbleitersubstrat

Info

Publication number
ATE379847T1
ATE379847T1 AT00942389T AT00942389T ATE379847T1 AT E379847 T1 ATE379847 T1 AT E379847T1 AT 00942389 T AT00942389 T AT 00942389T AT 00942389 T AT00942389 T AT 00942389T AT E379847 T1 ATE379847 T1 AT E379847T1
Authority
AT
Austria
Prior art keywords
charge
arrangement
charges
wafer
semiconductor substrates
Prior art date
Application number
AT00942389T
Other languages
English (en)
Inventor
Shoriki Narita
Yasutaka Tsuboi
Masahiko Ikeya
Takaharu Mae
Shinji Kanayama
Original Assignee
Matsushita Electric Ind Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP30885599A external-priority patent/JP3655787B2/ja
Priority claimed from JP2000184467A external-priority patent/JP4570210B2/ja
Application filed by Matsushita Electric Ind Co Ltd filed Critical Matsushita Electric Ind Co Ltd
Application granted granted Critical
Publication of ATE379847T1 publication Critical patent/ATE379847T1/de

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67144—Apparatus for mounting on conductive members, e.g. leadframes or conductors on insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67138—Apparatus for wiring semiconductor or solid state device
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/974—Substrate surface preparation

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Micromachines (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Light Receiving Elements (AREA)
  • Solid State Image Pick-Up Elements (AREA)
AT00942389T 1999-07-02 2000-06-29 Anordnung zur herstellung von löthöckern auf halbleitersubstraten unter generierung elektrischer ladung, methode und anordnung zum entfernen dieser ladungen, und elektrische ladung generierendes halbleitersubstrat ATE379847T1 (de)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
JP18905399 1999-07-02
JP29370299 1999-10-15
JP30885599A JP3655787B2 (ja) 1999-07-02 1999-10-29 電荷発生基板用バンプ形成装置及び電荷発生基板の除電方法
JP32397999 1999-11-15
JP2000184467A JP4570210B2 (ja) 1999-07-02 2000-06-20 電荷発生基板用バンプ形成装置

Publications (1)

Publication Number Publication Date
ATE379847T1 true ATE379847T1 (de) 2007-12-15

Family

ID=27528983

Family Applications (1)

Application Number Title Priority Date Filing Date
AT00942389T ATE379847T1 (de) 1999-07-02 2000-06-29 Anordnung zur herstellung von löthöckern auf halbleitersubstraten unter generierung elektrischer ladung, methode und anordnung zum entfernen dieser ladungen, und elektrische ladung generierendes halbleitersubstrat

Country Status (7)

Country Link
US (3) US6818975B1 (de)
EP (1) EP1202336B1 (de)
KR (1) KR100446262B1 (de)
CN (1) CN100382261C (de)
AT (1) ATE379847T1 (de)
DE (1) DE60037251T2 (de)
WO (1) WO2001003176A1 (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4456234B2 (ja) * 2000-07-04 2010-04-28 パナソニック株式会社 バンプ形成方法
US20030209310A1 (en) * 2002-05-13 2003-11-13 Fuentes Anastacio C. Apparatus, system and method to reduce wafer warpage
JP4206320B2 (ja) * 2003-09-19 2009-01-07 株式会社ルネサステクノロジ 半導体集積回路装置の製造方法
US8020281B2 (en) * 2008-08-19 2011-09-20 Silverbrook Research Pty Ltd Printed circuit board bonding device
US8296933B2 (en) * 2008-08-19 2012-10-30 Zamtec Limited Fastening apparatus with authentication system
CN102426412A (zh) * 2011-07-12 2012-04-25 上海华力微电子有限公司 一种掩模板表面微尘去除的方法
US8324783B1 (en) 2012-04-24 2012-12-04 UltraSolar Technology, Inc. Non-decaying electric power generation from pyroelectric materials
WO2015073808A2 (en) 2013-11-15 2015-05-21 Greenlee Textron Inc. Automated bender and systems and methods for providing data to operate an automated bender
JP6077023B2 (ja) * 2015-01-09 2017-02-08 株式会社伸興 静電気除去装置及び静電気除去方法
JP6456768B2 (ja) * 2015-05-18 2019-01-23 株式会社ディスコ 加工装置
KR20180129976A (ko) * 2016-07-13 2018-12-05 어플라이드 머티어리얼스, 인코포레이티드 개선된 기판 지지부
US11735438B2 (en) * 2018-12-03 2023-08-22 Applied Materials, Inc. Methods and apparatus for Marangoni drying
JP7489865B2 (ja) * 2020-08-24 2024-05-24 東京エレクトロン株式会社 基板処理方法及び基板処理装置

Family Cites Families (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5925370B2 (ja) 1978-12-26 1984-06-16 富士通株式会社 半導体装置の製造方法
JPS62173428A (ja) 1986-01-28 1987-07-30 Fujitsu Ltd 導波路光デバイス
JPS6477111A (en) * 1987-09-18 1989-03-23 Fujikura Ltd Removal of static electricity of wafer
JPH02203180A (ja) * 1989-02-02 1990-08-13 Sawafuji Electric Co Ltd 冷却装置
JPH03293808A (ja) * 1990-04-11 1991-12-25 Fujitsu Ltd 弾性表面波素子の製造方法
JPH0491422A (ja) * 1990-08-01 1992-03-24 Mitsubishi Electric Corp 半導体装置の製造方法
JPH06232132A (ja) 1993-02-02 1994-08-19 Toshiba Corp バンプ形成装置
US5665167A (en) 1993-02-16 1997-09-09 Tokyo Electron Kabushiki Kaisha Plasma treatment apparatus having a workpiece-side electrode grounding circuit
US5341979A (en) * 1993-09-03 1994-08-30 Motorola, Inc. Method of bonding a semiconductor substrate to a support substrate and structure therefore
US5719739A (en) * 1994-01-13 1998-02-17 Horiguchi; Noboru Static eliminator
JP3339164B2 (ja) 1994-02-16 2002-10-28 東レ株式会社 樹脂硬化ｔａｂテープの製造装置および製造方法
JP3415283B2 (ja) * 1994-08-31 2003-06-09 株式会社東芝 バンプ形成装置、バンプ形成方法および半導体素子の製造方法
JP3079921B2 (ja) * 1994-11-28 2000-08-21 松下電器産業株式会社 半田ボールの搭載装置および搭載方法
JPH1116874A (ja) 1997-06-26 1999-01-22 Nec Kansai Ltd 遠心乾燥装置
JPH1187392A (ja) 1997-09-09 1999-03-30 Oki Electric Ind Co Ltd バンプ形成方法
JPH11168074A (ja) 1997-12-03 1999-06-22 Hitachi Denshi Ltd 圧電体基板のダイシング方法
US6198616B1 (en) 1998-04-03 2001-03-06 Applied Materials, Inc. Method and apparatus for supplying a chucking voltage to an electrostatic chuck within a semiconductor wafer processing system
US6056191A (en) * 1998-04-30 2000-05-02 International Business Machines Corporation Method and apparatus for forming solder bumps
JPH11330573A (ja) 1998-05-11 1999-11-30 Toyo Commun Equip Co Ltd バンプ形成方法及びバンプ形成装置
JP2000059165A (ja) * 1998-08-06 2000-02-25 Toshiba Corp 弾性表面波装置およびその製造方法
JP4203152B2 (ja) * 1998-09-11 2008-12-24 株式会社日立メディアエレクトロニクス 弾性表面波装置
CN1317925C (zh) * 1998-10-13 2007-05-23 松下电器产业株式会社 加热装置和加热方法
JP2002009569A (ja) * 2000-06-26 2002-01-11 Toshiba Corp 弾性表面波装置の製造方法
JP2002203995A (ja) * 2000-12-27 2002-07-19 Toshiba Corp 基板加熱方法、基板冷却方法、及びそれらの装置

Also Published As

Publication number Publication date
EP1202336A4 (de) 2004-06-23
CN100382261C (zh) 2008-04-16
WO2001003176A1 (fr) 2001-01-11
DE60037251T2 (de) 2008-10-09
KR100446262B1 (ko) 2004-09-01
US6818975B1 (en) 2004-11-16
CN1359534A (zh) 2002-07-17
US7014092B2 (en) 2006-03-21
DE60037251D1 (de) 2008-01-10
US20040035849A1 (en) 2004-02-26
EP1202336B1 (de) 2007-11-28
EP1202336A1 (de) 2002-05-02
KR20020022076A (ko) 2002-03-23
US7005368B1 (en) 2006-02-28

Similar Documents

Publication Publication Date Title
ATE379847T1 (de) Anordnung zur herstellung von löthöckern auf halbleitersubstraten unter generierung elektrischer ladung, methode und anordnung zum entfernen dieser ladungen, und elektrische ladung generierendes halbleitersubstrat
CN101512741B (zh) 半导体器件的制造方法及制造装置
EP1278245A4 (de) Verfahren und vorrichtung zum herstellen eines gebondeten dielektrischen trennungswafers
SG142149A1 (en) Method of forming pid protection diode for soi wafer
SG120055A1 (en) Ethylenediaminetetraacetic acid or its ammonium salt semiconductor process residue removal composition and process
US20070170227A1 (en) Soldering method
TW200709527A (en) Thermal protection circuits, power delivery integrated circuits and power delivery methods
WO2012074255A2 (ko) Ｐｃｂ기판의 유가금속 및 부품 회수장치와 이를 이용한 회수방법
SE465492B (sv) Halvledarkomponent innehaallande ett diamantskikt som aer anordnat mellan ett substrat och ett aktivt skikt och foerfarande foer dess framstaellning
JPH08330686A (ja) プリント基板
MY121209A (en) Semiconductor device and production thereof.
JPS6414980A (en) Superconducting transistor
JP2007214241A (ja) 半導体チップの実装方法及び半導体チップの実装装置
DE60131957D1 (de) Harzverkapselte elektronische vorrichtung mit spannungsreduzierender schicht
KR102252732B1 (ko) 다이 본딩 방법 및 다이 본딩 장치
JP2830074B2 (ja) 加熱装置及び加熱方法
TW354411B (en) Semiconductor device and its manufacturing process
KR100669739B1 (ko) 평판표시장치의 트랩제거방법
TW200501383A (en) Semiconductor device, semiconductor body and method of manufacturing thereof
JP2013172029A (ja) リペア装置及びリペア方法
KR19980020054A (ko) 바이폴라 정전 척(Electrostatic chuck) 장치의 절연체 파손 방지장치 및 방법
KR100328753B1 (ko) 오염원소들을게터링하기위한반도체장치제조방법
US20130284715A1 (en) Heating system for heating semiconductor material disposed in a crucible
JPS6450457A (en) Semiconductor device
KR960008672Y1 (ko) 반도체 소자 제조장치의 기판 지지부

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties