TWI741021B - 導線架及電子組件裝置 - Google Patents

導線架及電子組件裝置 Download PDF

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Publication number
TWI741021B
TWI741021B TW106129739A TW106129739A TWI741021B TW I741021 B TWI741021 B TW I741021B TW 106129739 A TW106129739 A TW 106129739A TW 106129739 A TW106129739 A TW 106129739A TW I741021 B TWI741021 B TW I741021B
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TW
Taiwan
Prior art keywords
electronic component
plating layer
lead frame
metal plating
terminal
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TW106129739A
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English (en)
Chinese (zh)
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TW201813034A (zh
Inventor
林真太郎
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日商新光電氣工業股份有限公司
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Publication of TW201813034A publication Critical patent/TW201813034A/zh
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Publication of TWI741021B publication Critical patent/TWI741021B/zh

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49579Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
    • H01L23/49582Metallic layers on lead frames
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
    • H01L21/4814Conductive parts
    • H01L21/4821Flat leads, e.g. lead frames with or without insulating supports
    • H01L21/4828Etching
    • H01L21/4832Etching a temporary substrate after encapsulation process to form leads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • H01L23/14Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/142Metallic substrates having insulating layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49503Lead-frames or other flat leads characterised by the die pad
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49517Additional leads
    • H01L23/4952Additional leads the additional leads being a bump or a wire
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49579Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16245Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/49105Connecting at different heights
    • H01L2224/49109Connecting at different heights outside the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • H01L2924/1815Shape
    • H01L2924/1816Exposing the passive side of the semiconductor or solid-state body
    • H01L2924/18161Exposing the passive side of the semiconductor or solid-state body of a flip chip

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
TW106129739A 2016-08-31 2017-08-31 導線架及電子組件裝置 TWI741021B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2016168847A JP6770853B2 (ja) 2016-08-31 2016-08-31 リードフレーム及び電子部品装置とそれらの製造方法
JP2016-168847 2016-08-31

Publications (2)

Publication Number Publication Date
TW201813034A TW201813034A (zh) 2018-04-01
TWI741021B true TWI741021B (zh) 2021-10-01

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TW106129739A TWI741021B (zh) 2016-08-31 2017-08-31 導線架及電子組件裝置

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US (1) US10008437B2 (enExample)
JP (1) JP6770853B2 (enExample)
CN (1) CN107799475B (enExample)
TW (1) TWI741021B (enExample)

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Publication number Priority date Publication date Assignee Title
JP6761738B2 (ja) * 2016-11-15 2020-09-30 新光電気工業株式会社 リードフレーム及びその製造方法、電子部品装置の製造方法
JP7039245B2 (ja) * 2017-10-18 2022-03-22 新光電気工業株式会社 リードフレーム及びその製造方法と電子部品装置
CN109065518B (zh) * 2018-06-13 2020-12-25 南通通富微电子有限公司 一种半导体芯片封装阵列
US11177192B2 (en) * 2018-09-27 2021-11-16 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device including heat dissipation structure and fabricating method of the same
JP7161904B2 (ja) * 2018-10-11 2022-10-27 新光電気工業株式会社 半導体装置の製造方法
US11545418B2 (en) * 2018-10-24 2023-01-03 Texas Instruments Incorporated Thermal capacity control for relative temperature-based thermal shutdown
TWI736859B (zh) * 2019-03-18 2021-08-21 矽品精密工業股份有限公司 電子封裝件及其製法
JP2022041152A (ja) * 2020-08-31 2022-03-11 ソニーセミコンダクタソリューションズ株式会社 半導体装置の製造方法、半導体装置、および電子機器
DE102020131070B4 (de) * 2020-11-24 2023-03-09 Infineon Technologies Ag Package mit einer erhöhten Leitung und einer Struktur, die sich vertikal vom Boden des Verkapselungsmittels erstreckt, elektronisches Gerät sowie Verfahren zur Herstellung eines Packages
CN113488459A (zh) * 2021-05-18 2021-10-08 日月光半导体制造股份有限公司 半导体结构及其形成方法

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JPH08115989A (ja) * 1994-08-24 1996-05-07 Fujitsu Ltd 半導体装置及びその製造方法
TW548843B (en) * 2001-02-28 2003-08-21 Fujitsu Ltd Semiconductor device and method for making the same
JP2009164232A (ja) * 2007-12-28 2009-07-23 Mitsui High Tec Inc 半導体装置及びその製造方法並びにリードフレーム及びその製造方法
WO2010052973A1 (ja) * 2008-11-05 2010-05-14 株式会社三井ハイテック 半導体装置及びその製造方法

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JP2003332491A (ja) * 1994-08-24 2003-11-21 Fujitsu Ltd 半導体装置
JP2001185651A (ja) * 1999-12-27 2001-07-06 Matsushita Electronics Industry Corp 半導体装置およびその製造方法
JP4034073B2 (ja) * 2001-05-11 2008-01-16 株式会社ルネサステクノロジ 半導体装置の製造方法
JP4533875B2 (ja) * 2006-09-12 2010-09-01 株式会社三井ハイテック 半導体装置およびこの半導体装置に使用するリードフレーム製品並びにこの半導体装置の製造方法
US7807498B2 (en) * 2007-07-31 2010-10-05 Seiko Epson Corporation Substrate, substrate fabrication, semiconductor device, and semiconductor device fabrication
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JP2010129591A (ja) * 2008-11-25 2010-06-10 Mitsui High Tec Inc リードフレーム、このリードフレームを用いた半導体装置及びその中間製品、並びにこれらの製造方法
JP2011029335A (ja) 2009-07-23 2011-02-10 Mitsui High Tec Inc リードフレーム及びリードフレームの製造方法とこれを用いた半導体装置の製造方法
JP2011103371A (ja) * 2009-11-11 2011-05-26 Seiko Epson Corp 半導体装置の製造方法、基板及び半導体装置のアレイ
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JP2016171190A (ja) * 2015-03-12 2016-09-23 イビデン株式会社 パッケージ−オン−パッケージ用プリント配線板
CN204834611U (zh) * 2015-07-29 2015-12-02 嘉盛半导体(苏州)有限公司 引线框架及其单元、半导体封装结构及其单元
JP6608672B2 (ja) * 2015-10-30 2019-11-20 新光電気工業株式会社 半導体装置及びその製造方法、リードフレーム及びその製造方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08115989A (ja) * 1994-08-24 1996-05-07 Fujitsu Ltd 半導体装置及びその製造方法
TW548843B (en) * 2001-02-28 2003-08-21 Fujitsu Ltd Semiconductor device and method for making the same
JP2009164232A (ja) * 2007-12-28 2009-07-23 Mitsui High Tec Inc 半導体装置及びその製造方法並びにリードフレーム及びその製造方法
WO2010052973A1 (ja) * 2008-11-05 2010-05-14 株式会社三井ハイテック 半導体装置及びその製造方法

Also Published As

Publication number Publication date
JP6770853B2 (ja) 2020-10-21
US10008437B2 (en) 2018-06-26
CN107799475A (zh) 2018-03-13
TW201813034A (zh) 2018-04-01
JP2018037504A (ja) 2018-03-08
US20180061746A1 (en) 2018-03-01
CN107799475B (zh) 2023-04-28

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