CN107799475B - 引线框架和电子部件装置 - Google Patents

引线框架和电子部件装置 Download PDF

Info

Publication number
CN107799475B
CN107799475B CN201710762410.3A CN201710762410A CN107799475B CN 107799475 B CN107799475 B CN 107799475B CN 201710762410 A CN201710762410 A CN 201710762410A CN 107799475 B CN107799475 B CN 107799475B
Authority
CN
China
Prior art keywords
metal plating
lead frame
electronic component
plating layer
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201710762410.3A
Other languages
English (en)
Chinese (zh)
Other versions
CN107799475A (zh
Inventor
林真太郎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
Original Assignee
Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Publication of CN107799475A publication Critical patent/CN107799475A/zh
Application granted granted Critical
Publication of CN107799475B publication Critical patent/CN107799475B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49579—Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
    • H01L23/49582—Metallic layers on lead frames
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
    • H01L21/4814—Conductive parts
    • H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
    • H01L21/4828—Etching
    • H01L21/4832—Etching a temporary substrate after encapsulation process to form leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/142—Metallic substrates having insulating layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49503—Lead-frames or other flat leads characterised by the die pad
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49517—Additional leads
    • H01L23/4952—Additional leads the additional leads being a bump or a wire
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49579—Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16245—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/49105—Connecting at different heights
    • H01L2224/49109—Connecting at different heights outside the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H01L2924/1815—Shape
    • H01L2924/1816—Exposing the passive side of the semiconductor or solid-state body
    • H01L2924/18161—Exposing the passive side of the semiconductor or solid-state body of a flip chip

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
CN201710762410.3A 2016-08-31 2017-08-30 引线框架和电子部件装置 Active CN107799475B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2016168847A JP6770853B2 (ja) 2016-08-31 2016-08-31 リードフレーム及び電子部品装置とそれらの製造方法
JP2016-168847 2016-08-31

Publications (2)

Publication Number Publication Date
CN107799475A CN107799475A (zh) 2018-03-13
CN107799475B true CN107799475B (zh) 2023-04-28

Family

ID=61243421

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201710762410.3A Active CN107799475B (zh) 2016-08-31 2017-08-30 引线框架和电子部件装置

Country Status (4)

Country Link
US (1) US10008437B2 (enExample)
JP (1) JP6770853B2 (enExample)
CN (1) CN107799475B (enExample)
TW (1) TWI741021B (enExample)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6761738B2 (ja) * 2016-11-15 2020-09-30 新光電気工業株式会社 リードフレーム及びその製造方法、電子部品装置の製造方法
JP7039245B2 (ja) * 2017-10-18 2022-03-22 新光電気工業株式会社 リードフレーム及びその製造方法と電子部品装置
CN109065518B (zh) * 2018-06-13 2020-12-25 南通通富微电子有限公司 一种半导体芯片封装阵列
US11177192B2 (en) * 2018-09-27 2021-11-16 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device including heat dissipation structure and fabricating method of the same
JP7161904B2 (ja) * 2018-10-11 2022-10-27 新光電気工業株式会社 半導体装置の製造方法
US11545418B2 (en) * 2018-10-24 2023-01-03 Texas Instruments Incorporated Thermal capacity control for relative temperature-based thermal shutdown
TWI736859B (zh) * 2019-03-18 2021-08-21 矽品精密工業股份有限公司 電子封裝件及其製法
JP2022041152A (ja) * 2020-08-31 2022-03-11 ソニーセミコンダクタソリューションズ株式会社 半導体装置の製造方法、半導体装置、および電子機器
DE102020131070B4 (de) * 2020-11-24 2023-03-09 Infineon Technologies Ag Package mit einer erhöhten Leitung und einer Struktur, die sich vertikal vom Boden des Verkapselungsmittels erstreckt, elektronisches Gerät sowie Verfahren zur Herstellung eines Packages
CN113488459A (zh) * 2021-05-18 2021-10-08 日月光半导体制造股份有限公司 半导体结构及其形成方法

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003332491A (ja) * 1994-08-24 2003-11-21 Fujitsu Ltd 半導体装置
CN101517738A (zh) * 2006-09-12 2009-08-26 株式会社三井高科技 半导体装置，用于该半导体装置的引线框架产品以及用于制造该半导体装置的方法
WO2010052973A1 (ja) * 2008-11-05 2010-05-14 株式会社三井ハイテック 半導体装置及びその製造方法
CN102224586A (zh) * 2008-09-25 2011-10-19 Lg伊诺特有限公司 多行引线框架和半导体封装的结构和制造方法
CN102347225A (zh) * 2010-08-03 2012-02-08 凌力尔特有限公司 用于端子的侧镀的激光加工
CN102386106A (zh) * 2010-09-03 2012-03-21 宇芯（毛里求斯）控股有限公司 部分图案化的引线框以及在半导体封装中制造和使用其的方法
CN204834611U (zh) * 2015-07-29 2015-12-02 嘉盛半导体(苏州)有限公司 引线框架及其单元、半导体封装结构及其单元

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08115989A (ja) * 1994-08-24 1996-05-07 Fujitsu Ltd 半導体装置及びその製造方法
JP2001185651A (ja) * 1999-12-27 2001-07-06 Matsushita Electronics Industry Corp 半導体装置およびその製造方法
TW548843B (en) * 2001-02-28 2003-08-21 Fujitsu Ltd Semiconductor device and method for making the same
JP4034073B2 (ja) * 2001-05-11 2008-01-16 株式会社ルネサステクノロジ 半導体装置の製造方法
US7807498B2 (en) * 2007-07-31 2010-10-05 Seiko Epson Corporation Substrate, substrate fabrication, semiconductor device, and semiconductor device fabrication
JP2009164232A (ja) * 2007-12-28 2009-07-23 Mitsui High Tec Inc 半導体装置及びその製造方法並びにリードフレーム及びその製造方法
JP2010129591A (ja) * 2008-11-25 2010-06-10 Mitsui High Tec Inc リードフレーム、このリードフレームを用いた半導体装置及びその中間製品、並びにこれらの製造方法
JP2011029335A (ja) 2009-07-23 2011-02-10 Mitsui High Tec Inc リードフレーム及びリードフレームの製造方法とこれを用いた半導体装置の製造方法
JP2011103371A (ja) * 2009-11-11 2011-05-26 Seiko Epson Corp 半導体装置の製造方法、基板及び半導体装置のアレイ
US8076184B1 (en) * 2010-08-16 2011-12-13 Stats Chippac, Ltd. Semiconductor device and method of forming wafer-level multi-row etched leadframe with base leads and embedded semiconductor die
US8912046B2 (en) * 2010-10-28 2014-12-16 Stats Chippac Ltd. Integrated circuit packaging system with lead frame and method of manufacture thereof
US8723324B2 (en) * 2010-12-06 2014-05-13 Stats Chippac Ltd. Integrated circuit packaging system with pad connection and method of manufacture thereof
US8525325B2 (en) * 2011-12-14 2013-09-03 Stats Chippac Ltd. Integrated circuit packaging system with leads and method of manufacture thereof
US8569112B2 (en) * 2012-03-20 2013-10-29 Stats Chippac Ltd. Integrated circuit packaging system with encapsulation and leadframe etching and method of manufacture thereof
US9312194B2 (en) * 2012-03-20 2016-04-12 Stats Chippac Ltd. Integrated circuit packaging system with terminals and method of manufacture thereof
JP2016171190A (ja) * 2015-03-12 2016-09-23 イビデン株式会社 パッケージ−オン−パッケージ用プリント配線板
JP6608672B2 (ja) * 2015-10-30 2019-11-20 新光電気工業株式会社 半導体装置及びその製造方法、リードフレーム及びその製造方法

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003332491A (ja) * 1994-08-24 2003-11-21 Fujitsu Ltd 半導体装置
CN101517738A (zh) * 2006-09-12 2009-08-26 株式会社三井高科技 半导体装置，用于该半导体装置的引线框架产品以及用于制造该半导体装置的方法
CN102224586A (zh) * 2008-09-25 2011-10-19 Lg伊诺特有限公司 多行引线框架和半导体封装的结构和制造方法
WO2010052973A1 (ja) * 2008-11-05 2010-05-14 株式会社三井ハイテック 半導体装置及びその製造方法
CN102347225A (zh) * 2010-08-03 2012-02-08 凌力尔特有限公司 用于端子的侧镀的激光加工
CN102386106A (zh) * 2010-09-03 2012-03-21 宇芯（毛里求斯）控股有限公司 部分图案化的引线框以及在半导体封装中制造和使用其的方法
CN204834611U (zh) * 2015-07-29 2015-12-02 嘉盛半导体(苏州)有限公司 引线框架及其单元、半导体封装结构及其单元

Also Published As

Publication number Publication date
JP6770853B2 (ja) 2020-10-21
US10008437B2 (en) 2018-06-26
CN107799475A (zh) 2018-03-13
TW201813034A (zh) 2018-04-01
TWI741021B (zh) 2021-10-01
JP2018037504A (ja) 2018-03-08
US20180061746A1 (en) 2018-03-01

Similar Documents

Publication Publication Date Title
CN107799475B (zh) 引线框架和电子部件装置
CN101834166B (zh) 具有支架触点以及管芯附垫的无引脚集成电路封装
TWI666737B (zh) 佈線基板、製造佈線基板之方法及電子組件裝置
JP2013080957A (ja) 高密度コンタクトを有するリードレス集積回路パッケージ
JP7271337B2 (ja) 電子部品装置及び電子部品装置の製造方法
KR20150032493A (ko) 반도체 장치 및 그 제조 방법
CN108074903B (zh) 引线框架和电子元件装置
CN102130088B (zh) 半导体封装结构及其制法
US10096539B2 (en) Lead frame and electronic component device
JP2010109274A (ja) 半導体モジュールおよび半導体モジュールの製造方法
CN102522394A (zh) 一种芯片上芯片封装及制造方法
JP2020129637A (ja) 電子装置及び電子装置の製造方法
JP2956659B2 (ja) 半導体装置およびそのリードフレーム
JP2017188604A (ja) リードフレーム及び半導体装置、並びにそれらの製造方法
CN212542424U (zh) 半导体器件
JP7145414B2 (ja) リードフレームおよびその製造方法、ならびに半導体装置およびその製造方法
TW201019427A (en) Package structure having semiconductor component embedded therein and fabrication method thereof
JP6428013B2 (ja) リードフレーム部材およびその製造方法、ならびに半導体装置およびその製造方法
JP5943386B2 (ja) リードフレーム及びその製造方法
JP2023092969A (ja) リードフレーム、リードフレームの製造方法、半導体装置及び半導体装置の製造方法
JP2010283147A (ja) 半導体装置の製造方法、基板の製造方法及び基板
JP2007109914A (ja) 半導体装置の製造方法
JP2009129922A (ja) 半導体パッケージの製造方法

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant