TWI495082B - 多層半導體封裝 - Google Patents

多層半導體封裝 Download PDF

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Publication number
TWI495082B
TWI495082B TW100105024A TW100105024A TWI495082B TW I495082 B TWI495082 B TW I495082B TW 100105024 A TW100105024 A TW 100105024A TW 100105024 A TW100105024 A TW 100105024A TW I495082 B TWI495082 B TW I495082B
Authority
TW
Taiwan
Prior art keywords
substrate
die
planar surface
major planar
encapsulating resin
Prior art date
Application number
TW100105024A
Other languages
English (en)
Chinese (zh)
Other versions
TW201130110A (en
Inventor
雷珍卓D 潘西
Original Assignee
星科金朋(美國)註冊公司
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Filing date
Publication date
Application filed by 星科金朋(美國)註冊公司 filed Critical 星科金朋(美國)註冊公司
Publication of TW201130110A publication Critical patent/TW201130110A/zh
Application granted granted Critical
Publication of TWI495082B publication Critical patent/TWI495082B/zh

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Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/114Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations
    • H10W74/117Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations the substrate having spherical bumps for external connection
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/01Manufacture or treatment
    • H10W74/012Manufacture or treatment of encapsulations on active surfaces of flip-chip devices, e.g. forming underfills
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/15Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W76/00Containers; Fillings or auxiliary members therefor; Seals
    • H10W76/10Containers or parts thereof
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/531Shapes of wire connectors
    • H10W72/536Shapes of wire connectors the connected ends being ball-shaped
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/531Shapes of wire connectors
    • H10W72/5363Shapes of wire connectors the connected ends being wedge-shaped
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/851Dispositions of multiple connectors or interconnections
    • H10W72/853On the same surface
    • H10W72/856Bump connectors and die-attach connectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/851Dispositions of multiple connectors or interconnections
    • H10W72/874On different surfaces
    • H10W72/877Bump connectors and die-attach connectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/851Dispositions of multiple connectors or interconnections
    • H10W72/874On different surfaces
    • H10W72/884Die-attach connectors and bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/722Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between stacked chips
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Combinations Of Printed Boards (AREA)
TW100105024A 2006-12-07 2007-10-11 多層半導體封裝 TWI495082B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/608,164 US7608921B2 (en) 2006-12-07 2006-12-07 Multi-layer semiconductor package

Publications (2)

Publication Number Publication Date
TW201130110A TW201130110A (en) 2011-09-01
TWI495082B true TWI495082B (zh) 2015-08-01

Family

ID=39496998

Family Applications (2)

Application Number Title Priority Date Filing Date
TW100105024A TWI495082B (zh) 2006-12-07 2007-10-11 多層半導體封裝
TW096137950A TWI366910B (en) 2006-12-07 2007-10-11 Semiconductor package

Family Applications After (1)

Application Number Title Priority Date Filing Date
TW096137950A TWI366910B (en) 2006-12-07 2007-10-11 Semiconductor package

Country Status (4)

Country Link
US (2) US7608921B2 (https=)
JP (2) JP5383024B2 (https=)
KR (1) KR101517541B1 (https=)
TW (2) TWI495082B (https=)

Families Citing this family (78)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7989707B2 (en) 2005-12-14 2011-08-02 Shinko Electric Industries Co., Ltd. Chip embedded substrate and method of producing the same
US7608921B2 (en) * 2006-12-07 2009-10-27 Stats Chippac, Inc. Multi-layer semiconductor package
JP4926692B2 (ja) * 2006-12-27 2012-05-09 新光電気工業株式会社 配線基板及びその製造方法と半導体装置
US7612444B2 (en) * 2007-01-05 2009-11-03 Stats Chippac, Inc. Semiconductor package with flow controller
WO2008105535A1 (ja) * 2007-03-01 2008-09-04 Nec Corporation 半導体装置及びその製造方法
US7928582B2 (en) 2007-03-09 2011-04-19 Micron Technology, Inc. Microelectronic workpieces and methods for manufacturing microelectronic devices using such workpieces
US9330945B2 (en) * 2007-09-18 2016-05-03 Stats Chippac Ltd. Integrated circuit package system with multi-chip module
US20090152740A1 (en) * 2007-12-17 2009-06-18 Soo-San Park Integrated circuit package system with flip chip
US8120186B2 (en) * 2008-02-15 2012-02-21 Qimonda Ag Integrated circuit and method
US7919871B2 (en) * 2008-03-21 2011-04-05 Stats Chippac Ltd. Integrated circuit package system for stackable devices
US7911070B2 (en) * 2008-09-25 2011-03-22 Stats Chippac Ltd. Integrated circuit packaging system having planar interconnect
US7859094B2 (en) * 2008-09-25 2010-12-28 Stats Chippac Ltd. Integrated circuit package system for stackable devices
US20100078788A1 (en) * 2008-09-26 2010-04-01 Amir Wagiman Package-on-package assembly and method
US8704350B2 (en) * 2008-11-13 2014-04-22 Samsung Electro-Mechanics Co., Ltd. Stacked wafer level package and method of manufacturing the same
US8022538B2 (en) * 2008-11-17 2011-09-20 Stats Chippac Ltd. Base package system for integrated circuit package stacking and method of manufacture thereof
US20170117214A1 (en) 2009-01-05 2017-04-27 Amkor Technology, Inc. Semiconductor device with through-mold via
KR20100112446A (ko) * 2009-04-09 2010-10-19 삼성전자주식회사 적층형 반도체 패키지 및 그 제조 방법
FI20095557A0 (fi) 2009-05-19 2009-05-19 Imbera Electronics Oy Valmistusmenetelmä ja elektroniikkamoduuli, joka tarjoaa uusia mahdollisuuksia johdevedoille
US8106499B2 (en) * 2009-06-20 2012-01-31 Stats Chippac Ltd. Integrated circuit packaging system with a dual substrate package and method of manufacture thereof
US8383457B2 (en) 2010-09-03 2013-02-26 Stats Chippac, Ltd. Semiconductor device and method of forming interposer frame over semiconductor die to provide vertical interconnect
USRE48111E1 (en) 2009-08-21 2020-07-21 JCET Semiconductor (Shaoxing) Co. Ltd. Semiconductor device and method of forming interposer frame over semiconductor die to provide vertical interconnect
US8169058B2 (en) 2009-08-21 2012-05-01 Stats Chippac, Ltd. Semiconductor device and method of stacking die on leadframe electrically connected by conductive pillars
US8987830B2 (en) 2010-01-12 2015-03-24 Marvell World Trade Ltd. Attaching passive components to a semiconductor package
US9922955B2 (en) * 2010-03-04 2018-03-20 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming package-on-package structure electrically interconnected through TSV in WLCSP
US8618654B2 (en) * 2010-07-20 2013-12-31 Marvell World Trade Ltd. Structures embedded within core material and methods of manufacturing thereof
JP2011211077A (ja) * 2010-03-30 2011-10-20 Oki Semiconductor Co Ltd 半導体積層パッケージ及びその製造方法
US8541872B2 (en) 2010-06-02 2013-09-24 Stats Chippac Ltd. Integrated circuit package system with package stacking and method of manufacture thereof
US8217502B2 (en) 2010-06-08 2012-07-10 Stats Chippac Ltd. Integrated circuit packaging system with multipart conductive pillars and method of manufacture thereof
US8304296B2 (en) * 2010-06-23 2012-11-06 Stats Chippac Ltd. Semiconductor packaging system with multipart conductive pillars and method of manufacture thereof
US8304900B2 (en) 2010-08-11 2012-11-06 Stats Chippac Ltd. Integrated circuit packaging system with stacked lead and method of manufacture thereof
US8466567B2 (en) * 2010-09-16 2013-06-18 Stats Chippac Ltd. Integrated circuit packaging system with stack interconnect and method of manufacture thereof
US9070851B2 (en) 2010-09-24 2015-06-30 Seoul Semiconductor Co., Ltd. Wafer-level light emitting diode package and method of fabricating the same
US9721872B1 (en) * 2011-02-18 2017-08-01 Amkor Technology, Inc. Methods and structures for increasing the allowable die size in TMV packages
US8569882B2 (en) 2011-03-24 2013-10-29 Stats Chippac Ltd. Integrated circuit packaging system with collapsed multi-integration package and method of manufacture thereof
US8710668B2 (en) 2011-06-17 2014-04-29 Stats Chippac Ltd. Integrated circuit packaging system with laser hole and method of manufacture thereof
US20120326324A1 (en) * 2011-06-22 2012-12-27 Lee Hyungmin Integrated circuit packaging system with package stacking and method of manufacture thereof
US8779566B2 (en) * 2011-08-15 2014-07-15 National Semiconductor Corporation Flexible routing for high current module application
JP2013065835A (ja) * 2011-08-24 2013-04-11 Sumitomo Bakelite Co Ltd 半導体装置の製造方法、ブロック積層体及び逐次積層体
US8698297B2 (en) 2011-09-23 2014-04-15 Stats Chippac Ltd. Integrated circuit packaging system with stack device
US8716065B2 (en) * 2011-09-23 2014-05-06 Stats Chippac Ltd. Integrated circuit packaging system with encapsulation and method of manufacture thereof
US10475759B2 (en) * 2011-10-11 2019-11-12 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuit structure having dies with connectors of different sizes
US9484319B2 (en) * 2011-12-23 2016-11-01 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming extended semiconductor device with fan-out interconnect structure to reduce complexity of substrate
MY179499A (en) * 2011-12-27 2020-11-09 Intel Corp Barrier tape for keep-out zone management
US9153507B2 (en) * 2012-01-31 2015-10-06 Broadcom Corporation Semiconductor package with improved testability
KR20130105175A (ko) * 2012-03-16 2013-09-25 삼성전자주식회사 보호 층을 갖는 반도체 패키지 및 그 형성 방법
US9991190B2 (en) * 2012-05-18 2018-06-05 Taiwan Semiconductor Manufacturing Company, Ltd. Packaging with interposer frame
US9443797B2 (en) 2012-09-14 2016-09-13 STATS ChipPAC Pte. Ltd. Semiconductor device having wire studs as vertical interconnect in FO-WLP
US9818734B2 (en) 2012-09-14 2017-11-14 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming build-up interconnect structures over a temporary substrate
US10192796B2 (en) 2012-09-14 2019-01-29 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming dual-sided interconnect structures in FO-WLCSP
US9799592B2 (en) 2013-11-19 2017-10-24 Amkor Technology, Inc. Semicondutor device with through-silicon via-less deep wells
KR101366461B1 (ko) 2012-11-20 2014-02-26 앰코 테크놀로지 코리아 주식회사 반도체 디바이스 및 그 제조 방법
TWI500130B (zh) * 2013-02-27 2015-09-11 矽品精密工業股份有限公司 封裝基板及其製法暨半導體封裝件及其製法
US20150001741A1 (en) * 2013-06-27 2015-01-01 Stats Chippac, Ltd. Semiconductor Device and Method of Forming an Interposer Including a Beveled Edge
KR102134133B1 (ko) 2013-09-23 2020-07-16 삼성전자주식회사 반도체 패키지 및 이의 제조 방법
KR101607981B1 (ko) 2013-11-04 2016-03-31 앰코 테크놀로지 코리아 주식회사 반도체 패키지용 인터포저 및 이의 제조 방법, 제조된 인터포저를 이용한 반도체 패키지
US9385077B2 (en) * 2014-07-11 2016-07-05 Qualcomm Incorporated Integrated device comprising coaxial interconnect
KR102198858B1 (ko) 2014-07-24 2021-01-05 삼성전자 주식회사 인터포저 기판을 갖는 반도체 패키지 적층 구조체
US9859200B2 (en) * 2014-12-29 2018-01-02 STATS ChipPAC Pte. Ltd. Integrated circuit packaging system with interposer support structure mechanism and method of manufacture thereof
DE102015101440B4 (de) * 2015-02-02 2021-05-06 Infineon Technologies Ag Halbleiterbauelement mit unter dem Package angeordnetem Chip und Verfahren zur Montage desselben auf einer Anwendungsplatine
KR101640341B1 (ko) 2015-02-04 2016-07-15 앰코 테크놀로지 코리아 주식회사 반도체 패키지
US9893017B2 (en) 2015-04-09 2018-02-13 STATS ChipPAC Pte. Ltd. Double-sided semiconductor package and dual-mold method of making same
KR101691099B1 (ko) * 2015-04-30 2016-12-29 하나 마이크론(주) 팬 아웃 패키지, 팬 아웃 pop 패키지 및 그 제조 방법
US9850124B2 (en) * 2015-10-27 2017-12-26 Advanced Semiconductor Engineering, Inc. Semiconductor device package for reducing parasitic light and method of manufacturing the same
CN205944139U (zh) 2016-03-30 2017-02-08 首尔伟傲世有限公司 紫外线发光二极管封装件以及包含此的发光二极管模块
KR20170129983A (ko) 2016-05-17 2017-11-28 삼성전자주식회사 발광소자 패키지, 이를 이용한 디스플레이 장치 및 그 제조방법
US9786515B1 (en) 2016-06-01 2017-10-10 Nxp Usa, Inc. Semiconductor device package and methods of manufacture thereof
US9960328B2 (en) 2016-09-06 2018-05-01 Amkor Technology, Inc. Semiconductor device and manufacturing method thereof
US10622340B2 (en) 2016-11-21 2020-04-14 Samsung Electronics Co., Ltd. Semiconductor package
EP3340293A1 (de) * 2016-12-20 2018-06-27 Siemens Aktiengesellschaft Halbleitermodul mit stützstruktur auf der unterseite
KR102358323B1 (ko) 2017-07-17 2022-02-04 삼성전자주식회사 반도체 패키지
KR102419154B1 (ko) 2017-08-28 2022-07-11 삼성전자주식회사 반도체 패키지 및 그의 제조 방법
US10468384B2 (en) * 2017-09-15 2019-11-05 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming embedded die substrate, and system-in-package modules with the same
KR102446861B1 (ko) 2017-09-21 2022-09-23 삼성전자주식회사 적층 패키지 및 그의 제조 방법
KR102497572B1 (ko) 2018-07-03 2023-02-09 삼성전자주식회사 반도체 패키지 및 그의 제조 방법
US20200367367A1 (en) * 2019-05-15 2020-11-19 Jabil Inc. Method and Apparatus for Stacking Printed Circuit Board Assemblies with Single Reflow
JP7289719B2 (ja) * 2019-05-17 2023-06-12 新光電気工業株式会社 半導体装置、半導体装置アレイ
KR102849154B1 (ko) 2020-04-10 2025-08-21 삼성전자주식회사 반도체 패키지
CN117832190A (zh) * 2022-09-28 2024-04-05 星科金朋私人有限公司 集成封装及其制造方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6339254B1 (en) * 1998-09-01 2002-01-15 Texas Instruments Incorporated Stacked flip-chip integrated circuit assemblage
TW200532867A (en) * 2004-03-18 2005-10-01 Advanced Semiconductor Eng Method for manufacturing multi package module
US20060110849A1 (en) * 2004-10-28 2006-05-25 Cheng-Yin Lee Method for stacking BGA packages and structure from the same
US20060267175A1 (en) * 2005-05-31 2006-11-30 Stats Chippac Ltd. Stacked Semiconductor Package Assembly Having Hollowed Substrate

Family Cites Families (37)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07335783A (ja) * 1994-06-13 1995-12-22 Fujitsu Ltd 半導体装置及び半導体装置ユニット
JPH11260999A (ja) * 1998-03-13 1999-09-24 Sumitomo Metal Ind Ltd ノイズを低減した積層半導体装置モジュール
JP2000294720A (ja) * 1999-04-07 2000-10-20 Sharp Corp 半導体集積回路パッケージ
JP2001007472A (ja) * 1999-06-17 2001-01-12 Sony Corp 電子回路装置およびその製造方法
JP3668074B2 (ja) * 1999-10-07 2005-07-06 松下電器産業株式会社 半導体装置およびその製造方法
US6369448B1 (en) * 2000-01-21 2002-04-09 Lsi Logic Corporation Vertically integrated flip chip semiconductor package
US6472743B2 (en) * 2001-02-22 2002-10-29 Siliconware Precision Industries, Co., Ltd. Semiconductor package with heat dissipating structure
JP4023159B2 (ja) * 2001-07-31 2007-12-19 ソニー株式会社 半導体装置の製造方法及び積層半導体装置の製造方法
JP3655242B2 (ja) * 2002-01-04 2005-06-02 株式会社東芝 半導体パッケージ及び半導体実装装置
US6774475B2 (en) * 2002-01-24 2004-08-10 International Business Machines Corporation Vertically stacked memory chips in FBGA packages
JP2003224228A (ja) * 2002-01-31 2003-08-08 Shinko Electric Ind Co Ltd 半導体装置用パッケージ並びに半導体装置及びその製造方法
JP2003347722A (ja) * 2002-05-23 2003-12-05 Ibiden Co Ltd 多層電子部品搭載用基板及びその製造方法
US6838761B2 (en) * 2002-09-17 2005-01-04 Chippac, Inc. Semiconductor multi-package module having wire bond interconnect between stacked packages and having electrical shield
US7045887B2 (en) * 2002-10-08 2006-05-16 Chippac, Inc. Semiconductor multi-package module having inverted second package stacked over die-up flip-chip ball grid array (BGA) package
TW567601B (en) * 2002-10-18 2003-12-21 Siliconware Precision Industries Co Ltd Module device of stacked semiconductor package and method for fabricating the same
US20040089943A1 (en) * 2002-11-07 2004-05-13 Masato Kirigaya Electronic control device and method for manufacturing the same
US6861288B2 (en) * 2003-01-23 2005-03-01 St Assembly Test Services, Ltd. Stacked semiconductor packages and method for the fabrication thereof
JP2004247637A (ja) * 2003-02-17 2004-09-02 Nec Saitama Ltd 電子部品の三次元実装構造および方法
JP2004335624A (ja) * 2003-05-06 2004-11-25 Hitachi Ltd 半導体モジュール
KR100493063B1 (ko) * 2003-07-18 2005-06-02 삼성전자주식회사 스택 반도체 칩 비지에이 패키지 및 그 제조방법
US7180165B2 (en) * 2003-09-05 2007-02-20 Sanmina, Sci Corporation Stackable electronic assembly
JP2005317862A (ja) * 2004-04-30 2005-11-10 Shinko Electric Ind Co Ltd 半導体素子の接続構造
JP4561969B2 (ja) * 2004-05-26 2010-10-13 セイコーエプソン株式会社 半導体装置
JP2006114604A (ja) * 2004-10-13 2006-04-27 Toshiba Corp 半導体装置及びその組立方法
JP2006196709A (ja) * 2005-01-13 2006-07-27 Sharp Corp 半導体装置およびその製造方法
US7999376B2 (en) * 2005-01-25 2011-08-16 Panasonic Corporation Semiconductor device and its manufacturing method
US7659623B2 (en) * 2005-04-11 2010-02-09 Elpida Memory, Inc. Semiconductor device having improved wiring
US7429786B2 (en) * 2005-04-29 2008-09-30 Stats Chippac Ltd. Semiconductor package including second substrate and having exposed substrate surfaces on upper and lower sides
KR100631959B1 (ko) * 2005-09-07 2006-10-04 주식회사 하이닉스반도체 적층형 반도체 패키지 및 그 제조방법
TWI292617B (en) * 2006-02-03 2008-01-11 Siliconware Precision Industries Co Ltd Stacked semiconductor structure and fabrication method thereof
US20070210433A1 (en) * 2006-03-08 2007-09-13 Rajesh Subraya Integrated device having a plurality of chip arrangements and method for producing the same
US7569918B2 (en) * 2006-05-01 2009-08-04 Texas Instruments Incorporated Semiconductor package-on-package system including integrated passive components
US20080017966A1 (en) * 2006-05-02 2008-01-24 Advanced Analogic Technologies, Inc. Pillar Bump Package Technology
KR100809693B1 (ko) * 2006-08-01 2008-03-06 삼성전자주식회사 하부 반도체 칩에 대한 신뢰도가 개선된 수직 적층형멀티칩 패키지 및 그 제조방법
US7545029B2 (en) * 2006-08-18 2009-06-09 Tessera, Inc. Stack microelectronic assemblies
US7608921B2 (en) * 2006-12-07 2009-10-27 Stats Chippac, Inc. Multi-layer semiconductor package
US7635913B2 (en) * 2006-12-09 2009-12-22 Stats Chippac Ltd. Stacked integrated circuit package-in-package system

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6339254B1 (en) * 1998-09-01 2002-01-15 Texas Instruments Incorporated Stacked flip-chip integrated circuit assemblage
TW200532867A (en) * 2004-03-18 2005-10-01 Advanced Semiconductor Eng Method for manufacturing multi package module
US20060110849A1 (en) * 2004-10-28 2006-05-25 Cheng-Yin Lee Method for stacking BGA packages and structure from the same
US20060267175A1 (en) * 2005-05-31 2006-11-30 Stats Chippac Ltd. Stacked Semiconductor Package Assembly Having Hollowed Substrate

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