TWI455267B - A module substrate, a manufacturing method of a module substrate, and a terminal connection substrate - Google Patents

A module substrate, a manufacturing method of a module substrate, and a terminal connection substrate Download PDF

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Publication number
TWI455267B
TWI455267B TW100108858A TW100108858A TWI455267B TW I455267 B TWI455267 B TW I455267B TW 100108858 A TW100108858 A TW 100108858A TW 100108858 A TW100108858 A TW 100108858A TW I455267 B TWI455267 B TW I455267B
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Taiwan
Prior art keywords
substrate
terminal
module
module substrate
terminal connection
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TW100108858A
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English (en)
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TW201145483A (en
Inventor
Issei Yamamoto
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Murata Manufacturing Co
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Publication of TW201145483A publication Critical patent/TW201145483A/zh
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Publication of TWI455267B publication Critical patent/TWI455267B/zh

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/182Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/185Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
    • H05K1/186Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit manufactured by mounting on or connecting to patterned circuits before or during embedding
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    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49805Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the leads being also applied on the sidewalls or the bottom of the substrate, e.g. leadless packages for surface mounting
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Description

模組基板、模組基板之製造方法、及端子連接基板
本發明係關於一種將在單面或雙面構裝有複數個電子零件之集合基板分斷並從集合基板裁切出之模組基板、從集合基板裁切出複數個模組基板之模組基板之製造方法、及端子連接基板。
近年來,隨著電子機器之小型化、輕量化,構裝於電子機器之模組基板本身亦要求小型化、輕量化。因此,藉由使用引腳端子、焊球、腔體構造等將電子零件構裝於模組基板之兩面以進行小型化、輕量化。
專利文獻1揭示有不形成腔體構造等之廉價之兩面電極構造之半導體裝置之製造方法。亦即,藉由連結板將一體化之複數個連接用電極固設在構裝有電子零件之模組基板上,藉由研磨將連結板除去以形成連接用電極。藉此,即使是因藉由例如焊料等將複數個連接用電極固設在模組基板而使連結板傾斜之情形,亦可藉由將連結板研磨至消失為止來維持模組基板之共面性(Coplanarity)。
專利文獻2揭示有配置有使用貫通孔形成電極之間隔物基板(連接用基板)之模組。在專利文獻2,將間隔物基板之焊壂間以貫通孔加以電氣連接。藉此,能將模組與外部基板之電氣連接之可靠性維持較高。
專利文獻1:日本專利第3960479號公報
專利文獻2:日本特開2009-123869號公報
然而,在專利文獻1揭示之半導體裝置之製造方法,必須藉由研磨將連結板除去,因此需要研磨步驟。是以,會有製造成本不易降低之問題點。又,在無法將連結板充分研磨之情形,亦會有產生連接用電極之連接不良之虞。
再者,連接用電極從連結板露出之部分之長度較長,會有因固設在模組基板前之捲帶步驟等之處理導致連接用電極變形之虞。因此,亦會有使相鄰之連接用電極彼此短路之虞。
又,在專利文獻2揭示之模組,由於使用貫通孔,因此端面電極係以薄鍍膜形成,會有無法使大電流流通之問題點。又,必須要形成貫通孔、形成鍍膜等之複雜步驟。
本發明係有鑑於上述問題而構成,其目的在於提供一種能簡化製程且不會使端子電極彼此短路而確實地連接之模組基板、模組基板之製造方法、及端子連接基板。
為了達成上述目的,第1發明之模組基板,係在底基板之至少單面構裝有複數個電子零件,其特徵在於:具備在絕緣體之至少一側面配置有複數個柱狀之端子電極之端子連接基板;以複數個柱狀之該端子電極之一端側與該底基板接觸之方式,將複數個該端子連接基板構裝在該底基板。
在第1發明,具備在絕緣體之至少一側面配置有複數個柱狀之端子電極之端子連接基板,以複數個柱狀之端子電極之一端側與底基板接觸之方式,將複數個端子連接基板構裝在底基板。藉此,並非藉由形成在貫通孔之薄鍍膜而是藉由柱狀之端子電極進行電氣連接,因此能使較大電流流通。又,不需要形成貫通孔、形成鍍膜等之複雜步驟,能使製程簡單,能使整體之製造成本降低。
又,第2發明之模組基板,在第1發明中,該端子連接基板,在該絕緣體之兩側面配置有複數個柱狀之該端子電極。
在第2發明,具備在絕緣體之兩側面配置有複數個柱狀之端子電極之端子連接基板,以複數個柱狀之端子電極之一端側與底基板接觸之方式,將複數個端子連接基板構裝在底基板。藉此,並非藉由形成在貫通孔之薄鍍膜而是藉由柱狀之端子電極進行電氣連接,因此能使較大電流流通。又,不需要形成貫通孔、形成鍍膜等之複雜步驟,能使製程簡單,能使整體之製造成本降低。
又,第3發明之模組基板,在第2發明中,該端子連接基板,在該絕緣體之兩側面分別配置有一列複數個該端子電極。
在第3發明,端子連接基板,在絕緣體之兩側面分別配置有一列複數個端子電極,因此能以一個端子連接基板設置兩列端子電極列。
又,第4發明之模組基板,在第2或第3發明中,該端子連接基板,在複數個該端子電極間印刷有光阻。
在第4發明,端子連接基板,在端子電極間印刷有光阻,因此可抑制在將集合基板分斷成複數個模組基板時容易產生之毛邊、延伸等之產生,可防止端子電極之變形。
又,第5發明之模組基板,在第1至第4發明之任一者中,以樹脂將構裝在該底基板之複數個該電子零件與該端子連接基板加以密封;該樹脂與該絕緣體為相同之組成。
在第5發明,以樹脂將構裝在底基板之複數個電子零件與端子連接基板加以密封,因此可提升對模組基板落下時之衝擊之強度,提升模組基板之可靠性。又,樹脂與端子連接基板之絕緣體為相同之組成,因此密封後之樹脂與絕緣體之密合度增加,可提升對模組基板落下時之衝擊之強度,提升模組基板之可靠性。
接著,為了達成上述目的,第6發明之模組基板之製造方法,係將在至少單面構裝有複數個電子零件之集合基板加以分斷,以從該集合基板裁切出複數個模組基板,其特徵在於,包含:第1步驟,將複數個在絕緣體之兩側面配置有複數個柱狀之端子電極之端子連接基板,以橫跨至少相鄰之複數個該模組基板之方式構裝在該集合基板之單面;以及第2步驟,將構裝有該端子連接基板及該電子零件之該集合基板,在欲裁切出該模組基板之位置加以分斷。
在第6發明,將複數個在絕緣體之兩側面配置有複數個柱狀之端子電極之端子連接基板,以橫跨至少相鄰之複數個模組基板之方式構裝。將構裝有端子連接基板及電子零件之集合基板,在欲裁切出模組基板之位置加以分斷。藉此,由於不存在使複數個端子電極一體化之連結板,因此不需要連結板之研磨步驟、及在各端子電極形成導通之導通形成步驟,能使製程簡單,能使整體之製造成本大幅降低。又,能使端子電極之端部確實地露出至外部,不會有產生接觸不良之虞。再者,由於端子電極之露出部分之高度較低,因此端子電極不易變形,能使端子電極彼此不短路而確實地連接。
又,第7發明之模組基板之製造方法,在第6發明中,該模組基板之俯視外形為矩形;該第1步驟,將該端子連接基板配置在該模組基板之外周邊之對向兩邊。
在第7發明,模組基板之俯視外形為矩形,將端子連接基板配置在模組基板之外周邊之對向兩邊,因此將端子連接基板構裝在集合基板之作業步驟減少,能使製造成本降低。
又,第8發明之模組基板之製造方法,在第6發明中,該模組基板之俯視外形為矩形;該第1步驟,將該端子連接基板配置在該模組基板之外周邊之四邊。
在第8發明,模組基板之俯視外形為矩形,將端子連接基板配置在模組基板之外周邊之四邊,因此能製造具有更多能與外部機器之端子連接之端子電極之模組基板。
又,第9發明之模組基板之製造方法,在第6至第8發明之任一者中,該端子連接基板,將複數個該端子電極在該絕緣體之兩側面分別配置一列。
在第9發明,端子連接基板,將複數個端子電極在絕緣體之兩側面分別配置一列,因此能以一個端子連接基板對二個模組基板設置端子電極。
又,第10發明之模組基板之製造方法,在第7至第9發明之任一者中,該端子連接基板,在複數個該端子電極間印刷有光阻。
在第10發明,端子連接基板,在端子電極間印刷有光阻,因此可抑制在將集合基板分斷成複數個模組基板時容易產生之毛邊、延伸等之產生,可防止端子電極之變形。
又,第11發明之模組基板之製造方法,在第6至第10發明之任一者中,該第2步驟,在將該集合基板分斷時,將該端子連接基板之絕緣體全部除去。
在第11發明,在將集合基板分斷時,將端子連接基板之絕緣體全部除去,因此可形成端子電極作為在模組基板之側面露出之側面電極。
又,第12發明之模組基板之製造方法,在第6至第10發明之任一者中,該第2步驟,在將該集合基板分斷時,使該端子連接基板之絕緣體殘留。
在第12發明,在將集合基板分斷時,使端子連接基板之絕緣體殘留,因此端子電極不會在模組基板之側面露出,不需要對露出部分之鍍敷處理等表面處理。是以,能使製造成本降低。
又,第13發明之模組基板之製造方法,在第6至第10發明之任一者中,包含在該第1步驟之後,以樹脂將構裝在該集合基板之複數個該電子零件與該端子連接基板加以密封,並研磨密封後之該樹脂之上面之步驟。
在第13發明,以樹脂將構裝在集合基板之複數個電子零件與端子連接基板加以密封,並研磨密封後之樹脂之上面。藉由以樹脂將端子電極之周圍密封、固定,可提升對模組基板落下時之衝擊之強度,提升模組基板之可靠性。
又,第14發明之模組基板之製造方法,在第13發明中,包含在研磨密封後之該樹脂之上面之步驟之後,藉由導電性糊形成NC電極之步驟。
在第14發明,在研磨密封後之樹脂之上面之步驟之後,藉由導電性糊形成NC電極,因此能容易增加與母基板連接之電極數,易於使落下時之衝擊分散。
又,第15發明之模組基板之製造方法,在第13或第14發明中,包含在密封後之該樹脂之上面再次施加配線之步驟。
在第15發明,在密封後之樹脂之上面再次施加配線,因此外部電極之位置並不限於配置有端子電極之位置(模組基板之外周邊附近),可提升設計之自由度。
又,第16發明之模組基板之製造方法,在第13至第15發明之任一者中,包含施加光阻印刷之步驟。
在第16發明,施加光阻印刷,因此可被覆端子電極之周緣部,能防止水分從上面浸入等。
又,第17發明之模組基板之製造方法,在第13至第16發明之任一者中,密封後之該樹脂與該端子連接基板之絕緣體為相同之組成。
在第17發明,密封後之樹脂與端子連接基板之絕緣體為相同之組成,因此密封後之樹脂與絕緣體之密合度增加,可提升對模組基板落下時之衝擊之強度,提升模組基板之可靠性。
接著,為了達成上述目的,第18發明之端子連接基板,在絕緣體之至少一側面配置有複數個柱狀之端子電極。
在第18發明,將在絕緣體之至少一側面配置有複數個柱狀之端子電極之端子連接基板,以複數個柱狀之端子電極之一端側與底基板接觸之方式構裝,因此,並非藉由形成在貫通孔之薄鍍膜而是藉由柱狀之端子電極進行電氣連接,因此能使較大電流流通。
第19發明之端子連接基板,在第18發明中,在絕緣體之兩側面配置有複數個柱狀之端子電極。
在第19發明,將在絕緣體之兩側面配置有複數個柱狀之端子電極之端子連接基板,以複數個柱狀之端子電極之一端側與底基板接觸之方式構裝,因此,並非藉由形成在貫通孔之薄鍍膜而是藉由柱狀之端子電極進行電氣連接,因此能使較大電流流通。
根據上述構成,並非藉由形成在貫通孔之薄鍍膜而是藉由柱狀之端子電極進行電氣連接,因此能使較大電流流通。又,不需要形成貫通孔、形成鍍膜等之複雜步驟,能使製程簡單,能使整體之製造成本降低。
又,根據上述構成,由於不存在使複數個端子電極一體化之連結板,因此不需要連結板之研磨步驟、及在各端子電極形成導通之導通形成步驟,能使整體之製造成本大幅降低。又,能使端子電極之端部確實地露出至外部,不會有產生接觸不良之虞。再者,由於端子電極之露出部分之高度較低,因此端子電極不易變形,能使端子電極彼此不短路而確實地連接。
以下,參照圖式詳細說明本發明之實施形態。
(實施形態1)
圖1係顯示配置在本發明實施形態1之模組基板之端子連接基板之構成的立體圖。本發明實施形態1之端子連接基板14,係以由陶瓷、玻璃、環氧樹脂等構成之絕緣體141及在絕緣體141之兩側面分別配置成一列之複數個柱狀之端子電極142構成。
將端子連接基板14構裝於底基板時之端子電極142之高度,較佳為較構裝於底基板之電子零件(SMD)之高度高。此外,如圖1所示,在端子電極142為角柱狀之情形,藉由作成端子電極142之高度與寬度之縱深比(=高度/寬度)為大致1之角柱,可防止端子電極142之變形。
圖2係顯示配置在本發明實施形態1之模組基板之端子連接基板14之另一構成的立體圖。配置在絕緣體141之兩側面之複數個柱狀之端子電極142,並不限於圖1之角柱狀,例如為圖2(a)所示之圓柱狀亦可,為圖2(b)所示之六角柱狀亦可,為圖2(c)所示之梯形柱狀亦可。
圖3係顯示配置在本發明實施形態1之模組基板之端子連接基板14之製程的立體圖。首先,如圖3(a)所示,在由陶瓷、玻璃、環氧樹脂等構成之絕緣基板31之兩面黏貼具有既定厚度之銅箔32。在本實施形態1,設銅箔32之厚度分別為300μm。此外,由環氧樹脂等構成之絕緣基板31,為高剛性之基板亦可,為具有可撓性之基板亦可。又,銅箔32並不限於純銅,為磷青銅、黃銅等之銅合金亦可。由於銅合金相較於純銅加工性較高,因此在以切刀進行分解時、在研磨上面時不易產生毛邊、延伸等。
再者,銅箔32亦可藉由鍍敷加工作成既定厚度。將具有例如150μm左右之厚度之銅箔32黏貼於絕緣基板31之兩面,在其上施加鍍敷加工以作成200μm~400μm之厚度即足夠。銅箔32之厚度較佳為100μm~500μm,更佳為200μm~400μm。
在端子電極142為角柱狀之情形,銅箔32之厚度成為端子電極142之剖面之一邊之長度。在端子電極142之一邊之長度為200μm以上之情形,即使數安培之較大電流流過時亦不會斷線。又,在端子電極142之一邊之長度為400μm以下之情形,由於高度較低,因此端子電極142不易變形。
接著,如圖3(b)所示,在黏貼後之銅箔32之表面背面之相同位置,以梳狀形成複數個槽33。槽33之形成方法並不特別限定,只要為例如蝕刻加工、切刀之切削加工、兩者併用之加工等可確實地除去銅箔32形成槽33之方法即可。
在以蝕刻加工形成複數個槽33之情形,端子電極142之形狀成為如圖2(c)所示之梯形柱狀。其原因在於,愈接近表面之部分愈容易被蝕刻。又,在以切刀之切削加工形成複數個槽33之情形,端子電極142之形狀成為如圖1所示之角柱狀。是以,以切刀之切削加工形成複數個槽33之方法中端子電極142之剖面積變大,因此能使耐電流值變大。為了縮短切削加工時間,使用具有多刀片之切刀、多線鋸等亦可。
再者,替代銅箔32,在絕緣基板31之兩面以既定間隔直接黏貼圓柱狀、六角柱狀等之銅之引線、銅棒等亦可。如此,能製造分別設有圖2(a)所示之複數個圓柱狀之端子電極142、圖2(b)所示之複數個六角柱狀之端子電極142之端子連接基板14。
此外,形成複數個槽33後之殘留之銅箔32之寬度,在端子電極142之剖面形狀為矩形(正方形)之情形,成為在將端子連接基板14構裝於底基板時之端子電極142之寬度。
接著,如圖3(c)所示,在與形成後之複數個槽33交叉之方向、例如正交方向,以切刀將絕緣基板31分斷,裁切出圖3(d)所示之端子連接基板14。以切刀分斷裁切之寬度成為在將端子連接基板14構裝於底基板時之端子電極142之高度。是以,以切刀分斷裁切之寬度必須要較構裝於底基板之電子零件之高度長至少100μm。其原因在於,會有因構裝於底基板之電子零件之高度之偏差,電子零件之高度較端子電極142之高度為高之虞,在與母基板之間產生連接不良之虞。在裁切出之端子連接基板14之複數個端子電極142施加鍍敷處理或防鏽處理,如圖3(e)所示使其旋轉90度,在絕緣體141之兩側面配置有複數個端子電極142之狀態下構裝於底基板之既定位置。此外,鍍膜係以濕式鍍敷等將Ni/Sn或Ni/Au等成膜。又,藉由施加防鏽處理,可抑制用於端子電極142之銅之氧化之進行,能提升構裝時之焊料濕潤性。
再者,藉由以切刀在形成後之複數個槽33中之所欲之槽33分斷,能製造設有所欲數量之端子電極142之端子連接基板14。
又,在端子電極142與端子電極142之間印刷光阻亦可。圖4係顯示配置在本發明實施形態1之模組基板之在端子電極142間印刷有光阻之端子連接基板14之構成的立體圖。如圖4所示,以填埋在絕緣體141之兩側面分別一列形成之複數個端子電極142之間之方式印刷光阻143。如此,可抑制在分斷時等容易產生之端子電極142之毛邊、延伸等之產生,可防止端子電極142之變形。
圖5係顯示本發明實施形態1之模組基板之製程的立體圖。首先,如圖5(a)所示,在外形為矩形之底基板10之表面電極中之所欲之表面電極上印刷焊料。作為底基板10,有LTCC(低溫同時燒成陶瓷:Low Temperature Co-fired Ceramics)基板、有機基板等,並不特別限定。
在使用LTCC基板作成底基板10之情形,首先在PET(聚對苯二甲酸乙二酯)膜上塗布陶瓷漿料後,使其乾燥,作成厚度10~200μm之陶瓷坯片。對作成後之陶瓷坯片以模具、雷射等從PET膜側形成直徑大致0.1mm之導通孔。
接著,將混練以銀或銅為主成分之金屬粉、樹脂、有機溶劑之電極糊填充於導通孔內並使其乾燥。接著,在陶瓷坯片上將同等之電極糊網版印刷成所欲圖案,並使其乾燥。
在此狀態下,將複數片陶瓷坯片重疊,以壓力100~1500kg/cm2 、溫度40~100℃壓接。之後,在電極糊以銀為主成分之情形在空氣中以大致850℃燒成、在電極糊以銅為主成分之情形在氮氣環境氣氛中以大致950℃燒成,以濕式鍍敷等將Ni/Sn或Ni/Au等成膜在電極以作成底基板10。
接著,如圖5(b)所示,在印刷有焊料之表面電極上構裝複數個電子零件12,且亦構裝複數個端子連接基板14。端子連接基板14,在與已構裝之複數個電子零件12不接觸之位置,以端子電極142之一端側與底基板10接觸之方式構裝。例如,如圖5(b)所示,在底基板10之外周邊之對向兩邊配置端子連接基板14亦可,在底基板10之外周邊之四邊配置端子連接基板14亦可。又,複數個電子零件12不僅可構裝在底基板10之表面,當然亦可構裝在背面。
此外,複數個端子連接基板14亦可視需要配置在底基板10之外周邊附近以外。在配置在例如底基板10之大致中央部分之情形,由於在複數個端子電極142與複數個電子零件12之間不存在絕緣體,因此能使其接近,在配置相同數量之端子電極142、電子零件12之情形能使模組基板小型化。
圖6係本發明實施形態1之模組基板之在與端子連接基板14之配置方向正交之面的剖面圖。在圖6之例,端子連接基板14係配置成與底基板10之外周邊之對向兩邊大致接觸,再者配置在底基板10之大致中央部分。
如上述,根據本實施形態1,並非藉由形成在貫通孔之薄鍍膜而是藉由柱狀之端子電極142進行電氣連接,因此能使較大電流流通。又,不需要形成貫通孔、形成鍍膜等之複雜步驟,能使製程簡單,能使整體之製造成本降低。
(實施形態2)
由於配置在本發明實施形態2之模組基板之端子連接基板14之構成與實施形態1相同,因此賦予相同符號以省略詳細說明。本發明實施形態2之模組基板與實施形態1之不同點在於,在底基板10構裝複數個電子零件12及複數個端子連接基板14之後,以樹脂將構裝後之複數個電子零件12及端子連接基板14加以密封,研磨密封後之樹脂之上面。
圖7係顯示本發明實施形態2之模組基板之製程之在與端子連接基板14之配置方向正交之面的剖面圖。首先,如圖7(a)所示,在印刷有焊料之底基板10之表面電極上構裝複數個電子零件12,且亦構裝複數個端子連接基板14。複數個端子連接基板14,係以配置在底基板10之周緣部、例如底基板10之外周邊之對向兩邊之方式構裝,接著亦構裝在底基板10之大致中央部分。又,複數個電子零件12不僅可構裝在底基板10之表面,亦可構裝在背面。在本實施形態2,構裝在表面背面兩面。
接著,如圖7(b)所示,在表面背面兩面層壓樹脂片(樹脂)21。樹脂片21係使用在PET膜上使複合樹脂成型而半硬化者。複合樹脂係使環氧、酚醛、氫酸酯等熱硬化性樹脂與Al2 O3 、SiO2 、TiO2 等無機填劑混合之複合材料。在層壓樹脂片21時,藉由將具有所欲厚度之間隔物配置在底基板10之周圍,能將層壓後之樹脂片21確保在所欲厚度。將此狀態之底基板10放入烤爐,使樹脂片21完全硬化。
在本實施形態2,如上述,在表面背面兩面一次層壓樹脂片21並使其硬化,但在表面、背面個別層壓並使其硬化亦可。
接著,如圖7(c)所示,以未圖示之輥型刀片等研磨密封後之樹脂21之上面。即使在複數個端子連接基板14之高度因焊料等產生偏差之情形,由於複數個端子電極142為柱狀,因此研磨硬化後之樹脂片21之結果,從樹脂21之頂面露出之複數個端子電極142之形狀大致一致。是以,能與母基板確實地連接。
接著,在露出之複數個端子電極142之上面施加Ni/Au鍍敷。當然,在施加Ni/Au鍍敷前藉由導電性糊形成NC電極亦可。藉由形成NC電極,能增加與母基板連接之電極數,易於使衝擊分散,可提升對模組基板落下時之衝擊之強度。
圖8係顯示形成本發明實施形態2之模組基板之NC電極時之步驟之在與端子連接基板14之配置方向正交之面的剖面圖。如圖8(a)所示,在露出之複數個端子電極142之上面施加Ni/Au鍍敷前,在密封後之樹脂21之上面印刷形成複數個NC電極101。接著,如圖8(b)所示,在露出之複數個端子電極142之上面、及形成之複數個NC電極101之上面施加Ni/Au鍍敷102。藉此,能增加與母基板連接之電極數,可提升對模組基板落下時之衝擊之強度。
又,在施加Ni/Au鍍敷102之前施加光阻印刷亦可。圖9係顯示在本發明實施形態2之模組基板施加光阻印刷時之步驟的立體圖。在圖9(a)之例,端子連接基板14之複數個端子電極142之剖面形狀為六角形。圖9(b)中,以複數個端子電極142之剖面形狀成為矩形112之方式印刷光阻111,在露出之複數個端子電極142之上面施加Ni/Au鍍敷。
藉由上述方式,由於可被覆複數個端子電極142之周緣部,因此能防止水分從上面浸入等,提升作為模組基板之可靠性。又,複數個端子電極142之剖面形狀亦能容易變更成任意形狀,在圖9之例為從六角形變更成矩形。
再者,在施加Ni/Au鍍敷之前施加再配線亦可。將端子連接基板14配置在模組基板之外周邊附近之情形,複數個端子電極142集中在模組基板之周緣部。因此,以將端子電極142之位置從模組基板之周緣部變更成所欲位置之方式進行再配線。
再配線係藉由網版印刷、噴墨等施加在密封後之樹脂21之上面。又,在形成屏蔽用配線圖案後,以化學鍍進行再配線亦可。在再配線後之端子電極142之周邊印刷耐焊劑,形成外部連接用之凸塊亦可。
圖10係在本發明實施形態2之模組基板施加再配線時之在與端子連接基板14之配置方向正交之面的剖面圖。如圖10所示,將耐焊劑121印刷在再配線圖案之周邊,與再配線圖案對應形成有複數個凸塊122。藉此,外部電極之位置並不限於複數個端子電極142之位置(模組基板之外周邊附近),可提升設計上之自由度。
如上述,根據本實施形態2,並非藉由形成在貫通孔之薄鍍膜而是藉由柱狀之端子電極142進行電氣連接,因此能使較大電流流通。又,不需要形成貫通孔、形成鍍膜等之複雜步驟,能使製程簡單,能使整體之製造成本降低。
(實施形態3)
圖11係顯示本發明實施形態3之模組基板之製程的立體圖。首先,如圖11(a)所示,在能裁切出複數個模組基板(底基板10)之集合基板1之表面電極中之所欲之表面電極上印刷焊料。作為集合基板1,有LTCC(低溫同時燒成陶瓷:Low Temperature Co-fired Ceramics)基板、有機基板等,並不特別限定。
在使用LTCC基板作成模組基板之情形,首先在PET膜上塗布陶瓷漿料後,使其乾燥,作成厚度10~200μm之陶瓷坯片。對作成後之陶瓷坯片以模具、雷射等從PET膜側形成直徑大致0.1mm之導通孔。
接著,將混練以銀或銅為主成分之金屬粉、樹脂、有機溶劑之電極糊填充於導通孔內並使其乾燥。接著,在陶瓷坯片上將同等之電極糊網版印刷成所欲圖案,並使其乾燥。
在此狀態下,將複數片陶瓷坯片重疊,以壓力100~1500kg/cm2 、溫度40~100℃壓接。之後,在電極糊以銀為主成分之情形在空氣中以大致850℃燒成、在電極糊以銅為主成分之情形在氮氣環境氣氛中以大致950℃燒成,以濕式鍍敷等將Ni/Sn或Ni/Au等成膜在電極以作成集合基板1。
接著,如圖11(b)所示,在印刷有焊料之表面電極上構裝複數個電子零件12,且亦構裝複數個端子連接基板14。端子連接基板14,係以橫跨相鄰之二個模組基板之方式構裝。亦即,如圖11(b)所示,在底基板10之外周邊之對向兩邊配置端子連接基板14亦可,在底基板10之外周邊之四邊配置端子連接基板14亦可。又,電子零件12不僅可構裝在集合基板1之表面,當然亦可構裝在背面。
此外,端子連接基板14亦可視需要配置在橫跨相鄰之二個模組基板之位置以外。在配置在例如模組基板之大致中央部分之情形,由於在複數個端子電極142與複數個電子零件12之間不存在絕緣體,因此能使其接近,在配置相同數量之端子電極142、電子零件12之情形能使模組基板小型化。
接著,如圖11(c)所示,使用切刀11沿著配置成橫跨相鄰之二個模組基板之端子連接基板14之絕緣體141分斷成二個模組基板。藉由預先使切刀11之刃厚較絕緣體141之寬度厚,在分斷時絕緣體141全部被除去,如圖11(d)所示,可裁切出複數個端子電極142在側面露出之模組基板。此外,在側面露出之複數個端子電極142,係以濕式鍍敷等將Ni/Sn或Ni/Au等成膜。
圖12係本發明實施形態3之模組基板之在與切刀11之分斷方向正交之面的剖面圖。如圖12所示,端子連接基板14之絕緣體141完全被除去,在模組基板之兩側面僅柱狀之端子電極142殘留。藉此,複數個端子電極142以外不存在多餘之絕緣物,能最大限度確保可構裝電子零件12之區域。是以,能使可構裝之電子零件12之數量增加,在構裝一定數量之電子零件12之情形,能使模組基板小型化。
此外,使切刀11之刃厚較絕緣體141之寬度薄亦可。此情形,在分斷時絕緣體141不會全部被除去而殘留,可裁切出複數個端子電極142在側面不露出之模組基板。圖13係本發明實施形態3之模組基板之絕緣體141殘留時的立體圖,圖14係本發明實施形態3之模組基板之絕緣體141殘留時之在與切刀11之分斷方向正交之面的剖面圖。
如圖13及圖14所示,由於絕緣體141殘留在複數個端子電極142之外側,因此能保護側面之複數個端子電極142免於受到氧化等。又,由於複數個端子電極142在側面不露出,因此可防止焊料在模組基板之側面濕潤擴散,亦可確實地確保與外部屏蔽之絕緣性。
此外,在本實施形態3,在將在絕緣體141之兩側面配置有複數個柱狀之端子電極142之端子連接基板14構裝在集合基板1上之後進行分斷,藉此製造在絕緣體141之一側面配置有複數個柱狀之端子電極142之端子連接基板14。然而,事先準備在絕緣體141之一側面配置有複數個柱狀之端子電極142之端子連接基板14,構裝在集合基板1或裁切出之底基板10來製造模組基板亦可。
圖15係顯示配置在本發明實施形態3之模組基板之端子連接基板14之另一構成的立體圖。如圖15所示,端子連接基板14,在絕緣體141之一側面配置有柱狀之端子電極142。
如上述,根據本實施形態3,在製程不需要研磨步驟、導通形成步驟等,能使製造成本大幅降低。又,端子連接基板14之絕緣體141完全被除去,在模組基板之兩側面僅柱狀之端子電極142殘留。藉此,複數個端子電極142以外不存在多餘之絕緣物,能最大限度確保可構裝電子零件12之區域。是以,能使可構裝之電子零件12之數量增加,在構裝一定數量之電子零件12之情形,能使模組基板小型化。
又,複數個端子電極142端部確實地露出,不會有產生接觸不良之虞,且由於高度較低,因此端子電極142不易變形,不會有使相鄰之端子電極142彼此短路之虞。
(實施形態4)
由於配置在本發明實施形態4之模組基板之端子連接基板14之構成與實施形態3相同,因此賦予相同符號以省略詳細說明。本發明實施形態4之模組基板之製造方法與實施形態3之不同點在於,在集合基板1構裝複數個電子零件12及複數個端子連接基板14之後,以樹脂將構裝後之複數個電子零件12及端子連接基板14加以密封,研磨密封後之樹脂之上面。
圖16係顯示本發明實施形態4之模組基板之製程之在與端子連接基板14之配置方向正交之面的剖面圖。首先,如圖16(a)所示,在印刷有焊料之集合基板1之表面電極上構裝複數個電子零件12,且亦構裝複數個端子連接基板14。端子連接基板14,係以橫跨相鄰之兩個模組基板之方式構裝。又,複數個電子零件12不僅可構裝在集合基板1之表面,亦可構裝在背面。在本實施形態4,構裝在表面背面兩面。
接著,如圖16(b)所示,在表面背面兩面層壓樹脂片21。樹脂片(樹脂)21係使用在PET膜上使複合樹脂成型而半硬化者。複合樹脂係使環氧、酚醛、氫酸酯等熱硬化性樹脂與Al2 O3 、SiO2 、TiO2 等無機填劑混合之複合材料。在層壓樹脂片21時,藉由將具有所欲厚度之間隔物配置在裁切出模組基板之位置之周圍,能將層壓後之樹脂片21確保在所欲厚度。將此狀態之集合基板1放入烤爐,使樹脂片21完全硬化。
在本實施形態4,如上述,在表面背面兩面一次層壓樹脂片21並使其硬化,但在表面、背面個別層壓並使其硬化亦可。
接著,如圖16(c)所示,使用樹脂片21以樹脂密封,以未圖示之輥型刀片等研磨密封後之樹脂21之上面。即使在複數個端子連接基板14之高度因焊料等產生偏差之情形,由於複數個端子電極142為柱狀,因此研磨硬化後之樹脂片21之結果,露出之複數個端子電極142之形狀大致一致。是以,能與母基板確實地連接。
接著,在露出之複數個端子電極142之上面施加Ni/Au鍍敷。當然,在施加Ni/Au鍍敷前藉由導電性糊形成NC電極亦可。藉由形成NC電極,能增加與母基板連接之電極數,易於使衝擊分散,可提升對模組基板落下時之衝擊之強度。
圖17係顯示形成本發明實施形態4之模組基板之NC電極時之步驟之在與端子連接基板14之配置方向正交之面的剖面圖。如圖17(a)所示,在露出之複數個端子電極142之上面施加Ni/Au鍍敷前,在密封後之樹脂21之上面印刷複數個NC電極101。接著,如圖17(b)所示,在露出之複數個端子電極142之上面、及印刷後之複數個NC電極101之上面施加Ni/Au鍍敷102。藉此,能增加與母基板連接之電極數,可提升對模組基板落下時之衝擊之強度。
又,在施加Ni/Au鍍敷102之前施加光阻印刷亦可。圖18係顯示在本發明實施形態4之模組基板施加光阻印刷時之步驟的立體圖。在圖18(a)之例,端子連接基板14之複數個端子電極142之剖面形狀為六角形。圖18(b)中,以複數個端子電極142之剖面形狀成為矩形112之方式印刷光阻111,在與複數個端子電極142之上面之露出部分接觸之位置施加Ni/Au鍍敷。
藉由上述方式,由於可被覆複數個端子電極142之周緣部,因此能防止水分從上面浸入等,提升作為模組基板之可靠性。又,複數個端子電極142之剖面形狀亦能容易變更成任意形狀,在圖18之例為從六角形變更成矩形。
再者,在施加Ni/Au鍍敷之前施加再配線亦可。與配置端子連接基板14之位置對應設置複數個端子電極142亦可,此情形,複數個端子電極142集中在模組基板之周緣部。因此,以將端子電極142之位置從模組基板之周緣部配置在所欲位置之方式進行再配線。
再配線係藉由網版印刷、噴墨等施加在密封後之樹脂21之上面。又,在形成屏蔽用配線圖案後,以化學鍍進行再配線亦可。在再配線後之端子電極142之周邊印刷耐焊劑,形成外部連接用之凸塊亦可。
圖19係在本發明實施形態4之模組基板施加再配線時之在與端子連接基板14之配置方向正交之面的剖面圖。如圖19所示,將耐焊劑121印刷在再配線圖案之周邊,與再配線圖案對應形成有複數個凸塊122。藉此,外部電極之位置並不限於端子電極142之位置(模組基板之外周邊附近),可提升設計上之自由度。
回到圖16,如圖16(d)所示,使用切刀11將研磨密封後之樹脂21之上面確保共面性後之集合基板1分斷成複數個模組基板。由於端子連接基板14係以橫跨相鄰之二個模組基板之方式配置,因此藉由使切刀11之刃厚較絕緣體141之寬度薄,在分斷時絕緣體141不會全部被除去而殘留,可製造複數個端子電極142在側面不露出之模組基板。
由於絕緣體141殘留在複數個端子電極142之外側,因此能保護複數個端子電極142免於受到氧化等。又,由於複數個端子電極142在側面不露出,因此可防止焊料在模組基板之側面濕潤擴散,亦可確實地確保與外部屏蔽之絕緣性。
如上述,根據本實施形態4,在製程不需要導通形成步驟等,能使製造成本大幅降低。又,由於端子連接基板14之絕緣體141殘留,因此能保護側面之端子電極142免於受到氧化等。又,由於端子電極142在側面不露出,因此可防止焊料在模組基板之側面濕潤擴散,亦可確實地確保與外部屏蔽之絕緣性。
此外,本發明並不限於上述實施例,只要在本發明趣旨之範圍內當然可進行多種變形、置換等。例如,端子連接基板14之絕緣體141、與將構裝後之複數個電子零件12及端子連接基板14加以密封之樹脂21為相同組成亦可。此情形,密封後之樹脂21與絕緣體141之密合度增加,可提升對模組基板落下時之衝擊之強度,提升模組基板整體之可靠性。
1...集合基板
10...底基板
12...電子零件
14...端子連接基板
21...樹脂片、樹脂
141...絕緣體
142...端子電極
圖1係顯示配置在本發明實施形態1之模組基板之端子連接基板之構成的立體圖。
圖2(a)~(c)係顯示配置在本發明實施形態1之模組基板之端子連接基板之另一構成的立體圖。
圖3(a)~(e)係顯示配置在本發明實施形態1之模組基板之端子連接基板之製程的立體圖。
圖4係顯示配置在本發明實施形態1之模組基板之在端子電極間印刷有光阻之端子連接基板之構成的立體圖。
圖5(a)、(b)係顯示本發明實施形態1之模組基板之製程的立體圖。
圖6係本發明實施形態1之模組基板之在與端子連接基板之配置方向正交之面的剖面圖。
圖7(a)~(c)係顯示本發明實施形態2之模組基板之製程之在與端子連接基板之配置方向正交之面的剖面圖。
圖8(a)、(b)係顯示形成本發明實施形態2之模組基板之NC電極時之步驟之在與端子連接基板之配置方向正交之面的剖面圖。
圖9(a)、(b)係顯示在本發明實施形態2之模組基板施加光阻印刷時之步驟的立體圖。
圖10係在本發明實施形態2之模組基板施加再配線時之在與端子連接基板之配置方向正交之面的剖面圖。
圖11(a)~(d)係顯示本發明實施形態3之模組基板之製程的立體圖。
圖12係本發明實施形態3之模組基板之在與切刀之分斷方向正交之面的剖面圖。
圖13係本發明實施形態3之模組基板之絕緣體殘留時的立體圖。
圖14係本發明實施形態3之模組基板之絕緣體殘留時之在與切刀之分斷方向正交之面的剖面圖。
圖15係顯示配置在本發明實施形態3之模組基板之端子連接基板之另一構成的立體圖。
圖16(a)~(d)係顯示本發明實施形態4之模組基板之製程之在與端子連接基板之配置方向正交之面的剖面圖。
圖17(a)、(b)係顯示形成本發明實施形態4之模組基板之NC電極時之步驟之在與端子連接基板之配置方向正交之面的剖面圖。
圖18(a)、(b)係顯示在本發明實施形態4之模組基板施加光阻印刷時之步驟的立體圖。
圖19係在本發明實施形態4之模組基板施加再配線時之在與端子連接基板之配置方向正交之面的剖面圖。
10...底基板
12...電子零件
14...端子連接基板
141...絕緣體
142...端子電極

Claims (16)

  1. 一種模組基板,係在底基板之至少單面構裝有複數個電子零件,其特徵在於:具備在絕緣體之至少一側面配置有複數個柱狀之端子電極之端子連接基板;以複數個柱狀之該端子電極之一端側與該底基板接觸之方式,將複數個該端子連接基板構裝在該底基板;該端子連接基板,在該絕緣體之兩側面配置有複數個柱狀之該端子電極;該端子連接基板,在複數個該端子電極間印刷有光阻。
  2. 如申請專利範圍第1項之模組基板,其中,該端子連接基板,在該絕緣體之兩側面分別配置有一列複數個該端子電極。
  3. 如申請專利範圍第1或2項之模組基板,其中,以樹脂將構裝在該底基板之複數個該電子零件與該端子連接基板加以密封;該樹脂與該絕緣體為相同之組成。
  4. 一種模組基板之製造方法,係將在至少單面構裝有複數個電子零件之集合基板加以分斷,以從該集合基板裁切出複數個模組基板,其特徵在於,包含:第1步驟,將複數個在絕緣體之兩側面配置有複數個柱狀之端子電極之端子連接基板,以橫跨至少相鄰之複數個該模組基板之方式構裝在該集合基板之單面;以及第2步驟,將構裝有複數個該端子連接基板及該電子 零件之該集合基板,在欲裁切出該模組基板之位置加以分斷。
  5. 如申請專利範圍第4項之模組基板之製造方法,其中,該模組基板之俯視外形為矩形;該第1步驟,將該端子連接基板配置在該模組基板之外周邊之對向兩邊。
  6. 如申請專利範圍第4項之模組基板之製造方法,其中,該模組基板之俯視外形為矩形;該第1步驟,將該端子連接基板配置在該模組基板之外周邊之四邊。
  7. 如申請專利範圍第4至6項中任一項之模組基板之製造方法,其中,該端子連接基板,將複數個該端子電極在該絕緣體之兩側面分別配置一列。
  8. 如申請專利範圍第5或6項之模組基板之製造方法,其中,該端子連接基板,在複數個該端子電極間印刷光阻。
  9. 如申請專利範圍第4至6項中任一項之模組基板之製造方法,其中,該第2步驟,在將該集合基板分斷時,將該端子連接基板之絕緣體全部除去。
  10. 如申請專利範圍第4至6項中任一項之模組基板之製造方法,其中,該第2步驟,在將該集合基板分斷時,使該端子連接基板之絕緣體殘留。
  11. 如申請專利範圍第4至6項中任一項之模組基板之製造方法,其包含在該第1步驟之後,以樹脂將構裝在該集合基板之複數個該電子零件與該端子連接基板加以密 封,並研磨密封後之該樹脂之上面之步驟。
  12. 如申請專利範圍第11項之模組基板之製造方法,其包含在研磨密封後之該樹脂之上面之步驟之後,藉由導電性糊形成NC電極之步驟。
  13. 如申請專利範圍第11項之模組基板之製造方法,其包含在密封後之該樹脂之上面再次施加配線之步驟。
  14. 如申請專利範圍第11項之模組基板之製造方法,其包含施加光阻印刷之步驟。
  15. 如申請專利範圍第11項之模組基板之製造方法,其中,密封後之該樹脂與該端子連接基板之絕緣體為相同之組成。
  16. 一種端子連接基板,在絕緣體之至少一側面配置有複數個柱狀之端子電極;在絕緣體之兩側面配置有複數個柱狀之端子電極;在複數個該端子電極間印刷有光阻。
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