TWI336899B - - Google Patents

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TWI336899B
TWI336899B TW095121424A TW95121424A TWI336899B TW I336899 B TWI336899 B TW I336899B TW 095121424 A TW095121424 A TW 095121424A TW 95121424 A TW95121424 A TW 95121424A TW I336899 B TWI336899 B TW I336899B
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substrate
gas
insulating film
processing
doc
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TW095121424A
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TW200715353A (en
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Hiraku Ishikawa
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Tokyo Electron Ltd
Zeon Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/26Deposition of carbon only
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/448Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for generating reactive gas streams, e.g. by evaporation or sublimation of precursor materials
    • C23C16/452Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for generating reactive gas streams, e.g. by evaporation or sublimation of precursor materials by activating reactive gas streams before their introduction into the reaction chamber, e.g. by ionisation or addition of reactive species
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32009Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32192Microwave generated discharge
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02115Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material being carbon, e.g. alpha-C, diamond or hydrogen doped carbon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314Inorganic layers
    • H01L21/3146Carbon layers, e.g. diamond-like layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]

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  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Inorganic Chemistry (AREA)
  • Plasma & Fusion (AREA)
  • Analytical Chemistry (AREA)
  • Chemical Vapour Deposition (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)
  • Carbon And Carbon Compounds (AREA)

Description

1336899 九、發明說明: 【發明所屬之技術領域】 本發明係關於基板處理方法、電腦可讀取記錄媒體及基 板處理裝置者。 【先前技術】 在例如半導體裝置或液晶顯示裝置、有機EL元件等電子 裝置之製造製程中,於基板上形成有用以使例如配線之間
絕緣之層間絕緣膜。近年來,為進—步減低該配線部之電 阻或電容,正在開發具有低介電常數之層間絕緣膜。 作為可實現具有低介電常數之絕緣膜之膜材料,含有氣 之高分子膜自先前以來-直受到關注…,使用該高分 子膜之凊形時’擔心膜中的氟原子於處理基板時與周圍的 水/刀發生反應’而自膜中放出氟化氫氣體,破壞周邊之膜 而使之剝離。因此,作為絕緣膜之膜材料,已提出使用具 ^可獲得同等程度之低介電常數之非晶形碳取代含有氟之 向分子膜。 現在’作為非晶形碳之成膜方法,已提出如下方案,即 使用平行平板型錢CVD裝置向腔室内供給環狀烴氣,於 腔室内生成電㈣成膜(例如’參照專利文獻〇。使用該平 行平板型裝置之成膜方法,#由向腔室内之基板 施加偏電K吏電聚中之荷電粒子引入基板表面,而使絕 緣膜形成於基板上。 然而’使用上述成膜方法之情形時,絕緣膜之介電常數 之值(k值)為3.5左右。為使電子裝置高速化且低耗電化, 112175.doc 1336899 必須實現較低介電常數之絕緣鹎。又,使用上述成膜方法 之情形時,膜之耐熱性較差,例如於基板之熱處理時,有 時會發生膜厚變動,或膜質惡化之情形。 [專利文獻1]美國專利598 1000號公報 [發明所欲解決之問題] 本發明係鑒於上述相關問題開發而成者,其目的在於形 成種具有更低介電常數且耐熱性較好之非晶形碳絕緣 膜。
【發明内容】 為實現上述目的,本發明提供一種基板之處理方法,其 特徵在於:向收容有基板之處理容器内供給具有多重鍵之 烴氣’並於該處理容H内生成„,再於上述基板上形成 非晶形碳絕緣膜。 、根據發明者之驗證,#由使^發明之基板之處理力 ’、可开少成"電吊數為2.5左右之非晶形碳絕緣膜。又,
^虞本發明,可形成耐熱性顯著優良之絕緣膜。如此,根 务月彳形成一種具有較先前更低之介電常數且耐熱 ’較好之非晶形碳絕緣膜。 上述fe氣為乙块氣體,6 μ、+, 士 炔氣體向上述處理容器内加入上述乙炔 乳體後添加氫廣。 4.3 4 , ” 述乙炔氣體與上述氫氣亦可按 4-3〜4:1之容積比加以供給。 淹。 猎此’可減低絕緣膜之漏電 亦可將處理容器内之壓力維 上述烴氣,亦可為丁炔氣體 上述絕緣膜之形成過程t, H2175.doc 1336899 持在4.0 Pa以下。又,上述絕緣膜之形成過程中,亦可將 上述基板維持在2 0 0 °C以下。 上述絕緣膜形成後,亦可於含有氫氣之環境氣體中加熱 基板。於該情形時,可進而減低絕緣臈之介電常數,又, 減少漏電流,而形成耐熱性較好之絕緣膜。再者,上述絕 緣膜形成後,亦可於3501〜400°C之溫度下加熱基板。 又,亦可自形成上述絕緣膜後至加熱基板之期間,將基板 維持在不含氧之環境氣體中。 於上述基板之處理方法中,亦可使用微波而使電漿生成 於上述處理容器内。又,亦可將上述處理容器内部劃分為 生成電漿之電漿生成區域、與使用上述生成區域所生成之 電漿而於基板上形成絕緣膜之成膜區域,且向上述電漿生 成區域供給電漿生成用之電漿氣體,向上述成膜區域供給 上述烴氣。 亦可於未向上述處理容器内之基板施加偏電壓之狀態 下’使電漿生成於上述處理容器内。 根據其他觀點,本發明提供一種電腦可讀取記錄媒體, 其記錄用以使請求項1至12中任一項之基板之處理方法在 電腦上實現之程式。 根據其他觀點,本發明提供一種基板處理裝置,其具有 實施請求項1至12中任一項之基板處理方法之控制部。 [發明之效果] 根據本發明,由於可實現具有低介電常數且耐熱性較好 之絕緣膜,所以可製造更高速且低耗電之電子裝置。 112175.doc 1336899 【實施方式】 以下就本發明之較佳實施方式加以說明。圖丨係實施有 本發明之基板處理方法之基板處理裝置1之結構的概略平 面圖。
基板處理裝置1,如圖丨所示,其結構為匣盒台2與處理 σ3/σΥ方向(圖中之左右方向)連為一體,該匣盒台2將複 數個基板W以匣盒單位自外部相對於基板處理裝置〗搬入 搬出,或將基板w相對於匣盒c搬入搬出,而該處理台3則 具備複數個單片式處理基板w之各種裝置。 匣盒台2包含匣盒載置台4與搬送腔室5。匣盒載置台4中 可載置複數個物體,例如可沿χ方向(圖丨中之上下方向)並 列載置兩個g盒C。搬送腔室5具備例如包含多關節機械手 之基..想色赛農6與預對準平臺7'基板搬送體S可相對於匿 盒載置台、韻準平臺7、卩及處理㈡之下述 承載室30、31搬送基板w。
處理台3具有於其中央部自®盒台2向Y方向(圖】中之j 右方向)形成直線狀之搬送路8。搬送路8上覆蓋有可密制 該衫路8内部之套管Sae該套管8a上連接有例如與氣體 供給裝置2G連通之供氣管21。氣體供給裝置20可通過供氣 管:】,將例如不含氧氣之氣體、例如惰性氣體或氮氣供入 套S 83内。又’套管8a中連接有例如與排氣裝置22連通之 排氣管…藉由自供氣管2〗之供氣以及自排氣管23之排 氣’可使套管8a内维持於不含氧氣之環境氣體中。 於挾有搬送路8之义方向之兩側,沿該搬送路8,自厘盒 I12175.doc 1336899 ·. 台2側按順序配置有例如承載室30、31,絕緣膜形成裝置 * 32、33 ’退火裝置34、35。·各匣盒台3〇、31,絕緣膜形成 裝置32、33以及退火裝置34、35 ,介以閘閥%與搬送路8 相接。承載室30、31鄰接g盒台2之搬送腔室5,承載室 3〇、3丨與搬送腔室5,介以開閥37而相接。搬送腔室$内之 基板w可經由例如承載室30、31而搬送至搬送路8内。 搬送路8内設有向γ方向延伸之搬送轨道38,以及於該搬 籲 送軌道38上自由移動且包含多關節機械手之基板搬送裝置 39。搬送裝置39於搬送軌道38上移動,可介以各閘閥刊相 對於承載室30、31,絕緣臈形成裝置32、33以及退火裝置 34、35搬送基板w。 • 土板處理裝置1中设有控制部40,該控制部40用以控制 例如各裝置32〜35之基板處理製程❶控制部4〇包括例如通 用之電腦。控制部40中儲存有例如用以執行基板處理制程 之程式,控制部40藉由對各裝置32〜35輸出關於各處理製 藝程之指示信號,執行各裝置32〜35上之基板處理。控制部 4〇上設有例如安裝來自儲存媒體之程式的介面,藉由儲存 媒體所安裝之程式來執行各裝置32〜35之處理製程。 其次,就上述絕緣膜形成裝置32之結構加以說明。圖2 係換式性表示絕緣膜形成裝置32之縱剖面之結構。絕緣膜 形成裝置32係使用藉由微波而生成之電衆,在基板W上成 膜非晶形碳絕緣膜之電漿CVD(chemical va_ deposition,化學氣相沈積)裝置。 絕緣膜形成裝置32,如圖2所示,具備例如上方開口之 112175.doc 1336899 ^ 卜。卩之氣體供給源71 <目通之氣體供給管72。本實 '· 二態二氣體供給源71中·存積有稀有氣體氬氣(Ar)。 合器5 〇内之載置台5 1與輻射線槽孔天線62之間設有 /為大致平板狀之原料氣體供給構造體80。原料氣 體仏給構造體80之外形自平面觀察呈圓形狀’至少較基板 毡更大,且與載置台5 1與輻射線槽孔天線62相向而 又藉由該原料氣體供給構造體80,處理容器5〇内被劃分 籲 A輻射線槽孔天線62側之電襞生成區域汉^與載置台側之 成膜區域R2。 原料氣體供給構造體8〇,如圖3所示,包含連接有設置 . 於同一平面呈大致格子狀且連為一體之原料氣體供給管 81原料氣體供給管8 1包含例如環狀配置於原料氣體供給 構造體80外周部分之環狀管81a,以及於環狀管8u之内側 以複數根縱橫管相互正交之方式配置之格子狀管8ib。該 等原料氣體供給管8 1自軸方向觀察,縱剖面呈方形,且全 $ 部相互連通。 又,原料氣體供給構造體80,於配置為格子狀之原料氣 體供給管8 1之間之空隙處有多數個開口部82。原料氣體供 給構造體80之上側之電漿生成區域R1内所生成之電毁中之 荷電粒子,通過該開口部82進入載置部台3側之成膜區域 R2。 原料氣體供給構造體80之原料氣體供給管8 1之下面,如 圖2所示形成有多數個原料氣體供給口 83。該等原料氣體 供給口 83均勻配置於原料氣體供給構造體80面内。再者, 112175.doc 1336899 板處理加以說明。圖!所示之基板處理裝置i之搬送路8 内,藉由例如自供氣管21之供氣與自排氣管23之排氣,而 維持於不含氧之例如氮環境氣體中。而且’當收容有絕緣 :形成前之基板W之匣盒c載置於匣盒載置台4上時,該匣 盒C内之基板W藉由基板搬送體6而取出,並搬送至預對準 平臺7。於預對準平臺7進行好位置對準之基板w,藉由例 如基板搬送體6,介以閘閥37而搬送至承載室川。承載室 3〇之基板W,藉由基板搬送裝置39通過搬送路8而搬送至 絕緣膜形成裝置32。 搬送至絕緣膜形成裝置32之基板w,如圖2所示,載置 於處理容器50内之載置台51上。載置台51上所載置之基板 W,藉由加熱器52之發熱,而加熱至2〇〇〇c以下,例如8〇它 左右。接著,藉由排氣裝置91開始進行處理容器5〇内之排 氣’將處理容器50内之壓力減至例如6 67 Pa(5〇 mT〇rr)以 下’如 2.67 Pa(20 mTorr)左右。 又,於處理容器50内’自氣體供給口 7〇向電漿生成區域 R1供給電漿氣體氬氣。自輻射線槽孔天線62,向正下方之 電漿生成區域R1放射例如2 ·45 GHz之微波。藉由該微波之 放射’使電漿激發區域R1中之氬氣電漿化。此時,自賴射 線槽孔天線6 2所放射之微波’藉由原料氣體供給構造體8 〇 而反射,而存留於電漿生成區域R1内。其結果為,電聚生 成區域R1内形成高密度電漿空間。再者,進行該成膜處理 時’載置台51上所載置之基板W上未施加有偏電壓。 另一方面,電漿生成區域R1内所生成之電漿荷電粒子, 112175.doc -14 - 1336899 ' 豸過原料氣體供給構造體80之辦口部82而擴散至成膜區域 V R2。自原料氣體供給構造體80之原料氣體供給σ83向成膜 區域R2供給作為原料氣體之丁块氣體。丁块氣體藉由自例 如電漿生成區域^擴散之電漿能量而活化,而於基板w上 形成包含氫原子與碳原子之非晶形碳絕緣膜。 當基板W上形成特定厚度之絕緣膜時,例如微波之放 射、或丁炔氣體以及氬氣之供給停止,且載置台51上之基 • 板以藉由基板搬送裝置39而自處理容器50搬出。自絕緣二 形成裝置32所搬出之基板w,通過搬送路8内而搬送至退 火裝置34。其間,由於搬送路8内維持於氮氣環境氣體 ‘ 中,所以基板W上之絕緣膜不會與氧發生反應。 搬送至退火裝置34之基板W,如圖4所示,由支撐銷1〇4 支撐。自排氣管105進行排氣,處理容器1〇〇内之壓力減至 例如120 Pa(900 mT〇rr)。自氣體供給口 1〇6供給氮氣處 理容器100内維持於氬氣之環境氣體中。而且,藉由來自 # ^ & 1〇3之熱照射,將基板w加熱至300。〇〜40CTC,例如 400 C。藉由該加熱,燒固絕緣膜。 加熱特定時間之基板W,藉由基板搬送裝置39而自退火 裝置34搬出,並通過搬送路8而搬送至例如承载室η。其 後,基板W藉由基板搬送體6而收容至匣盒載置台4上之匣 盒C内,基板處理裝置丨内之一系列基板處理結束。 於此,就藉由上述基板處理而形成之絕緣膜之特性加以 驗證。首先,根據上述實施方式之基板處理條件,使用丁 快氣體對原料氣體進行成膜處理之情形時,絕緣膜之介電 112l75.doc 1336899 常數之值(k值)為2.5左右。該偉與先前原料氣體為單鍵之 CH4(曱院)氣體之情形時之k值3.5相比較,介電常數明顯降 低。 又’如本實施方式之所述形成絕緣膜後,於氬氣環境氣 體加熱溫度400°C、壓力120 Pa之條件下進行退火處理之 情形時’該退火處理時之收縮率(退火處理後之膜厚相對 於退火處理前之絕緣膜之膜厚之比例)為1.00左右。與之相 對’於先前之條件下,即’使用甲烷氣體對原料氣體進行 成膜處理後,以與上述實施方式相同之條件進行退火處理 之If圮時,收縮率在〇. 7 3左右。如此,退火處理時之收縮 率顯著改善’且絕緣膜之耐熱性提高。 因此,如本實施方式,藉由成膜處理時,作為原料氣體 供給丁炔氣體,可形成具有較先前更低之介 性較好之非晶形碳絕緣膜。 ^ 再者,發明者已確認,即使使用其他具有多重鍵之烴氣 來取代丁块氣體,例如C2h4(乙稀)氣體等具有二重鍵者, 或C2H2(乙炔)氣體、戊烯)〇-戊烯、2-戊烯)氣體等 具有三重鍵者,亦可形成具有較先前更低之介電常數且耐 熱性較好之非晶形碳絕緣膜。因此,成膜時所供給之原料 氣體不僅限於丁快氣體,其他具有多重鍵之烴亦可:、再 者,丁炔氣體中,更好的是2_丁炔氣體。 上述實施方式中, 氣體,但於具有三 料氣體,
給亦可。於該情形時,如圖5所示, 112175.doc •16, 1336899 32之氣體供給管85連接有氫氣·之氣體供給源110。又,氣 體供給源84中存積有乙炔氣體。而且,於膜形成時,自氣 體供給⑽向成膜區域R2供給乙块氣體與氫氣,而於基板 W上形成包含氫原子與碳原子之非晶形碳絕緣膜。 該情形時,最終所形成之絕緣膜介電常 U左右,與先前相比,可顯著減低介電常數。 圖6係表示氫氣相對於乙块氣體之混合比例與絕緣媒之
漏電流以及收縮率之關係之圖表。自圖6可相,若於乙 炔氣體中添加氫氣,則漏電流降低。因此,如上述實施方 式,成膜時’#由於原料氣體之乙炔氣體中添加氫氣,可 減低絕緣膜之漏電流。 又’根據圖6所示之趨勢’即於乙炔氣體中添加之氫氣 愈多,漏電流愈低,故當按照相對於乙炔氣體以4:1以上 之流量比來供給氫氣時,可將漏電流控制在 以下之範圍H方面,根據圖6所示之趨勢,即若辦 加氫氣之比例,則收縮率下降且耐熱性降低,故當按照才曰目 對於乙快氣體以4:3以下之流量比供給氫氣時,可使收縮 率維持在顯著高於先前之〇 875以上之範圍。因此,藉由 成膜時按4:3〜4:1左右之流量比(容積比)供給乙炔與氣氣, 可形成收縮率0.875以上且漏電流ix10-7(A/cm)以下之絕緣 膜,即耐熱性極好,且漏電流極少之絕緣膜。再 »» 0 季又好 疋,按2:1左右之混合比供給乙炔氣體與氫氣即可。 於上述成膜時供給乙炔氣體與氫氣之情形時,亦可將产 理容器50内之壓力維持在4〇 Pa以下(3〇 mT〇rr)。圖7係= H2175.doc 17 1336899 示成膜時處理容器50内之壓;f?與收縮率以及成膜速度 (Dep〇.Rate)之關係之實驗資料。如圊7所示,成膜時處理 容器50内之壓力4.0 pa以下之情形時,收縮率將為〇 85以 上’且成膜速度為2500x1 0·8 m/min以上。如此,藉由將成 膜時處理容器50内之壓力維持在4.0 Pa(30 mTorr)以下,可 於短時間内形成对熱性較強之絕緣膜。再者,處理容器5 〇 内之壓力較好的是1.33 Pa(10 mTorr)〜4.0 pa。
上述實施方式中,於退火處理時,向處理容器1〇〇内供 給氬氣時亦可添加氫氣。該情形時,如圖8所示,退火裝 置34之氣體供給管ι〇7連接有氫氣之氣體供給源12〇。而 且,退火處理時,自供給口 106按例如12:1之容積比向處 理容器100内供給氬氣與氫氣。藉此’於含有氫氣之環境 氣體中對基板W加以退火處理。如該例,於退火處理時將 基板W維持在含有氫氣之環境氣體中之情形時,絕緣膜之 k值減小至2.4左右。又,圖9係表示藉由該例而形成之絕 緣膜之漏電流相對於各施加電壓之圖表。圖1〇係表示如先 前之情形’即不加氫氣而形成之絕緣膜之漏電流相對於各 施加電壓之圖表。若比較圖9與圖1(),則可知添加有氣氣 之情形之絕緣臈(圖9)之漏電流變低。又,藉由發明者之驗 證,根據該例,退火處理時之收縮率亦達Ο%左右。士 此,藉由於退火處理時將基板W置於含有氫氣之環境氣^ 中’可形成具有低介電常數'耐熱性較好且 絕緣膜。 仪/之 但本發明不
以上係就本發明實施形態之—例加以說明 II2I75.doc 1336899 僅限於此例,而可採用各種態樣。如本實施形態中所载之 電漿氣體’不僅限於氬氣,.亦可使用氣氣、減等其他氣 體。又,本發明不僅限於佶用 哏π便用上述微波之絕緣膜形成裝置 32,亦可剌於使用其他成膜裝置,例如㈣電子迴旋加 速器共鳴之電漿CVD裝置、Icp電聚裝置等之基板處理。 本發明’如上述實施形態,適用於使用遙距電漿裝置之具 板處理即可,該遙距電漿裝置被劃分為生成電毁之區域鱼
藉由活性種而於基板上實施成膜之成膜區域…本發明 可適用於半導體晶圓、LCD基板、有姐基板、光罩用玻 璃基板等基板處理。 [產業上之可利用性] 本發明用於形成具有低介電常數且耐熱性較好之非晶形 碳絕緣膜。 【圖式簡單說明】 圖1係模式性表示實施形態中基板處理裝置之結構之概 略說明圖。 圖2係表H緣膜形成裳置之結構之概略縱剖面說明 圖。 圖3係原料氣體供給構造體之平面圖。 圖4係表示$火處理裝置之結構之概略縱剖面說明圖。 圖5係表示具備氫氣之氣體供給源之絕緣膜形成裝置之 結構之概略縱剖面說明圖。 圖6係表示氫氣之混合比與漏電流以及收縮率之關係之 112175.doc -19- 圖7係表示成膜時處理容器内之壓力與收縮率以及成膜 速度之關係之圖表。 圖8係表示具備氫氣之氣體供給源之退火處理裝置之結 構之概略縱剖面說明圖。 圖9係表示退火處理時供給有氫氣之絕緣膜之漏電流相 對於各施加電壓之圖表。 圖1 0係表示藉由先前之基板處理而形成之絕緣膜之漏電 "IL相對於各施加電壓之圖表。 【主要元件符號說明】 1 基板處理裝置 32 絕緣膜形成裝置 34 退火裝置 50 處理容器 51 載置台 52 加熱器 53 電源 60 密封材 61 介電體窗 62 輻射線槽孔天線 63 天線本體 64 槽孔板 65 遲相板 66 微波振盪裝置 67 同軸導波管 112175.doc •20· 1336899 70 氣體供給口 71 氣體供給源 . 72 氣體供給管 80 原料氣體供給構造體 81 原料氣體供給管 82 開口部 83 原料氣體供給口 84 原料氣體供給源 85 氣體管 90 排氣口 91 排氣裝置 92 排氣管 R1 電漿生成區域 R2 成膜區域 W 基板 112175.doc -21 -

Claims (1)

1336899
第095121424號專利申請案 中文申請專利範圍替換本(99年7月) 十、申請專利範圍: 1. 一種半導體或顯示裝置用基板之處理方法,其特徵在 於:將乙炔氣體與氫氣以4:3〜4:1之容積比供給至收容有 基板之處理容器内,使用微波於該處理容器内生成電 漿,而於上述基板上形成非晶形碳之絕緣膜; 其中上述絕緣膜之形成過程中,上述處理容器内之壓 力維持在1.33 Pa〜4.0 Pa,上述基板維持在2〇〇它以下。
2. —種半導體或顯示裝置用基板之處理方法,其特徵在 於:將丁炔氣體供給至收容有基板之處理容器内,使用 微波於該處理容器内生成電漿,而於上述基板上形成非 晶形碳之絕緣膜; 其中上述絕緣膜之形成過程中,上述處理容器内之壓 力維持在1.33 Pa〜4.0 Pa,上述基板維持在?^^以下。 3.如請求項U2之基板之處理方法,其中上述絕緣膜形成 後,於含有外加氫氣之氣體環境中加熱基板。 4‘如請求項3之基板之處理方法,其中上述絕緣膜形成 後,以35(TC〜40(TC之溫度加熱基板。 5·如請求項3之基板之處理方法,其中自上述絕緣膜形成 後至加熱基板為止之期間,將基板維持在不含氧之氣體 環境内。 6. 如請求項4之基板之盘士、^ , 恿理方法,其中自上述絕緣膜形成 後至加熱基板為止之期間,將基板維持在不含氧之氣體 環境内。 其中將上述處理容器内 如請求項1之基板之處理方法 Il2175-990702.doc 1336899 劃刀為生成電漿之電漿生成區域、與使用上述電漿生成 L/t生成之電榮於基板上形成上述絕緣膜之成膜區 且對上述電漿生成區域供給電漿生成用之電漿氣體, 對上述成膜區域供給上述乙炔氣體與上述氫氣。 求項2之基板之處理方法’其中將上述處理容器内 劃分為生成電t之電t生成區域、與使用上述電衆生成 區域所生成之電設於基板上形成上述絕緣膜之成膜區
生成用之電漿氣體, 其中於未對上述處理 ’於上述處理容器内 9. 且對上述電漿生成區域供給電聚 對上述成膜區域供給上述丁炔。 如請求項1或2之基板之處理方法, 谷器内之基板施加偏電壓之狀熊下 生成電漿。 1 0.如s青求項1或2之基板之處理方半甘士 乂埋方法,其中上述微波係由 射線槽孔天線所放射。
11. 一種電腦可讀取記錄媒體,A 瓸其δ己錄用以將如請求項! 10中任一項之基板之處理方法會 乃凌貫現在電腦上之程式。 12· —種基板處理裝置,其呈右眘 八有貫施如請求項1至10中任 項之基板處理方法之控制部。 H2l75-990702.doc 1336899 第095121424號專利申請案 中文圖式替換本(99年2月)--- 十一、圖式·· fl年^月。I曰修<吏> 正本 § 1M鉍if蜮璁硇:τ
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-4 圖9 1.E+00 1£-01 1^-08 1.E-09 1.ΕΊ0 1.E-11 2 3 4 ~°?七 •^^til £3/<^铗螺 5 Ip 7 ?-w-°
-2 施加電壓(MV/cm) 圖10 112175-fig-990201.doc
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