TW503487B - Chip scale surface mounted device and process of manufacture - Google Patents

Chip scale surface mounted device and process of manufacture Download PDF

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Publication number
TW503487B
TW503487B TW090107971A TW90107971A TW503487B TW 503487 B TW503487 B TW 503487B TW 090107971 A TW090107971 A TW 090107971A TW 90107971 A TW90107971 A TW 90107971A TW 503487 B TW503487 B TW 503487B
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Taiwan
Prior art keywords
metal
layer
electrode
die
metal electrode
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Application number
TW090107971A
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English (en)
Inventor
Martin Standing
Hazel D Schofield
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Int Rectifier Corp
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Publication of TW503487B publication Critical patent/TW503487B/zh

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    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/492—Bases or plates or solder therefor
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    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
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    • H01L23/3114—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
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  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
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Description

五、發明說明（1 ) &;^<智II.〗財產局員工消費合作社印® 發明背景 本發明係有關一種半導體元件，及特別係關於一種 新穎半導體元件之低成本製造方法。 半V肢元1T及$又體為眾所周知。於先前技術元件， 殼體面積經常為半導體元件的數倍大。進一步，於多種已 知之半導體兀件之封裝體’經由晶粒一側，通常為底面散 .、、、進步，此等封裝體使用單一元件處理技術故製造過 程成本高。 特別，目丽之半導體元件，特別功率M〇S閘控元件 ，頂接點（源）通常為含約丨.0%矽之鋁接觸層（後文稱做鋁 接觸層）。使用鋁接點的原因在於其極為適合晶圓的製造 過程。但，難以對此種鋁接點形成電連結，故通常使用接 線方法’纟中導線係藉超音波接合至下方義接點。此等 接線連結的面積有限，故成為操作中的電阻（RDWN)及發 熱來源。但，底汲接點經常為一種三重監視，該三重監視 容易被焊接或以其它方式電連結至寬廣面積的接觸面而無 需如所示進行接線，例如參考美國專利第5,451，544號。 熱主要係於被背側接觸面而由矽晶粒去除，即使大部份熱 量係產生於頂面的接面，以及於接線亦如此。 進一步已知可焊接頂接點可做為晶粒頂面，如美國 專利第5,047,833號所示。❻，用於此種可焊接頂接觸結 構之封裝體比較晶粒面積之「足跡」過大。 因此希望製造一種封裝體設計及其製法，其對相同 晶粒使用較小型封裝體，同時改良M0S閘控半導體 --------.--Γ-— --------^--------1^ (請先閱讀背面之注意事項冉场寫本頁)
刈3487 智- .¾ 財 產 局 費 合 社 印 p 、發明說明（2 ) 件之電氣特性例如Rdson。進一步希望於_種允許於生產 線上使用較小型設備及較低成本進行批次處理之方法生產 此等元件。 發明綜述 ‘ 、根據本發明之-特徵方面，刪閘控元件之晶圓及 源側覆盖有-鈍化層，較佳為光敏性液體環氧樹脂，或氣 切層等。晶圓藉旋塗、網印或以其它方式沉積液體環氧 =月曰至曰曰圓表面上。然後材料經乾燥，塗覆後之晶圓使用 標準光微影蝕刻技術暴露而成像晶圓，於鈍化層形成開口 產生多個下方來源金屬之彼此隔開之暴露表面積以及類似 的開口俾暴露出晶圓上的各個晶粒之下方閑極。如此新顆 鈍化層係做為習知鈍北層功能，進一步做為防鍍層（若有 所需）以及做為焊罩，指定設計且成形焊接區。新穎鈍化 層之開口可經由習知下方可焊接頂金屬例如鈦/鎢/鎳/銀金 屬製造。另外，若下方金屬為較為習知之鋁金屬，則暴露 之鋁可使用鈍化層、做為防鍍層而被鍍敷鎳及金或其它系列 金屬，結果獲得一種可焊接表面。鍍敷後金屬截段頂面容 、干接或以其匕方式以較低電阻接觸，比較尋常接線至铭 電極之鬲電阻連結更為低電阻。 源接觸面積有多種幾何且甚至可組成單_大面積區 然後晶圓被鋸開或以其它方式單一化變成個別晶粒 。然後個別晶粒置於下方源側，1!字形或杯形之經部份鍍 敷之汲夾使用傳導性環氧樹脂或焊料等接合汲夾至晶粒底 請 先 閱 讀 背 面 I I訂 線 h張尺度is她GNSMi規格⑵G χ 297公釐） 5|p3487 Λ： B7 五 、發明說明（ >及極而將沒夾連結至晶粒之可焊接汲側。汲夾角底部係與 晶粒之源側表面（亦即接觸凸部頂面）共面。然後晶粒外表 面於模製托盤過度模赛。大量具有此種汲夾之晶粒可同時 於模製托盤模製。 接合材料可使用鈍化材料之填角焊縫保護或藉過度 模製全部或部份總成保護。部件可使用引線框、連續長條 製造，或藉於單一塊模製元件以及由該塊而分離個別元件 於模製後，元件經過測試及藉雷射加標記而再度被 鑛割成為個別元件。 圖’式之簡要說明 率 第1圖為根據本發明可以殼體.罩住之單一化功 MOSFET晶粒之頂視圖。 第2圖為沿第1圖之截線2_2所取之剖两圖。 第3圖為第i圖之晶粒之頂視圖，該秦粒經根據本發 線 明處理而界定多個分開「可焊接」源接觸區以及「可焊接 」閘區。 第4圖為苐3圖延戴線4_4所取之剖面圖。 第5圖為類似第3圖之具有修改後之源接觸圖樣之曰 粒之視圖。 Βθ 第6圖為類似第3及5圖之更進一步大两積「可焊 源接觸圖樣之視圖。 ϋ 二圖為使用本發明之方法形成之進一步接觸形狀 一角隅閘）之頂視圖。 ’ W97公釐） 本纸張尺度綱，國家標準（⑽⑽規格（2f Λ： --一 _Β： 發明說明（4 ) 第8圖為弟7圖沿截線8 - 8所取之剖面圖。 第9圖為本發明之第一形汲夾之透視圖。 第圖為第9圖汲夾之頂視圖，模具鎖定開口係形成 於汲夾。 第11圖為第3及4圖之晶粒以及第9圖之汲夾之次總成 之頂視圖' 第I2圖為弟11圖·沿截線12 -12所取之剖面圖。 第13圖顯示第丨丨及12圖之次總成於模製托盤過度模製 後之視圖。 ^ 第Η圖為第13圖之沿截線14-14所取之剖面圖。 第15圖為第13圖之沿截線15-15所取之剖面圖。 第16圖為汲夾之進一步具體實施例之透視圖。 第17圖為第16圖汲夾之頂視圖。 第18圖為第16及17圖之汲夾與第3及4圖之一般晶粒 之過度模製後之底視圖。 第19圖為第1 8圖之沿戴線19-19所取之剖面圖。 第20圖為具有第7及8圖晶粒之形狀之杯形汲夾之底 視圖。 經濟部智慧时產局員工消費合作社印製 第21圖為第20圖之沿線21-21所取之剖面圖。 第22圖顯示於單一化之前MSOFET晶粒之晶圓。 第23圖顯示於第22圖之晶圓源面上之鈍化層之形成 以及圖樣化之處理步驟。 第24圖顯示第23圖之鈍化層之頂部之金屬化。 圖式之詳細說明 本紙張尺度適用中國國家標準（CNS)AJ規格(2]〇x 297 ) 503487
經濟elre財產局員工消費合作社印 五、發明說明（6 ) 牛固固定（或成形）於源極32,以及接觸柱37牢固固定至閘 極33 ’如第3及4圖所示。接觸柱36及37於銀頂金屬晶粒之 例係藉鈍化層之厚度變成下方齊平；以及於鍍鋁頂金屬晶 粒之例則約為鈍化層厚度之半。平坦接觸頂面為共面。至 此等接觸面之接觸係藉焊料糊達成，焊料糊之最小可印刷 焊料厚度約為層38厚度之4至5倍。 接觸柱36之樣式與第5、11及18圖所示樣式不同。進 一步’也可使用大面積可焊接接觸例如源接點4〇或41，用 於第6、第7及8圖之晶粒。形成接點36、37及40之金屬化 過程容後詳述。 於形成製備有晶粒如第3至8圖所示新穎封裝體時， 可採用第9圖之新穎傳導鍍敷（或部份鍍敷）金屬夾45。金 屬夾45可為銅合金有至少部份鍍銀表面欲對其它表面做接 觸。 - · 夾45有概略「U字形」，具有淺腳46，腳的長度比晶 粒3 1由表面47測量之柱36 ’ 37游離面加用於連結汲至夾之 平坦薄料片48經鍍敷之内面47之黏著劑厚度略大。例如， 夾具有沿腳45全長總厚度為0·7毫米，由表面47至腳46游 離端之長度為0.39毫米。腳46間之間距係依據晶粒大小決 定，且5.6毫米距離用於國際整流器公司之4.6大小晶粒， 各腳46之總寬度約為1.5毫米。 模具鎖定開口 48及49也可形成於夾45，如第1〇圖所 示。 根據本發明之特色’模具30之可焊接底汲極34係電 本紙張瓦度適用中國國家·標並（CN:S)A4規格（U0X297公釐） I I · I---- -- . I *—β 1111 » (請先閱讀背面之注意事項再填一>.;本頁) . 9
经濟部智慧財產局員工消費合作社印製 連結至且牢_ 疋至 >及炎4 5之經鍛敷内面，例如藉傳導性 霉占者'密ι| 6 0 4鱼会4» 、 、、、° ’如第12圖所示。黏著劑例如為可適當硬化 載荷銀之環氧樹脂材料。晶粒30之側緣間以及汲夾45之 腳46之對側面間分別留下間隙61及62。 °玄、、°構之維度為腳46(沒連結器）之游離面以及柱36及 37為共面。 隨後如第13、14及15圖所示，第11及12圖之元件於模 製托盤使用模製化合物7〇過度模製。模製化合物70附於汲 失45之全體暴露外表面上，但腳46之外側游離面除外。模 製化合物填補間隙61及62，如第13及15圖所示。元件現在 準備用於表面安裝於印刷電路板之傳導線上，該線係對齊 於接觸36、37及46。 第16至19圖顯示本發明之又一具體實施例，但使用 不同的夾幾何。如此，第16及17圖之夾8〇有一料片81以及 二個分段凸起腳82、83及84。具有凸起接觸36及3 7之晶粒 30首先與/及接觸（圖中未顯示）黏著至料片μ，如第μ及Η 圖所示’故接觸至36，37以及没夾凸起82、83及84之游離 面位於一共通平面。然後該元件於適當模製托盤使用模製 化合物70過度模製。 第20及21圖顯示本發明·之又一具體實施例，其中第7 及8圖之晶粒係安裝於杯形夾1 〇〇，該炎為鍍銀銅合金。夾 100之内部面積具有比晶粒30更大的長及寬，晶粒3〇之底 ί及極糟銀載荷（傳導性）壞氧樹脂102而連結至料片内表面 101(第21圖）。環氧樹脂經硬化。視需要比，低應力高黏 本纸張尺度適用中國國家標準（CNShVi規格（210 X 297公釐） ---llrlll·ll·fΛ^--------訂---------線* (請先閱讀背面之注意事項再：本頁) 10
写濟^智慈財產局員工消費合作社印製 者性環氧樹脂環103可施用於晶粒邊緣周圍，密封住封裝 體且增加封裝體之結構強度。 可焊接接點40之頂面係與汲夾之凸面1〇5共面。如此 ，全部接點1()5、4()及37將對齊印刷電路板上的接點線頭 。沒接點可呈任何適當形式若有所需可於每__側包含翠 一接觸。 第22至24圖顯示於習知晶粒之鋁電極上形成傳導柱 之新穎方法。如此，於晶粒單一化之前，於晶圓i 1〇内部 顯不多個完全相同之晶粒，|自有一閘極37及分開的源極 (圖中未編號）。雖然仍然處於晶圓形式，晶圓11〇頂面塗 佈以可光學成像之焊罩丨〗丨。焊罩丨丨丨為光敏性液體環氧樹 脂，焊罩也將做為鈍化層、防鍍層（若有所需）、以及指定 且成形用於焊接區之焊罩。但可使用其它罩材料例如氮化 矽。使用習知標線片，多個開口 n丨3至丨1丨d形成貫穿焊罩 至下方晶粒頂金屬上的源極閘接處。也可使用雷射蝕刻方 法而形成此等開口。 如第24圖所示，然後一系列金屬112鍍敷於晶圓頂面 上且鍍層黏著於源32(及其它電極）之金屬，該金屬係經開 口1Ha至liib暴露出，而與源形成接點112&至]123以及與 閘形成類似的接點。金屬丨丨以至丨丨^可由第一層鎳金屬其 鋁做良好接觸，接著為一層金組成。另外，鎳可接著為 銅層或錫層等，而以容易焊接之金屬頂面例如銀結束。 然後將晶圓，例如於線112及113鋸開分開晶粒而將晶 粒單一化。典型晶粒30之外觀如第3至8圖所示且有多個可 (請先閱讀背面之注意事項再场巧本頁) 丨裝 訂— -線· -n 1· ϋ I - 本纸張尺度適用中國(CNS)/Vi規格⑵f 297公釐） 11 / 、發明說明（ 焊接源接點及閘接點凸起高於絕緣面50。 然後將單一晶粒以汲緣側向下夾以傳導夾，夾的内 4錢有銀或若干其它傳導性塗層。晶粒使用習知接合材料 Η如W述傳導性環氧樹脂接合至夾。夾/罐可呈引線框形 式，隨後由引線框中將各個元件單一化。 雖然已經就特定具體實施例說 它變化及修改及其它用途對 、 ,^ , ι耵菜界人士顯然易知。因此較佳 本發明未受此處揭示之特定细 釆I f 、、即所限而僅受隨附之申請專 刊粑圍所限。 ：---t--···--.·1111111 ^ . I--I---I (請先閱讀背面之注意事項冉场^本頁) 經濟那智慧財產局員工消費合作社印製
12 3 0...晶粒 32.. .源極 34.. .汲極 37.. .接觸柱 40-41…源接觸 46".腳 4 8...料片 5 0...絕緣面 61-62...間隙 80.. .夾 82-84···腳 101.. .料片内面 103.. .環氧樹脂 11 〇...晶 S] llla-d...開口 112，113…線 503487 Λ； ' B： 五、發明說明（10 ) 元件標號對照 31.. .含矽接面本體 33…閘極 36.. .接觸柱 38.. .層 45.. .夾 47…表面 48-49…開口 60.. .傳導性黏著劑 70…模製化合物 81…料片 100···夾 102…環氧樹脂 105.. .凸面 111.. .焊罩 112，112a-d.··金屬 . ^ I » ^---------^---------^ (請先閱讀背面之注意事項再i-Απ本頁) 經;#却智慧財產局員工消費合作社印製 本纸張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 13

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  1. 503487 A8 B8 C8 D8 六、申請專利範圍
    第90107971號專利申請案申請專利範圍修正本 91年07月 1· -種半導體το件封裝體，包含_半導體^件晶粒其具有 平仃之頂面及底面；該頂面有一平面金屬電極，該底面 有一可焊接平面金屬電極；至少一可焊接傳導層係形成 於《亥平面金屬層之第_部份上，該至少一種可焊接傳導 曰有平面上表面，一金屬夾其具有一平坦料片部以及 至少一週邊緣部係由平坦料片部之邊緣伸展；該料片之 底面於表面係電連結表面接點至晶粒底面上的可焊接 平面金屬電極；該夾之週邊緣部係由晶粒一緣伸出且隔 開ス及止於夾緣面，該夾緣面係於與該至少一可焊 接平面金屬電極之上表面平面平行的平面且與該平面 金屬電極絕緣，因此該夾緣面與該至少一可焊接平面金 屬電極可安裝於一支持面上的金屬•化圖樣。 2·如申請專利範圍第！項之半導體元件封裝體，其令多個 彼此隔開之可焊接平面金屬柱狀電極係連結至金屬電 極且全部皆止於該平坦上表面之平面。 3·如申請專利範圍第丨項之半導體元件封裝體，其進一步 包括一第二平面金屬電極於該晶粒之頂面上，該第二金 屬電極包含-對照電極，以及一第二可焊接平面金屑電 極具有-上表面其係與該至少一可焊接平面金屬電極 UL表面共面。 4·如申請專利範圍第！項之半導體元件封裝體，其中該至 少-可焊接平面金屬電極包括—錄層連結至該金屬電 本紙張尺度適用中國國家標準（CNS) A4規格（21〇χ2974^)
    訂丨 (請先閱讀背面之注意事項再填窝本頁) 14 六、_請專利範圍 徑以及 谷焊接金屬連結於鎳層頂上。 二請專利範圍第3項之半導體元件封裝體，其… 可焊接平面電極包括一錦層連結至下方雷 —容易焊接金屬連結於鎳層頂上。 、’ 及以 圍第1至5項中任—項之半導體元件封裝 體其進-步包括-總傳導性環氧樹脂連結該料片底面 至該晶粒底面。 7.如申請專利範圍第6項之半導體元件封裝體，其中該夹 具有一第二週邊緣部於該失之與至少_週邊緣部對側 上’該第二週邊緣部係伸展出且與晶粒之對侧緣隔開以 及終結於平行該至少一週邊緣部結束的平面之平面。 8·如申請專利範圍第7項之半導體元件封裝體，其中該夹 為一杯形結構以及其中該週邊緣部為一環繞且與晶粒 外部隔開之連 '續緣部。 · 9·如申請專利範圍第8項之半導體元件封裝體，其中該晶 粒與週邊緣部間之空間係與絕緣珠粒填補。 1 〇· —種對一具有一金屬頂電極結構之半導體晶粒形成一 可焊接頂面之方法；該方法包含沉積一罩層於一晶圓表 面上’該晶圓含有多個完全相同之具有金屬頂電極結構 之晶粒；以光微影蝕刻術開啟至少第一及第二開口於多 晶粒之各晶粒上的罩層；沉積一第一金屬層，其係黏著 於罩層上的金屬電極，以及黏著於由至少第一及第二開 口暴露出之金屬電極面上；沉積一第二金屬層，其係可 焊接於第一金屬層上；去除該罩層以及覆於該罩層上之 本紙張尺度適用中國國家標準（CNS) A4規格（210X297公釐〉 15 A8 B8 C8 D8
    、申請專利範圍 第一及第二金屬層，留下於第一及第二開口形成的金屬 於原位，形成一鈍化絕緣層於藉去除罩層所暴露出之石夕 表面上，而金屬殘留於該至少第一及第二開口且凸起超 出鈍化絕緣層表面以及結束於鈍化層上方之一共通平 面；以及隨後由晶圓將該晶粒單一化。 U•如申請專利範圍第10項之方法，其中該晶圓有一共通可 焊接電極形成於其全部底面上。 12,如申請專利範圍第10或11項之方法，其中各晶粒之鋁頂 電極係分隔成為第一及第二絕緣節段；該至少第一及第 二開口分別係形成於第一及第二節段上。 13·如申請專利範圍第12項之方法，其中該至少第一及第二 開口包括多値開口於第一節段頂上俾界定多根傳導柱 連結至第一節段。 14.如申請專利範圍第13項之方法，其中該第一及第二節段 分別為功率MOSFET之源極及汲極。 15·如申請專利範圍第14項之方法，其中該罩層為光敏性聚 醯亞胺。 (請先閲讀背面之注意事項再填寫本頁) 訂·
    16
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US20050186707A1 (en) 2005-08-25
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