TW201405723A - 引線框、半導體封裝以及該等裝置之製造方法 - Google Patents

引線框、半導體封裝以及該等裝置之製造方法 Download PDF

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Publication number
TW201405723A
TW201405723A TW102112628A TW102112628A TW201405723A TW 201405723 A TW201405723 A TW 201405723A TW 102112628 A TW102112628 A TW 102112628A TW 102112628 A TW102112628 A TW 102112628A TW 201405723 A TW201405723 A TW 201405723A
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Taiwan
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lead frame
terminal
terminal portion
semiconductor package
cover
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TW102112628A
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English (en)
Chinese (zh)
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竹內之治
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新光電氣工業股份有限公司
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Publication of TW201405723A publication Critical patent/TW201405723A/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
    • H01L21/4814—Conductive parts
    • H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
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    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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    • H01L24/42—Wire connectors; Manufacturing methods related thereto
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    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
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    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
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    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
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    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
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    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49121—Beam lead frame or beam lead device

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
TW102112628A 2012-04-20 2013-04-10 引線框、半導體封裝以及該等裝置之製造方法 TW201405723A (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2012097053A JP2013225595A (ja) 2012-04-20 2012-04-20 リードフレーム及び半導体パッケージ並びにそれらの製造方法

Publications (1)

Publication Number Publication Date
TW201405723A true TW201405723A (zh) 2014-02-01

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TW102112628A TW201405723A (zh) 2012-04-20 2013-04-10 引線框、半導體封裝以及該等裝置之製造方法

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Country Link
US (1) US8853841B2 (enExample)
JP (1) JP2013225595A (enExample)
KR (1) KR20130118781A (enExample)
CN (1) CN103378045A (enExample)
TW (1) TW201405723A (enExample)

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TWI781007B (zh) * 2021-06-28 2022-10-11 南韓商海成帝愛斯股份有限公司 包括其中形成有槽的引線的引線框架
TWI897650B (zh) * 2024-09-26 2025-09-11 強茂股份有限公司 孔壁形成側面可潤濕結構的封裝元件

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JP6269417B2 (ja) * 2014-09-26 2018-01-31 三菱電機株式会社 半導体装置
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JP6840466B2 (ja) * 2016-03-08 2021-03-10 株式会社アムコー・テクノロジー・ジャパン 半導体パッケージ及び半導体パッケージの製造方法
JP6603169B2 (ja) * 2016-04-22 2019-11-06 ルネサスエレクトロニクス株式会社 半導体装置の製造方法および半導体装置
US10153424B2 (en) * 2016-08-22 2018-12-11 Rohm Co., Ltd. Semiconductor device and mounting structure of semiconductor device
JP6800745B2 (ja) * 2016-12-28 2020-12-16 株式会社ディスコ 半導体パッケージの製造方法
JP6850202B2 (ja) * 2017-06-02 2021-03-31 株式会社三井ハイテック リードフレーム、リードフレームの製造方法および半導体装置の製造方法
JP7037368B2 (ja) * 2018-01-09 2022-03-16 ローム株式会社 半導体装置および半導体装置の製造方法
EP3736857A1 (en) * 2019-05-07 2020-11-11 Nexperia B.V. Through hole side wettable flank
CN112652583A (zh) * 2019-10-10 2021-04-13 珠海格力电器股份有限公司 一种封装器件及其生产方法
CN111106089B (zh) * 2019-11-29 2021-08-17 青岛歌尔微电子研究院有限公司 高密度管脚qfn的封装结构与方法
CN111987002A (zh) * 2020-09-04 2020-11-24 长电科技（滁州）有限公司 一种封装体成型方法
IT202100005759A1 (it) * 2021-03-11 2022-09-11 St Microelectronics Srl Procedimento per fabbricare dispositivi a semiconduttore e dispositivo a semiconduttore corrispondente
CN217334014U (zh) * 2021-03-11 2022-08-30 意法半导体股份有限公司 半导体器件
JP7614985B2 (ja) * 2021-09-08 2025-01-16 Ｔｏｗａ株式会社 半導体装置の製造方法およびリードフレーム

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WO2004082019A1 (ja) * 2003-03-11 2004-09-23 The Furukawa Electric Co. Ltd. プリント配線基板、その製造方法、リードフレームパッケージおよび光モジュール
US7195953B2 (en) * 2003-04-02 2007-03-27 Yamaha Corporation Method of manufacturing a semiconductor package using a lead frame having through holes or hollows therein
JP3915794B2 (ja) * 2003-04-02 2007-05-16 ヤマハ株式会社 半導体パッケージ、その製造方法、および、これに使用するリードフレーム
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JP5546363B2 (ja) * 2010-06-11 2014-07-09 ローム株式会社 半導体装置および半導体装置の製造方法

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TWI781007B (zh) * 2021-06-28 2022-10-11 南韓商海成帝愛斯股份有限公司 包括其中形成有槽的引線的引線框架
TWI897650B (zh) * 2024-09-26 2025-09-11 強茂股份有限公司 孔壁形成側面可潤濕結構的封裝元件

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