TW200921763A - Diffusion control in heavily doped substrates - Google Patents

Diffusion control in heavily doped substrates Download PDF

Info

Publication number
TW200921763A
TW200921763A TW97124443A TW97124443A TW200921763A TW 200921763 A TW200921763 A TW 200921763A TW 97124443 A TW97124443 A TW 97124443A TW 97124443 A TW97124443 A TW 97124443A TW 200921763 A TW200921763 A TW 200921763A
Authority
TW
Taiwan
Prior art keywords
wafer
substrate
layer
highly doped
dopant
Prior art date
Application number
TW97124443A
Other languages
English (en)
Chinese (zh)
Inventor
Robert J Falster
Vladimir V Voronkov
Luca Moiraghi
Dong-Myun Lee
Chan-Rae Cho
Marco Ravani
Original Assignee
Memc Electronic Materials
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Memc Electronic Materials filed Critical Memc Electronic Materials
Publication of TW200921763A publication Critical patent/TW200921763A/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/2205—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities from the substrate during epitaxy, e.g. autodoping; Preventing or using autodoping
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • H01L21/3225—Thermally inducing defects using oxygen present in the silicon body for intrinsic gettering
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/249921—Web or sheet containing structurally defined element or component
    • Y10T428/249953—Composite having voids in a component [e.g., porous, cellular, etc.]
    • Y10T428/249961—With gradual property change within a component

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
TW97124443A 2007-06-29 2008-06-27 Diffusion control in heavily doped substrates TW200921763A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/771,683 US20090004458A1 (en) 2007-06-29 2007-06-29 Diffusion Control in Heavily Doped Substrates

Publications (1)

Publication Number Publication Date
TW200921763A true TW200921763A (en) 2009-05-16

Family

ID=40032451

Family Applications (1)

Application Number Title Priority Date Filing Date
TW97124443A TW200921763A (en) 2007-06-29 2008-06-27 Diffusion control in heavily doped substrates

Country Status (7)

Country Link
US (3) US20090004458A1 (enExample)
EP (1) EP2162902A2 (enExample)
JP (1) JP2010532585A (enExample)
KR (1) KR20100029778A (enExample)
CN (1) CN101689487B (enExample)
TW (1) TW200921763A (enExample)
WO (1) WO2009006183A2 (enExample)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090004458A1 (en) * 2007-06-29 2009-01-01 Memc Electronic Materials, Inc. Diffusion Control in Heavily Doped Substrates
US20090004426A1 (en) * 2007-06-29 2009-01-01 Memc Electronic Materials, Inc. Suppression of Oxygen Precipitation in Heavily Doped Single Crystal Silicon Substrates
DE102008027521B4 (de) 2008-06-10 2017-07-27 Infineon Technologies Austria Ag Verfahren zum Herstellen einer Halbleiterschicht
JP5609025B2 (ja) * 2009-06-29 2014-10-22 株式会社Sumco エピタキシャルシリコンウェーハの製造方法
KR102050484B1 (ko) 2013-03-04 2019-12-02 삼성디스플레이 주식회사 안트라센 유도체 및 이를 포함하는 유기전계발광소자
KR102107106B1 (ko) 2013-05-09 2020-05-07 삼성디스플레이 주식회사 스티릴계 화합물 및 이를 포함한 유기 발광 소자
KR102269131B1 (ko) 2013-07-01 2021-06-25 삼성디스플레이 주식회사 화합물 및 이를 포함한 유기 발광 소자
CN103605388B (zh) * 2013-10-25 2017-01-04 上海晶盟硅材料有限公司 通过离子注入晶片检测外延炉台温场温度的方法及校正外延炉台温场方法
US10062850B2 (en) 2013-12-12 2018-08-28 Samsung Display Co., Ltd. Amine-based compounds and organic light-emitting devices comprising the same
US9269591B2 (en) * 2014-03-24 2016-02-23 Taiwan Semiconductor Manufacturing Co., Ltd. Handle wafer for high resistivity trap-rich SOI
KR20150132795A (ko) 2014-05-16 2015-11-26 삼성디스플레이 주식회사 유기 발광 소자
KR102327086B1 (ko) 2014-06-11 2021-11-17 삼성디스플레이 주식회사 유기 발광 소자
US9425063B2 (en) * 2014-06-19 2016-08-23 Infineon Technologies Ag Method of reducing an impurity concentration in a semiconductor body, method of manufacturing a semiconductor device and semiconductor device
WO2016019051A1 (en) 2014-07-31 2016-02-04 Sunedison Semiconductor Limited Nitrogen doped and vacancy dominated silicon ingot and thermally treated wafer formed therefrom having radially uniformly distributed oxygen precipitation density and size
CN104217929A (zh) * 2014-10-11 2014-12-17 王金 一种外延片及其加工方法
KR102343145B1 (ko) 2015-01-12 2021-12-27 삼성디스플레이 주식회사 축합환 화합물 및 이를 포함한 유기 발광 소자
US9711521B2 (en) 2015-08-31 2017-07-18 Taiwan Semiconductor Manufacturing Co., Ltd. Substrate fabrication method to improve RF (radio frequency) device performance
US9761546B2 (en) 2015-10-19 2017-09-12 Taiwan Semiconductor Manufacturing Co., Ltd. Trap layer substrate stacking technique to improve performance for RF devices
JP6724852B2 (ja) * 2017-04-19 2020-07-15 株式会社Sumco エピタキシャルシリコンウェーハのエピタキシャル層厚の測定方法、及びエピタキシャルシリコンウェーハの製造方法
DE112018002163B4 (de) * 2017-04-25 2022-12-15 Sumco Corporation Verfahren zur Herstellung eines Silicium-Einkristalls, Verfahren zur Herstellung eines epitaktischen Silicium-Wafers, Silicium-Einkristall, und epitaktischer Silicium-Wafer
US11295949B2 (en) * 2019-04-01 2022-04-05 Vishay SIliconix, LLC Virtual wafer techniques for fabricating semiconductor devices
JP7312402B2 (ja) * 2019-11-22 2023-07-21 株式会社アルバック 窒化物半導体基板の製造方法
CN111733378B (zh) * 2020-05-15 2022-12-13 中国兵器科学研究院宁波分院 一种钢表面的涂层结构及其制备方法

Family Cites Families (72)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS583375B2 (ja) * 1979-01-19 1983-01-21 超エル・エス・アイ技術研究組合 シリコン単結晶ウエハ−の製造方法
JPS5680139A (en) * 1979-12-05 1981-07-01 Chiyou Lsi Gijutsu Kenkyu Kumiai Manufacture of semiconductor device
US4435896A (en) * 1981-12-07 1984-03-13 Bell Telephone Laboratories, Incorporated Method for fabricating complementary field effect transistor devices
US4437922A (en) * 1982-03-26 1984-03-20 International Business Machines Corporation Method for tailoring oxygen precipitate particle density and distribution silicon wafers
US4548654A (en) * 1983-06-03 1985-10-22 Motorola, Inc. Surface denuding of silicon wafer
JPS6031231A (ja) * 1983-07-29 1985-02-18 Toshiba Corp 半導体基体の製造方法
US4505759A (en) * 1983-12-19 1985-03-19 Mara William C O Method for making a conductive silicon substrate by heat treatment of oxygenated and lightly doped silicon single crystals
US4851358A (en) * 1988-02-11 1989-07-25 Dns Electronic Materials, Inc. Semiconductor wafer fabrication with improved control of internal gettering sites using rapid thermal annealing
US4868133A (en) * 1988-02-11 1989-09-19 Dns Electronic Materials, Inc. Semiconductor wafer fabrication with improved control of internal gettering sites using RTA
US5194395A (en) * 1988-07-28 1993-03-16 Fujitsu Limited Method of producing a substrate having semiconductor-on-insulator structure with gettering sites
JP2617798B2 (ja) * 1989-09-22 1997-06-04 三菱電機株式会社 積層型半導体装置およびその製造方法
US5095358A (en) * 1990-04-18 1992-03-10 National Semiconductor Corporation Application of electronic properties of germanium to inhibit n-type or p-type diffusion in silicon
US5024723A (en) * 1990-05-07 1991-06-18 Goesele Ulrich M Method of producing a thin silicon on insulator layer by wafer bonding and chemical thinning
IT1242014B (it) * 1990-11-15 1994-02-02 Memc Electronic Materials Procedimento per il trattamento di fette di silicio per ottenere in esse profili di precipitazione controllati per la produzione di componenti elettronici.
EP0491976B1 (de) * 1990-12-21 2000-10-25 Siemens Aktiengesellschaft Verfahren zur Herstellung einer mit Arsen dotierten glatten polykristallinen Siliziumschicht für höchstintegrierte Schaltungen
US5131979A (en) * 1991-05-21 1992-07-21 Lawrence Technology Semiconductor EPI on recycled silicon wafers
US5137838A (en) * 1991-06-05 1992-08-11 National Semiconductor Corporation Method of fabricating P-buried layers for PNP devices
FR2681472B1 (fr) * 1991-09-18 1993-10-29 Commissariat Energie Atomique Procede de fabrication de films minces de materiau semiconducteur.
JP2726583B2 (ja) * 1991-11-18 1998-03-11 三菱マテリアルシリコン株式会社 半導体基板
JP2560178B2 (ja) * 1992-06-29 1996-12-04 九州電子金属株式会社 半導体ウェーハの製造方法
JPH0684925A (ja) * 1992-07-17 1994-03-25 Toshiba Corp 半導体基板およびその処理方法
KR0139730B1 (ko) * 1993-02-23 1998-06-01 사또오 후미오 반도체 기판 및 그 제조방법
US5401669A (en) * 1993-05-13 1995-03-28 Memc Electronic Materials, Spa Process for the preparation of silicon wafers having controlled distribution of oxygen precipitate nucleation centers
JPH0786289A (ja) * 1993-07-22 1995-03-31 Toshiba Corp 半導体シリコンウェハおよびその製造方法
JPH07106512A (ja) * 1993-10-04 1995-04-21 Sharp Corp 分子イオン注入を用いたｓｉｍｏｘ処理方法
US5445975A (en) * 1994-03-07 1995-08-29 Advanced Micro Devices, Inc. Semiconductor wafer with enhanced pre-process denudation and process-induced gettering
JP2895743B2 (ja) * 1994-03-25 1999-05-24 信越半導体株式会社 Ｓｏｉ基板の製造方法
JP2874834B2 (ja) * 1994-07-29 1999-03-24 三菱マテリアル株式会社 シリコンウェーハのイントリンシックゲッタリング処理法
US5611855A (en) * 1995-01-31 1997-03-18 Seh America, Inc. Method for manufacturing a calibration wafer having a microdefect-free layer of a precisely predetermined depth
US5788763A (en) * 1995-03-09 1998-08-04 Toshiba Ceramics Co., Ltd. Manufacturing method of a silicon wafer having a controlled BMD concentration
US5593494A (en) * 1995-03-14 1997-01-14 Memc Electronic Materials, Inc. Precision controlled precipitation of oxygen in silicon
JP3085146B2 (ja) * 1995-05-31 2000-09-04 住友金属工業株式会社 シリコン単結晶ウェーハおよびその製造方法
US5792700A (en) * 1996-05-31 1998-08-11 Micron Technology, Inc. Semiconductor processing method for providing large grain polysilicon films
KR100240023B1 (ko) * 1996-11-29 2000-01-15 윤종용 반도체 웨이퍼 열처리방법 및 이에 따라 형성된 반도체 웨이퍼
US5789309A (en) * 1996-12-30 1998-08-04 Memc Electronic Materials, Inc. Method and system for monocrystalline epitaxial deposition
US6485807B1 (en) * 1997-02-13 2002-11-26 Samsung Electronics Co., Ltd. Silicon wafers having controlled distribution of defects, and methods of preparing the same
US6045610A (en) * 1997-02-13 2000-04-04 Samsung Electronics Co., Ltd. Methods of manufacturing monocrystalline silicon ingots and wafers by controlling pull rate profiles in a hot zone furnance
US6503594B2 (en) * 1997-02-13 2003-01-07 Samsung Electronics Co., Ltd. Silicon wafers having controlled distribution of defects and slip
US5994761A (en) * 1997-02-26 1999-11-30 Memc Electronic Materials Spa Ideal oxygen precipitating silicon wafers and oxygen out-diffusion-less process therefor
DE69806369T2 (de) * 1997-04-09 2003-07-10 Memc Electronic Materials, Inc. Silicium mit niedriger fehlerdichte und idealem sauerstoffniederschlag
JPH1126390A (ja) * 1997-07-07 1999-01-29 Kobe Steel Ltd 欠陥発生防止方法
US5882987A (en) * 1997-08-26 1999-03-16 International Business Machines Corporation Smart-cut process for the production of thin semiconductor material films
TW429478B (en) * 1997-08-29 2001-04-11 Toshiba Corp Semiconductor device and method for manufacturing the same
JP3395661B2 (ja) * 1998-07-07 2003-04-14 信越半導体株式会社 Ｓｏｉウエーハの製造方法
JP4405082B2 (ja) * 1998-09-02 2010-01-27 エムイーエムシー・エレクトロニック・マテリアルズ・インコーポレイテッド 内部ゲッタリング性の改良された熱アニーリングされたウエハ
WO2000013211A2 (en) * 1998-09-02 2000-03-09 Memc Electronic Materials, Inc. Silicon on insulator structure from low defect density single crystal silicon
US6336968B1 (en) * 1998-09-02 2002-01-08 Memc Electronic Materials, Inc. Non-oxygen precipitating czochralski silicon wafers
EP1110240B1 (en) * 1998-09-02 2006-10-25 MEMC Electronic Materials, Inc. Process for preparing an ideal oxygen precipitating silicon wafer
US6284384B1 (en) * 1998-12-09 2001-09-04 Memc Electronic Materials, Inc. Epitaxial silicon wafer with intrinsic gettering
AU2050900A (en) * 1998-12-28 2000-07-31 Fairchild Semiconductor Corporation Metal gate double diffusion mosfet with improved switching speed and reduced gate tunnel leakage
DE60041309D1 (de) * 1999-03-16 2009-02-26 Shinetsu Handotai Kk Herstellungsverfahren für siliziumwafer und siliziumwafer
US6346460B1 (en) * 1999-03-30 2002-02-12 Seh-America Low cost silicon substrate with impurity gettering and latch up protection and method of manufacture
US20030051656A1 (en) * 1999-06-14 2003-03-20 Charles Chiun-Chieh Yang Method for the preparation of an epitaxial silicon wafer with intrinsic gettering
US6339016B1 (en) * 2000-06-30 2002-01-15 Memc Electronic Materials, Inc. Method and apparatus for forming an epitaxial silicon wafer with a denuded zone
FR2812568B1 (fr) * 2000-08-01 2003-08-08 Sidel Sa Revetement barriere depose par plasma comprenant une couche d'interface, procede d'obtention d'un tel revetement et recipient revetu d'un tel revetement
US20020084451A1 (en) * 2000-12-29 2002-07-04 Mohr Thomas C. Silicon wafers substantially free of oxidation induced stacking faults
CN1489643A (zh) * 2001-01-02 2004-04-14 Memc 用于制备具有改善的栅氧化层完整性的单晶硅的方法
US6743495B2 (en) * 2001-03-30 2004-06-01 Memc Electronic Materials, Inc. Thermal annealing process for producing silicon wafers with improved surface characteristics
JP2004537161A (ja) * 2001-04-11 2004-12-09 エムイーエムシー・エレクトロニック・マテリアルズ・インコーポレイテッド 高抵抗率ｃｚシリコンにおけるサーマルドナー生成の制御
TW541581B (en) * 2001-04-20 2003-07-11 Memc Electronic Materials Method for the preparation of a semiconductor substrate with a non-uniform distribution of stabilized oxygen precipitates
JP2002368001A (ja) * 2001-06-07 2002-12-20 Denso Corp 半導体装置及びその製造方法
KR20040037031A (ko) * 2001-06-22 2004-05-04 엠이엠씨 일렉트로닉 머티리얼즈 인코포레이티드 이온 주입에 의한 고유 게터링을 갖는 실리콘 온인슐레이터 구조 제조 방법
JP2003124219A (ja) * 2001-10-10 2003-04-25 Sumitomo Mitsubishi Silicon Corp シリコンウエーハおよびエピタキシャルシリコンウエーハ
US6669777B2 (en) * 2001-12-06 2003-12-30 Seh America, Inc. Method of producing a high resistivity silicon wafer utilizing heat treatment that occurs during device fabrication
US6673147B2 (en) * 2001-12-06 2004-01-06 Seh America, Inc. High resistivity silicon wafer having electrically inactive dopant and method of producing same
JP2005522879A (ja) * 2002-04-10 2005-07-28 エムイーエムシー・エレクトロニック・マテリアルズ・インコーポレイテッド 理想的酸素析出シリコンウエハにおいてデヌーデッドゾーン深さを制御する方法
US6872641B1 (en) * 2003-09-23 2005-03-29 International Business Machines Corporation Strained silicon on relaxed sige film with uniform misfit dislocation density
US7273800B2 (en) * 2004-11-01 2007-09-25 International Business Machines Corporation Hetero-integrated strained silicon n- and p-MOSFETs
DE102004060624B4 (de) * 2004-12-16 2010-12-02 Siltronic Ag Halbleiterscheibe mit epitaktisch abgeschiedener Schicht und Verfahren zur Herstellung der Halbleiterscheibe
US7749875B2 (en) * 2007-02-16 2010-07-06 Infineon Technologies Ag Method of manufacturing a semiconductor element and semiconductor element
US20090004458A1 (en) * 2007-06-29 2009-01-01 Memc Electronic Materials, Inc. Diffusion Control in Heavily Doped Substrates
US20090004426A1 (en) * 2007-06-29 2009-01-01 Memc Electronic Materials, Inc. Suppression of Oxygen Precipitation in Heavily Doped Single Crystal Silicon Substrates

Also Published As

Publication number Publication date
JP2010532585A (ja) 2010-10-07
CN101689487A (zh) 2010-03-31
WO2009006183A3 (en) 2009-02-26
US20090252974A1 (en) 2009-10-08
US20110250739A1 (en) 2011-10-13
KR20100029778A (ko) 2010-03-17
CN101689487B (zh) 2011-12-28
WO2009006183A2 (en) 2009-01-08
US20090004458A1 (en) 2009-01-01
EP2162902A2 (en) 2010-03-17

Similar Documents

Publication Publication Date Title
TW200921763A (en) Diffusion control in heavily doped substrates
US7135351B2 (en) Method for controlling of thermal donor formation in high resistivity CZ silicon
US20090004426A1 (en) Suppression of Oxygen Precipitation in Heavily Doped Single Crystal Silicon Substrates
US8642449B2 (en) Silicon wafer
KR101020436B1 (ko) 실리콘 단결정 웨이퍼 및 그 제조 방법
TW201218250A (en) Silicon epitaxial wafer, method for manufacturing silicon epitaxial wafer, and method for manufacturing semiconductor element or integrated circuit
JP5428216B2 (ja) シリコンウェハ、半導体装置、シリコンウェハの製造方法および半導体装置の製造方法
TWI278539B (en) Process for preparing a stabilized ideal oxygen precipitating silicon wafer
TWI628317B (zh) 柴氏拉晶法生長單晶矽的方法
TWI855103B (zh) 摻雜碳之矽單晶晶圓及其製造方法
JP5076326B2 (ja) シリコンウェーハおよびその製造方法
JP3870293B2 (ja) シリコン半導体基板及びその製造方法
JP5103745B2 (ja) 高周波ダイオードおよびその製造方法
JP2010251523A (ja) 部分ｓｏｉウェーハの製造方法
KR102808350B1 (ko) 탄소도프 실리콘 단결정 웨이퍼 및 그의 제조방법
JP2009049256A (ja) シリコンウェーハ及びその製造方法
JP2006228763A (ja) 単結晶ＳｉＣ基板の製造方法
JP2011054655A (ja) 高周波デバイス向けシリコンウェーハおよびその製造方法
KR20180115281A (ko) Fz 실리콘 및 fz 실리콘 준비 방법
JP5922858B2 (ja) 高抵抗シリコンウェーハの製造方法
JP4550870B2 (ja) 半導体装置の製造方法
JP2010062219A (ja) 炭化シリコンの製造方法
KR100385961B1 (ko) 제어된 결함 분포를 갖는 실리콘 웨이퍼 및 그의 제조공정