RU95103102A - Полупроводниковое запоминающее устройство (варианты) - Google Patents
Полупроводниковое запоминающее устройство (варианты)Info
- Publication number
- RU95103102A RU95103102A RU95103102/09A RU95103102A RU95103102A RU 95103102 A RU95103102 A RU 95103102A RU 95103102/09 A RU95103102/09 A RU 95103102/09A RU 95103102 A RU95103102 A RU 95103102A RU 95103102 A RU95103102 A RU 95103102A
- Authority
- RU
- Russia
- Prior art keywords
- signal
- memory units
- address
- buffer
- packet length
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1072—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for memories with random access ports synchronised on clock signal pulse trains, e.g. synchronous memories, self timed memories
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/12—Group selection circuits, e.g. for memory block selection, chip selection, array selection
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/18—Address timing or clocking circuits; Address control signal generation or management, e.g. for row address strobe [RAS] or column address strobe [CAS] signals
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Dram (AREA)
- Static Random-Access Memory (AREA)
Abstract
Предлагаемое полупроводниковое запоминающее устройство, имеющее множество групп блоков памяти, буфер сигнала строба адреса строки, буфер сигнала адреса столбца и выполняющее операцию выборки данных в ответ на информацию о длине пакета и задержка, связанную с системными тактовыми импульсами заранее заданной частоты, содержит прибор для выборки сигнала, который автоматически предзаряжает одну группу блоков памяти из групп блоков памяти по сигналу строба адреса строки и сигналу с информацией о длине пакета и задержке после того, как выполнена операция адресации для группы блоков памяти.
Claims (1)
- Предлагаемое полупроводниковое запоминающее устройство, имеющее множество групп блоков памяти, буфер сигнала строба адреса строки, буфер сигнала адреса столбца и выполняющее операцию выборки данных в ответ на информацию о длине пакета и задержка, связанную с системными тактовыми импульсами заранее заданной частоты, содержит прибор для выборки сигнала, который автоматически предзаряжает одну группу блоков памяти из групп блоков памяти по сигналу строба адреса строки и сигналу с информацией о длине пакета и задержке после того, как выполнена операция адресации для группы блоков памяти.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR4125/1994 | 1994-03-03 | ||
KR1019940004125A KR970001699B1 (ko) | 1994-03-03 | 1994-03-03 | 자동프리차아지기능을 가진 동기식 반도체메모리장치 |
Publications (2)
Publication Number | Publication Date |
---|---|
RU95103102A true RU95103102A (ru) | 1996-12-27 |
RU2128371C1 RU2128371C1 (ru) | 1999-03-27 |
Family
ID=19378299
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
RU95103102A RU2128371C1 (ru) | 1994-03-03 | 1995-03-02 | Полупроводниковое запоминающее устройство |
Country Status (9)
Country | Link |
---|---|
US (1) | US5555526A (ru) |
JP (1) | JP3209485B2 (ru) |
KR (1) | KR970001699B1 (ru) |
CN (1) | CN1089473C (ru) |
DE (2) | DE19549532B4 (ru) |
FR (1) | FR2716999B1 (ru) |
GB (1) | GB2287112B (ru) |
RU (1) | RU2128371C1 (ru) |
TW (1) | TW275693B (ru) |
Families Citing this family (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3394111B2 (ja) * | 1995-05-25 | 2003-04-07 | 株式会社 沖マイクロデザイン | 半導体記憶装置のデータ入力回路 |
KR0154755B1 (ko) * | 1995-07-07 | 1998-12-01 | 김광호 | 가변플레이트전압 발생회로를 구비하는 반도체 메모리장치 |
JP3272914B2 (ja) | 1995-08-31 | 2002-04-08 | 富士通株式会社 | 同期型半導体装置 |
JP3843145B2 (ja) * | 1995-12-25 | 2006-11-08 | 株式会社ルネサステクノロジ | 同期型半導体記憶装置 |
US5950219A (en) * | 1996-05-02 | 1999-09-07 | Cirrus Logic, Inc. | Memory banks with pipelined addressing and priority acknowledging and systems and methods using the same |
TW378330B (en) | 1997-06-03 | 2000-01-01 | Fujitsu Ltd | Semiconductor memory device |
KR100486195B1 (ko) * | 1997-06-27 | 2005-06-16 | 삼성전자주식회사 | 싱크로너스디램의자동프리차지제어회로 |
KR100252048B1 (ko) * | 1997-11-18 | 2000-05-01 | 윤종용 | 반도체 메모리장치의 데이터 마스킹 회로 및 데이터 마스킹방법 |
US6104418A (en) * | 1998-04-06 | 2000-08-15 | Silicon Magic Corporation | Method and system for improved memory interface during image rendering |
KR100324820B1 (ko) * | 1999-06-29 | 2002-02-28 | 박종섭 | 싱크로너스 메모리 소자 |
KR100649826B1 (ko) * | 1999-12-30 | 2006-11-24 | 주식회사 하이닉스반도체 | 반도체 메모리 소자의 오토 프리차지장치 |
DE10025569A1 (de) * | 2000-05-24 | 2001-12-13 | Infineon Technologies Ag | Integrierter Speicher mit Zeilenzugriffssteuerung zur Aktivierung und Vorladung von Zeilenleitungen und Verfahren zum Betrieb eines solchen Speichers |
JP2002015570A (ja) * | 2000-06-28 | 2002-01-18 | Toshiba Corp | 半導体メモリ |
US6728798B1 (en) * | 2000-07-28 | 2004-04-27 | Micron Technology, Inc. | Synchronous flash memory with status burst output |
KR100368970B1 (ko) * | 2000-10-24 | 2003-01-24 | 주식회사 하이닉스반도체 | 반도체 메모리 장치 |
KR100428759B1 (ko) * | 2001-06-25 | 2004-04-28 | 삼성전자주식회사 | 반도체 메모리 장치 및 이 장치의 데이터 리드 방법 |
KR100439046B1 (ko) * | 2001-06-29 | 2004-07-05 | 주식회사 하이닉스반도체 | 반도체 소자의 오토프리차지회로 |
KR100487522B1 (ko) * | 2002-04-01 | 2005-05-03 | 삼성전자주식회사 | 반도체 메모리 장치의 동작 주파수에 따라 기입 회복시간을 제어하는 프리차아지 제어 회로 및 기입 회복 시간제어 방법 |
US7124260B2 (en) * | 2002-08-26 | 2006-10-17 | Micron Technology, Inc. | Modified persistent auto precharge command protocol system and method for memory devices |
JP2004185686A (ja) * | 2002-11-29 | 2004-07-02 | Toshiba Corp | 半導体記憶装置 |
KR100593149B1 (ko) * | 2005-05-12 | 2006-06-28 | 주식회사 하이닉스반도체 | 안정적인 오토 프리차지 신호를 발생하는 반도체 메모리장치의 클럭 동기형 오토 프리차지 제어 회로 |
US7609584B2 (en) * | 2005-11-19 | 2009-10-27 | Samsung Electronics Co., Ltd. | Latency control circuit and method thereof and an auto-precharge control circuit and method thereof |
JP2009026370A (ja) | 2007-07-19 | 2009-02-05 | Spansion Llc | 同期型記憶装置及びその制御方法 |
US8583710B2 (en) * | 2010-09-17 | 2013-11-12 | Infineon Technologies Ag | Identification circuit and method for generating an identification bit using physical unclonable functions |
KR101145784B1 (ko) * | 2010-10-11 | 2012-05-17 | 에스케이하이닉스 주식회사 | 반도체 메모리 장치 및 그를 포함하는 메모리 시스템 |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2070372B (en) * | 1980-01-31 | 1983-09-28 | Tokyo Shibaura Electric Co | Semiconductor memory device |
JPS58155596A (ja) * | 1982-03-10 | 1983-09-16 | Hitachi Ltd | ダイナミツク型mosram |
JPS60115094A (ja) * | 1983-11-16 | 1985-06-21 | Fujitsu Ltd | ダイナミツクランダムアクセスメモリ装置 |
JPH0760600B2 (ja) * | 1987-08-19 | 1995-06-28 | 三菱電機株式会社 | 同期型記憶装置 |
JPH0821234B2 (ja) * | 1988-01-14 | 1996-03-04 | 三菱電機株式会社 | ダイナミック型半導体記憶装置およびその制御方法 |
US5034917A (en) * | 1988-05-26 | 1991-07-23 | Bland Patrick M | Computer system including a page mode memory with decreased access time and method of operation thereof |
JPH0373495A (ja) * | 1989-02-15 | 1991-03-28 | Ricoh Co Ltd | 半導体メモリ装置 |
JPH0814989B2 (ja) * | 1989-05-09 | 1996-02-14 | 日本電気株式会社 | 内部同期型スタティックram |
JP2603145B2 (ja) * | 1990-03-09 | 1997-04-23 | 三菱電機株式会社 | 半導体集積回路装置 |
EP0468135B1 (en) * | 1990-06-29 | 1997-05-28 | International Business Machines Corporation | A high speed dynamic, random access memory with extended reset/precharge time |
JP3476231B2 (ja) * | 1993-01-29 | 2003-12-10 | 三菱電機エンジニアリング株式会社 | 同期型半導体記憶装置および半導体記憶装置 |
US5430680A (en) * | 1993-10-12 | 1995-07-04 | United Memories, Inc. | DRAM having self-timed burst refresh mode |
-
1994
- 1994-03-03 KR KR1019940004125A patent/KR970001699B1/ko not_active IP Right Cessation
-
1995
- 1995-03-01 GB GB9504133A patent/GB2287112B/en not_active Expired - Lifetime
- 1995-03-01 FR FR9502375A patent/FR2716999B1/fr not_active Expired - Lifetime
- 1995-03-02 RU RU95103102A patent/RU2128371C1/ru active
- 1995-03-02 US US08/397,689 patent/US5555526A/en not_active Ceased
- 1995-03-03 JP JP04466795A patent/JP3209485B2/ja not_active Expired - Lifetime
- 1995-03-03 TW TW084102036A patent/TW275693B/zh not_active IP Right Cessation
- 1995-03-03 CN CN95103232A patent/CN1089473C/zh not_active Expired - Lifetime
- 1995-03-03 DE DE19549532A patent/DE19549532B4/de not_active Expired - Lifetime
- 1995-03-03 DE DE19507574A patent/DE19507574C2/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
DE19549532B4 (de) | 2009-12-03 |
US5555526A (en) | 1996-09-10 |
DE19507574A1 (de) | 1995-09-07 |
DE19507574C2 (de) | 1998-04-02 |
FR2716999B1 (fr) | 1997-08-14 |
JP3209485B2 (ja) | 2001-09-17 |
GB9504133D0 (en) | 1995-04-19 |
JPH07254278A (ja) | 1995-10-03 |
FR2716999A1 (fr) | 1995-09-08 |
CN1115103A (zh) | 1996-01-17 |
RU2128371C1 (ru) | 1999-03-27 |
KR950027834A (ko) | 1995-10-18 |
KR970001699B1 (ko) | 1997-02-13 |
CN1089473C (zh) | 2002-08-21 |
TW275693B (ru) | 1996-05-11 |
GB2287112A (en) | 1995-09-06 |
GB2287112B (en) | 1998-07-29 |
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