KR850006649A - 반도체 장치 - Google Patents
반도체 장치 Download PDFInfo
- Publication number
- KR850006649A KR850006649A KR1019850001642A KR850001642A KR850006649A KR 850006649 A KR850006649 A KR 850006649A KR 1019850001642 A KR1019850001642 A KR 1019850001642A KR 850001642 A KR850001642 A KR 850001642A KR 850006649 A KR850006649 A KR 850006649A
- Authority
- KR
- South Korea
- Prior art keywords
- semiconductor device
- conductive layer
- region
- layer
- copper
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims description 12
- 230000004888 barrier function Effects 0.000 claims description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical group [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims 5
- 229910052802 copper Inorganic materials 0.000 claims 5
- 239000010949 copper Substances 0.000 claims 5
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims 2
- 229910052581 Si3N4 Inorganic materials 0.000 claims 1
- 230000008018 melting Effects 0.000 claims 1
- 238000002844 melting Methods 0.000 claims 1
- 239000002184 metal Substances 0.000 claims 1
- 229910052751 metal Inorganic materials 0.000 claims 1
- 229910021332 silicide Inorganic materials 0.000 claims 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims 1
- 238000004519 manufacturing process Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
- H01L21/44—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/38 - H01L21/428
- H01L21/441—Deposition of conductive or insulating materials for electrodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28035—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
- H01L21/28044—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer
- H01L21/28061—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer the conductor comprising a metal or metal silicide formed by deposition, e.g. sputter deposition, i.e. without a silicidation reaction
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/45—Ohmic electrodes
- H01L29/456—Ohmic electrodes on silicon
- H01L29/458—Ohmic electrodes on silicon for thin film silicon, e.g. source or drain electrode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/4916—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen
- H01L29/4925—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement
- H01L29/4941—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement with a barrier layer between the silicon and the metal or metal silicide upper layer, e.g. Silicide/TiN/Polysilicon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Manufacturing & Machinery (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Crystallography & Structural Chemistry (AREA)
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
내용 없음
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제4도는 본 발명의 실시예에 해당하는 반도체 장치의 제작방법에 관한 단면도.
* 도면의 주요부분에 대한 부호의 설명
4 : 하전도층 5 : 장벽층
6 : 상전도층
Claims (7)
- 상전도층 및 반응방지용으로 사용된 장벽층을 사이에 두고 동(動) 영역과 접촉해 있는 하전도층을 포함하고 상기 장벽층이 터널 전류의 흐름을 위해 충분히 얇은 두께를 갖는 절연막으로 구성되는 것을 특징으로 하는 전극 배선층을 가진 반도체 장치.
- 제1항에 있어서, 상기 동영역이 MIS 반도체 장치의 게이트 부분에서 게이트 절연막 영역인 것을 특징으로 하는 반도체 장치.
- 제1항에 있어서, 상기 장벽층이 실리콘 질화물막으로 구성되는 것을 특징으로 하는 반도체 장치.
- 제1항에 있어서, 상기 하전도층이 다결정 실리콘으로 구성되고 상기 상전도층이 고융점 금속 또는 그것의 규화물로 구성되는 것을 특징으로 하는 반도체 장치.
- 제4항에 있어서, 상기 장벽층이 다결정 실리콘으로 구성되는 하전도층 표면의 진접 질화물막으로 구성되는 것을 특징으로 하는 반도체 장치.
- 제1항에 있어서, 상기 동영역은 저항전극이 배열되고 상기 하전도층이 동층과 저항 접촉되어 있는 반도체 영역으로 구성되는 것을 특징으로 하는 반도체 장치.
- 제1항에 있어서, 상기 동영역은 정류 전극이 배열되고 상기 하전도층이 동영역과 정류 접촉해 있는 반도체 영역으로 구성되는 것을 특징으로 하는 반도체 장치.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP51205 | 1984-03-19 | ||
JP59051205A JPH0673375B2 (ja) | 1984-03-19 | 1984-03-19 | 半導体装置の製造方法 |
JP59-51205 | 1984-03-19 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR850006649A true KR850006649A (ko) | 1985-10-14 |
KR900007905B1 KR900007905B1 (ko) | 1990-10-22 |
Family
ID=12880393
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019850001642A KR900007905B1 (ko) | 1984-03-19 | 1985-03-14 | 반도체장치 |
Country Status (6)
Country | Link |
---|---|
US (1) | US4935804A (ko) |
EP (1) | EP0168125B1 (ko) |
JP (1) | JPH0673375B2 (ko) |
KR (1) | KR900007905B1 (ko) |
CA (1) | CA1228680A (ko) |
DE (1) | DE3578273D1 (ko) |
Families Citing this family (45)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62124772A (ja) * | 1985-11-26 | 1987-06-06 | Hitachi Ltd | 半導体装置 |
US4974056A (en) * | 1987-05-22 | 1990-11-27 | International Business Machines Corporation | Stacked metal silicide gate structure with barrier |
JP2707582B2 (ja) * | 1988-03-31 | 1998-01-28 | ソニー株式会社 | 半導体装置 |
JP2753849B2 (ja) * | 1989-03-20 | 1998-05-20 | 猛英 白土 | 半導体装置 |
US5138425A (en) * | 1989-05-23 | 1992-08-11 | Seiko Epson Corp. | Semiconductor integrated circuit device with nitride barrier layer ion implanted with resistivity decreasing elements |
DE69007447T2 (de) * | 1989-12-20 | 1994-06-30 | Nippon Electric Co | Gatestruktur eines Halbleiterbauelementes mit darin enthaltener Oxidschicht. |
US5180688A (en) * | 1990-07-31 | 1993-01-19 | Sgs-Thomson Microelectronics, Inc. | Method of forming tunneling diffusion barrier for local interconnect and polysilicon high impedance device |
US5065225A (en) * | 1990-07-31 | 1991-11-12 | Sgs-Thomson Microelectronics, Inc. | Tunneling diffusion barrier for local interconnect and polysilicon high impedance device |
US5413966A (en) * | 1990-12-20 | 1995-05-09 | Lsi Logic Corporation | Shallow trench etch |
US5290396A (en) * | 1991-06-06 | 1994-03-01 | Lsi Logic Corporation | Trench planarization techniques |
KR100214036B1 (ko) * | 1991-02-19 | 1999-08-02 | 이데이 노부유끼 | 알루미늄계 배선형성방법 |
US5248625A (en) * | 1991-06-06 | 1993-09-28 | Lsi Logic Corporation | Techniques for forming isolation structures |
US5225358A (en) * | 1991-06-06 | 1993-07-06 | Lsi Logic Corporation | Method of forming late isolation with polishing |
US5252503A (en) * | 1991-06-06 | 1993-10-12 | Lsi Logic Corporation | Techniques for forming isolation structures |
JP2773487B2 (ja) * | 1991-10-15 | 1998-07-09 | 日本電気株式会社 | トンネルトランジスタ |
JP2887985B2 (ja) * | 1991-10-18 | 1999-05-10 | 日本電気株式会社 | 半導体装置及びその製造方法 |
US5365100A (en) * | 1993-08-30 | 1994-11-15 | Hall John H | Low voltage compound modulated integrated transistor structure |
KR0179677B1 (ko) * | 1993-12-28 | 1999-04-15 | 사토 후미오 | 반도체장치 및 그 제조방법 |
JP3045946B2 (ja) * | 1994-05-09 | 2000-05-29 | インターナショナル・ビジネス・マシーンズ・コーポレイション | 半導体デバイスの製造方法 |
EP0793860B1 (de) | 1994-11-24 | 2001-05-30 | Infineon Technologies AG | Lateraler bipolartransistor |
DE69610017D1 (de) * | 1995-05-25 | 2000-10-05 | Matsushita Electric Ind Co Ltd | Nichtlineares Element und bistabile Speicheranordnung |
US5907188A (en) * | 1995-08-25 | 1999-05-25 | Kabushiki Kaisha Toshiba | Semiconductor device with conductive oxidation preventing film and method for manufacturing the same |
US6080645A (en) | 1996-10-29 | 2000-06-27 | Micron Technology, Inc. | Method of making a doped silicon diffusion barrier region |
US6015997A (en) | 1997-02-19 | 2000-01-18 | Micron Technology, Inc. | Semiconductor structure having a doped conductive layer |
US5926730A (en) * | 1997-02-19 | 1999-07-20 | Micron Technology, Inc. | Conductor layer nitridation |
US6262458B1 (en) * | 1997-02-19 | 2001-07-17 | Micron Technology, Inc. | Low resistivity titanium silicide structures |
US5998253A (en) * | 1997-09-29 | 1999-12-07 | Siemens Aktiengesellschaft | Method of forming a dopant outdiffusion control structure including selectively grown silicon nitride in a trench capacitor of a DRAM cell |
JPH11135646A (ja) * | 1997-10-31 | 1999-05-21 | Nec Corp | 相補型mos半導体装置及びその製造方法 |
SE9704150D0 (sv) * | 1997-11-13 | 1997-11-13 | Abb Research Ltd | Semiconductor device of SiC with insulating layer a refractory metal nitride layer |
US6127698A (en) * | 1998-03-23 | 2000-10-03 | Texas Instruments - Acer Incorporated | High density/speed nonvolatile memories with a textured tunnel oxide and a high capacitive-coupling ratio |
TW439102B (en) * | 1998-12-02 | 2001-06-07 | Nippon Electric Co | Field effect transistor and method of manufacturing the same |
US6194736B1 (en) | 1998-12-17 | 2001-02-27 | International Business Machines Corporation | Quantum conductive recrystallization barrier layers |
US6198113B1 (en) | 1999-04-22 | 2001-03-06 | Acorn Technologies, Inc. | Electrostatically operated tunneling transistor |
US6310359B1 (en) | 2000-04-26 | 2001-10-30 | International Business Machines Corporation | Structures containing quantum conductive barrier layers |
JP2001332630A (ja) * | 2000-05-19 | 2001-11-30 | Sharp Corp | 半導体装置の製造方法 |
KR20020002899A (ko) * | 2000-06-30 | 2002-01-10 | 박종섭 | 반도체 소자의 게이트전극 형성방법 |
KR20020002699A (ko) * | 2000-06-30 | 2002-01-10 | 박종섭 | 트랜지스터의 제조 방법 |
US6444516B1 (en) * | 2000-07-07 | 2002-09-03 | International Business Machines Corporation | Semi-insulating diffusion barrier for low-resistivity gate conductors |
US7615402B1 (en) | 2000-07-07 | 2009-11-10 | Acorn Technologies, Inc. | Electrostatically operated tunneling transistor |
US7084423B2 (en) | 2002-08-12 | 2006-08-01 | Acorn Technologies, Inc. | Method for depinning the Fermi level of a semiconductor at an electrical junction and devices incorporating such junctions |
US6833556B2 (en) | 2002-08-12 | 2004-12-21 | Acorn Technologies, Inc. | Insulated gate field effect transistor having passivated schottky barriers to the channel |
KR100482738B1 (ko) * | 2002-12-30 | 2005-04-14 | 주식회사 하이닉스반도체 | 계면 반응이 억제된 적층 게이트전극 및 그를 구비한반도체 소자의 제조 방법 |
KR101990622B1 (ko) | 2011-11-23 | 2019-06-18 | 아콘 테크놀로지스 인코포레이티드 | 계면 원자 단일층의 삽입에 의한 ⅳ족 반도체에 대한 금속 접점의 개선 |
US9620611B1 (en) | 2016-06-17 | 2017-04-11 | Acorn Technology, Inc. | MIS contact structure with metal oxide conductor |
US10170627B2 (en) | 2016-11-18 | 2019-01-01 | Acorn Technologies, Inc. | Nanowire transistor with source and drain induced by electrical contacts with negative schottky barrier height |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3755026A (en) * | 1971-04-01 | 1973-08-28 | Sprague Electric Co | Method of making a semiconductor device having tunnel oxide contacts |
US4117506A (en) * | 1977-07-28 | 1978-09-26 | Rca Corporation | Amorphous silicon photovoltaic device having an insulating layer |
US4141022A (en) * | 1977-09-12 | 1979-02-20 | Signetics Corporation | Refractory metal contacts for IGFETS |
JPS5457875A (en) * | 1977-10-17 | 1979-05-10 | Hitachi Ltd | Semiconductor nonvolatile memory device |
US4377857A (en) * | 1980-11-18 | 1983-03-22 | Fairchild Camera & Instrument | Electrically erasable programmable read-only memory |
JPS57149751A (en) * | 1981-03-11 | 1982-09-16 | Nec Corp | Semiconductor device |
JPS584973A (ja) * | 1981-07-01 | 1983-01-12 | Hitachi Ltd | 半導体装置用電極 |
US4558344A (en) * | 1982-01-29 | 1985-12-10 | Seeq Technology, Inc. | Electrically-programmable and electrically-erasable MOS memory device |
-
1984
- 1984-03-19 JP JP59051205A patent/JPH0673375B2/ja not_active Expired - Lifetime
-
1985
- 1985-03-13 CA CA000476377A patent/CA1228680A/en not_active Expired
- 1985-03-14 KR KR1019850001642A patent/KR900007905B1/ko not_active IP Right Cessation
- 1985-03-19 EP EP85301892A patent/EP0168125B1/en not_active Expired - Lifetime
- 1985-03-19 DE DE8585301892T patent/DE3578273D1/de not_active Expired - Fee Related
-
1988
- 1988-03-03 US US07/168,589 patent/US4935804A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
KR900007905B1 (ko) | 1990-10-22 |
JPH0673375B2 (ja) | 1994-09-14 |
EP0168125B1 (en) | 1990-06-13 |
EP0168125A1 (en) | 1986-01-15 |
CA1228680A (en) | 1987-10-27 |
DE3578273D1 (de) | 1990-07-19 |
US4935804A (en) | 1990-06-19 |
JPS60195975A (ja) | 1985-10-04 |
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A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
G160 | Decision to publish patent application | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
LAPS | Lapse due to unpaid annual fee |