KR20160132751A - 전자부품 패키지 및 그 제조방법 - Google Patents
전자부품 패키지 및 그 제조방법 Download PDFInfo
- Publication number
- KR20160132751A KR20160132751A KR1020150139682A KR20150139682A KR20160132751A KR 20160132751 A KR20160132751 A KR 20160132751A KR 1020150139682 A KR1020150139682 A KR 1020150139682A KR 20150139682 A KR20150139682 A KR 20150139682A KR 20160132751 A KR20160132751 A KR 20160132751A
- Authority
- KR
- South Korea
- Prior art keywords
- electronic component
- disposed
- component package
- layer
- insulating layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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Classifications
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- H01L25/073—
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
- H10W20/49—Adaptable interconnections, e.g. fuses or antifuses
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/01—Manufacture or treatment
- H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
- H10W70/08—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers by depositing layers on the chip or wafer, e.g. "chip-first" RDLs
- H10W70/09—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers by depositing layers on the chip or wafer, e.g. "chip-first" RDLs extending onto an encapsulation that laterally surrounds the chip or wafer, e.g. fan-out wafer level package [FOWLP] RDLs
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- H01L23/28—
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- H01L23/481—
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- H01L23/498—
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- H01L23/522—
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
- H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
- H10W20/42—Vias, e.g. via plugs
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/40—Leadframes
- H10W70/421—Shapes or dispositions
- H10W70/424—Cross-sectional shapes
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
- H10W70/65—Shapes or dispositions of interconnections
- H10W70/654—Top-view layouts
- H10W70/655—Fan-out layouts
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
- H10W74/114—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations
- H10W74/117—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations the substrate having spherical bumps for external connection
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
- H10W76/10—Containers or parts thereof
- H10W76/12—Containers or parts thereof characterised by their shape
- H10W76/13—Containers comprising a conductive base serving as an interconnection
- H10W76/132—Containers comprising a conductive base serving as an interconnection having other interconnections through an insulated passage in the conductive base
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/241—Dispositions, e.g. layouts
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
- H10W72/884—Die-attach connectors and bond wires
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/941—Dispositions of bond pads
- H10W72/9413—Dispositions of bond pads on encapsulations
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/01—Manufacture or treatment
- H10W74/019—Manufacture or treatment using temporary auxiliary substrates
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
- H10W90/722—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between stacked chips
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
- H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/732—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between stacked chips
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Geometry (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Priority Applications (8)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020160047455A KR102002071B1 (ko) | 2015-05-11 | 2016-04-19 | 팬-아웃 반도체 패키지 및 그 제조방법 |
| US15/144,162 US10199337B2 (en) | 2015-05-11 | 2016-05-02 | Electronic component package and method of manufacturing the same |
| TW105114045A TWI682692B (zh) | 2015-05-11 | 2016-05-06 | 扇出半導體封裝及其製造方法 |
| JP2016093940A JP6478943B2 (ja) | 2015-05-11 | 2016-05-09 | ファンアウト半導体パッケージ及びその製造方法 |
| US15/297,831 US9984979B2 (en) | 2015-05-11 | 2016-10-19 | Fan-out semiconductor package and method of manufacturing the same |
| US15/877,021 US10256200B2 (en) | 2015-05-11 | 2018-01-22 | Electronic component package and method of manufacturing the same |
| US15/944,321 US10262949B2 (en) | 2015-05-11 | 2018-04-03 | Fan-out semiconductor package and method of manufacturing the same |
| JP2018166145A JP6683780B2 (ja) | 2015-05-11 | 2018-09-05 | ファンアウト半導体パッケージ及びその製造方法 |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020150065177 | 2015-05-11 | ||
| KR20150065177 | 2015-05-11 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| KR20160132751A true KR20160132751A (ko) | 2016-11-21 |
Family
ID=57537841
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020150139682A Pending KR20160132751A (ko) | 2015-05-11 | 2015-10-05 | 전자부품 패키지 및 그 제조방법 |
| KR1020160047455A Active KR102002071B1 (ko) | 2015-05-11 | 2016-04-19 | 팬-아웃 반도체 패키지 및 그 제조방법 |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020160047455A Active KR102002071B1 (ko) | 2015-05-11 | 2016-04-19 | 팬-아웃 반도체 패키지 및 그 제조방법 |
Country Status (3)
| Country | Link |
|---|---|
| JP (2) | JP6478943B2 (https=) |
| KR (2) | KR20160132751A (https=) |
| TW (1) | TWI682692B (https=) |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2018097408A1 (ko) * | 2016-11-28 | 2018-05-31 | 주식회사 네패스 | 절연 프레임을 이용한 반도체 패키지 및 이의 제조방법 |
| KR20190017233A (ko) * | 2017-08-10 | 2019-02-20 | 삼성전기주식회사 | 팬-아웃 반도체 패키지 |
| KR20190036266A (ko) * | 2017-09-27 | 2019-04-04 | 삼성전기주식회사 | 팬-아웃 반도체 패키지 |
| KR101982058B1 (ko) * | 2017-12-06 | 2019-05-24 | 삼성전기주식회사 | 팬-아웃 반도체 패키지 |
| WO2020067732A1 (ko) * | 2018-09-28 | 2020-04-02 | 주식회사 네패스 | 반도체 패키지 |
| KR20200036689A (ko) * | 2018-09-28 | 2020-04-07 | 주식회사 네패스 | 반도체 패키지 및 그 제조 방법 |
| KR20200036771A (ko) * | 2018-09-27 | 2020-04-07 | 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 | 집적 회로 패키지 및 방법 |
| US11355465B2 (en) | 2017-10-11 | 2022-06-07 | Sony Semiconductor Solutions Corporation | Semiconductor device including glass substrate having improved reliability and method of manufacturing the same |
| US12074104B2 (en) | 2018-09-27 | 2024-08-27 | Taiwan Semiconductor Manufacturing Company, Ltd. | Integrated circuit packages with ring-shaped substrates |
Families Citing this family (58)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP6815880B2 (ja) * | 2017-01-25 | 2021-01-20 | 株式会社ディスコ | 半導体パッケージの製造方法 |
| KR102019353B1 (ko) * | 2017-04-07 | 2019-09-09 | 삼성전자주식회사 | 팬-아웃 센서 패키지 및 이를 포함하는 광학방식 지문센서 모듈 |
| US10644046B2 (en) | 2017-04-07 | 2020-05-05 | Samsung Electronics Co., Ltd. | Fan-out sensor package and optical fingerprint sensor module including the same |
| US20180337454A1 (en) * | 2017-05-16 | 2018-11-22 | Samsung Electro-Mechanics Co., Ltd. | Filter module and front end module including the same |
| CN108878380B (zh) | 2017-05-16 | 2022-01-21 | 三星电机株式会社 | 扇出型电子器件封装件 |
| US20190006305A1 (en) * | 2017-06-29 | 2019-01-03 | Powertech Technology Inc. | Semiconductor package structure and manufacturing method thereof |
| KR102018616B1 (ko) * | 2017-07-04 | 2019-09-06 | 삼성전자주식회사 | 반도체 장치 |
| KR102077455B1 (ko) * | 2017-07-04 | 2020-02-14 | 삼성전자주식회사 | 반도체 장치 |
| KR102081086B1 (ko) * | 2017-07-07 | 2020-02-25 | 삼성전자주식회사 | 팬-아웃 반도체 패키지 모듈 |
| KR20190013051A (ko) | 2017-07-31 | 2019-02-11 | 삼성전기주식회사 | 팬-아웃 반도체 패키지 |
| US10453821B2 (en) * | 2017-08-04 | 2019-10-22 | Samsung Electronics Co., Ltd. | Connection system of semiconductor packages |
| KR102440119B1 (ko) * | 2017-08-10 | 2022-09-05 | 삼성전자주식회사 | 반도체 패키지 및 그 제조방법 |
| KR102117463B1 (ko) * | 2017-08-18 | 2020-06-02 | 삼성전기주식회사 | 팬-아웃 반도체 패키지 |
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| TWI736780B (zh) | 2017-10-31 | 2021-08-21 | 台灣積體電路製造股份有限公司 | 晶片封裝及其形成方法 |
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| KR101912290B1 (ko) | 2017-12-06 | 2018-10-29 | 삼성전기 주식회사 | 팬-아웃 반도체 패키지 |
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| KR102015910B1 (ko) * | 2018-01-24 | 2019-10-23 | 삼성전자주식회사 | 팬-아웃 센서 패키지 |
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| WO2020166567A1 (ja) * | 2019-02-15 | 2020-08-20 | 株式会社村田製作所 | 電子モジュール及び電子モジュールの製造方法 |
| KR102620534B1 (ko) * | 2019-02-15 | 2024-01-03 | 삼성전기주식회사 | 반도체 패키지 |
| CN113261094B (zh) | 2019-03-07 | 2024-04-16 | 爱玻索立克公司 | 封装基板及包括其的半导体装置 |
| KR102564761B1 (ko) | 2019-03-07 | 2023-08-07 | 앱솔릭스 인코포레이티드 | 패키징 기판 및 이를 포함하는 반도체 장치 |
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| KR20200036771A (ko) * | 2018-09-27 | 2020-04-07 | 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 | 집적 회로 패키지 및 방법 |
| US11527474B2 (en) | 2018-09-27 | 2022-12-13 | Taiwan Semiconductor Manufacturing Company, Ltd. | Integrated circuit package and method |
| US12074104B2 (en) | 2018-09-27 | 2024-08-27 | Taiwan Semiconductor Manufacturing Company, Ltd. | Integrated circuit packages with ring-shaped substrates |
| KR20200036689A (ko) * | 2018-09-28 | 2020-04-07 | 주식회사 네패스 | 반도체 패키지 및 그 제조 방법 |
| WO2020067732A1 (ko) * | 2018-09-28 | 2020-04-02 | 주식회사 네패스 | 반도체 패키지 |
| US12205904B2 (en) | 2018-09-28 | 2025-01-21 | Nepes Co., Ltd. | Wafer-level design and wiring pattern for a semiconductor package |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2016213466A (ja) | 2016-12-15 |
| JP6683780B2 (ja) | 2020-04-22 |
| KR102002071B1 (ko) | 2019-07-22 |
| KR20160132763A (ko) | 2016-11-21 |
| JP2018198333A (ja) | 2018-12-13 |
| JP6478943B2 (ja) | 2019-03-06 |
| TWI682692B (zh) | 2020-01-11 |
| TW201709777A (zh) | 2017-03-01 |
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