KR101508782B1 - 배선기판 및 그 제조방법 - Google Patents

배선기판 및 그 제조방법 Download PDF

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Publication number
KR101508782B1
KR101508782B1 KR20080112374A KR20080112374A KR101508782B1 KR 101508782 B1 KR101508782 B1 KR 101508782B1 KR 20080112374 A KR20080112374 A KR 20080112374A KR 20080112374 A KR20080112374 A KR 20080112374A KR 101508782 B1 KR101508782 B1 KR 101508782B1
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South Korea
Prior art keywords
wiring board
electronic component
component mounting
insulating layer
bending
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Korean (ko)
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KR20090049998A (ko
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주니치 나카무라
타카하루 미야모토
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신코 덴키 코교 가부시키가이샤
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49838—Geometry or layout
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49822—Multilayer substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49833—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the chip support structure consisting of a plurality of insulating substrates
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0271—Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68345—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used as a support during the manufacture of self supporting substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16235—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a via metallisation of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01046—Palladium [Pd]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1517—Multilayer substrate
    • H01L2924/15172—Fan-out arrangement of the internal vias
    • H01L2924/15174—Fan-out arrangement of the internal vias in different layers of the multilayer substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09136—Means for correcting warpage
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/0929—Conductive planes
    • H05K2201/09354—Ground conductor along edge of main surface
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09781—Dummy conductors, i.e. not used for normal transport of current; Dummy electrodes of components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
    • H05K3/205—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern using a pattern electroplated or electroformed on a metallic carrier
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Geometry (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Structure Of Printed Boards (AREA)
KR20080112374A 2007-11-14 2008-11-12 배선기판 및 그 제조방법 Active KR101508782B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JPJP-P-2007-295519 2007-11-14
JP2007295519A JP5144222B2 (ja) 2007-11-14 2007-11-14 配線基板及びその製造方法

Publications (2)

Publication Number Publication Date
KR20090049998A KR20090049998A (ko) 2009-05-19
KR101508782B1 true KR101508782B1 (ko) 2015-04-03

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Country Status (5)

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US (2) US8119930B2 (enExample)
JP (1) JP5144222B2 (enExample)
KR (1) KR101508782B1 (enExample)
CN (1) CN101436578A (enExample)
TW (1) TWI426845B (enExample)

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KR100704919B1 (ko) * 2005-10-14 2007-04-09 삼성전기주식회사 코어층이 없는 기판 및 그 제조 방법
JP5157587B2 (ja) * 2008-03-31 2013-03-06 凸版印刷株式会社 多層配線基板の製造方法
KR100956688B1 (ko) * 2008-05-13 2010-05-10 삼성전기주식회사 인쇄회로기판 및 그 제조방법
TWI458400B (zh) 2008-10-31 2014-10-21 太陽誘電股份有限公司 Printed circuit board and manufacturing method thereof
JP5193809B2 (ja) * 2008-11-05 2013-05-08 新光電気工業株式会社 配線基板及びその製造方法
CN102239753B (zh) * 2008-12-05 2013-11-06 揖斐电株式会社 多层印刷线路板和多层印刷线路板的制造方法
KR101042060B1 (ko) * 2009-05-27 2011-06-16 주식회사 코리아써키트 회로기판의 제조방법
KR101037450B1 (ko) * 2009-09-23 2011-05-26 삼성전기주식회사 패키지 기판
US20110114372A1 (en) * 2009-10-30 2011-05-19 Ibiden Co., Ltd. Printed wiring board
JP5001395B2 (ja) * 2010-03-31 2012-08-15 イビデン株式会社 配線板及び配線板の製造方法
US20120032337A1 (en) * 2010-08-06 2012-02-09 Taiwan Semiconductor Manufacturing Company, Ltd. Flip Chip Substrate Package Assembly and Process for Making Same
JP5772134B2 (ja) * 2011-03-26 2015-09-02 富士通株式会社 回路基板、その製造方法および半導体装置
JP2013048205A (ja) * 2011-07-25 2013-03-07 Ngk Spark Plug Co Ltd 配線基板の製造方法
JP5653893B2 (ja) * 2011-12-07 2015-01-14 信越化学工業株式会社 積層基板
US20130241058A1 (en) * 2012-03-16 2013-09-19 Taiwan Semiconductor Manufacturing Company, Ltd. Wire Bonding Structures for Integrated Circuits
US20130337648A1 (en) * 2012-06-14 2013-12-19 Bridge Semiconductor Corporation Method of making cavity substrate with built-in stiffener and cavity
US8987602B2 (en) * 2012-06-14 2015-03-24 Zhuhai Advanced Chip Carriers & Electronic Substrate Solutions Technologies Co. Ltd. Multilayer electronic support structure with cofabricated metal core
JP2014045025A (ja) * 2012-08-24 2014-03-13 Sony Corp 配線基板及び配線基板の製造方法
CN103857181A (zh) * 2012-12-06 2014-06-11 华为终端有限公司 Pcb板以及具有该pcb板的电子设备
JP2014229761A (ja) * 2013-05-23 2014-12-08 株式会社東芝 電子機器
US9355967B2 (en) * 2013-06-24 2016-05-31 Qualcomm Incorporated Stress compensation patterning
JP2015032649A (ja) * 2013-08-01 2015-02-16 イビデン株式会社 配線板の製造方法および配線板
KR20150125424A (ko) * 2014-04-30 2015-11-09 삼성전기주식회사 강연성 인쇄회로기판 및 강연성 인쇄회로기판의 제조 방법
JP6358431B2 (ja) 2014-08-25 2018-07-18 新光電気工業株式会社 電子部品装置及びその製造方法
JP6373219B2 (ja) * 2015-03-31 2018-08-15 太陽誘電株式会社 部品内蔵基板および半導体モジュール
US10177130B2 (en) * 2015-04-01 2019-01-08 Bridge Semiconductor Corporation Semiconductor assembly having anti-warping controller and vertical connecting element in stiffener
US20170064821A1 (en) * 2015-08-31 2017-03-02 Kristof Darmawikarta Electronic package and method forming an electrical package
KR20190019324A (ko) * 2017-08-17 2019-02-27 엘지이노텍 주식회사 통신 모듈
JP2019179831A (ja) 2018-03-30 2019-10-17 新光電気工業株式会社 配線基板、配線基板の製造方法
JP2020031090A (ja) * 2018-08-21 2020-02-27 イビデン株式会社 プリント配線板
TWI682517B (zh) * 2019-03-12 2020-01-11 力成科技股份有限公司 超薄型晶片封裝結構及其製造方法
KR102698698B1 (ko) * 2019-08-05 2024-08-27 삼성전자주식회사 반도체 패키지 장치
KR20230019650A (ko) * 2021-08-02 2023-02-09 엘지이노텍 주식회사 회로기판
KR20230065808A (ko) * 2021-11-05 2023-05-12 엘지이노텍 주식회사 회로기판 및 이를 포함하는 패키지 기판
JP2023137137A (ja) * 2022-03-17 2023-09-29 新光電気工業株式会社 配線基板及びその製造方法
KR20250030755A (ko) * 2023-08-25 2025-03-05 엘지이노텍 주식회사 회로 기판 및 이를 포함하는 반도체 패키지
KR20250129421A (ko) * 2024-02-22 2025-08-29 엘지이노텍 주식회사 회로기판 및 반도체 패키지

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JP2002076530A (ja) 2000-09-05 2002-03-15 Matsushita Electric Ind Co Ltd プリント回路基板およびプリント回路基板の製造方法
US20060273816A1 (en) 2005-06-07 2006-12-07 Shih-Ping Hsu Circuit board having a reverse build-up structure
JP2008021921A (ja) 2006-07-14 2008-01-31 Nec Electronics Corp 配線基板、半導体装置およびその製造方法

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