KR101323497B1 - 반도체 집적회로 기판용 분리 구조체와 형성 방법 - Google Patents

반도체 집적회로 기판용 분리 구조체와 형성 방법 Download PDF

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Publication number
KR101323497B1
KR101323497B1 KR1020117022767A KR20117022767A KR101323497B1 KR 101323497 B1 KR101323497 B1 KR 101323497B1 KR 1020117022767 A KR1020117022767 A KR 1020117022767A KR 20117022767 A KR20117022767 A KR 20117022767A KR 101323497 B1 KR101323497 B1 KR 101323497B1
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South Korea
Prior art keywords
trench
layer
dielectric material
dielectric
substrate
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Expired - Fee Related
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KR1020117022767A
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Korean (ko)
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KR20110111549A (ko
Inventor
리차드 케이 윌리암스
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어드밴스드 아날로직 테크놀로지스 인코퍼레이티드
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76232—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
KR1020117022767A 2005-12-09 2006-12-07 반도체 집적회로 기판용 분리 구조체와 형성 방법 Expired - Fee Related KR101323497B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/298,075 US20070132056A1 (en) 2005-12-09 2005-12-09 Isolation structures for semiconductor integrated circuit substrates and methods of forming the same
US11/298,075 2005-12-09
PCT/US2006/046579 WO2007070311A1 (en) 2005-12-09 2006-12-07 Isolation structures for semiconductor integrated circuit substrates and methods of forming the same

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
KR1020117014787A Division KR20110081909A (ko) 2005-12-09 2006-12-07 반도체 집적회로 기판용 분리 구조체와 형성 방법

Publications (2)

Publication Number Publication Date
KR20110111549A KR20110111549A (ko) 2011-10-11
KR101323497B1 true KR101323497B1 (ko) 2013-10-31

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Family Applications (4)

Application Number Title Priority Date Filing Date
KR1020117014788A Ceased KR20110079861A (ko) 2005-12-09 2006-12-07 반도체 집적회로 기판용 분리 구조체와 형성 방법
KR1020117022767A Expired - Fee Related KR101323497B1 (ko) 2005-12-09 2006-12-07 반도체 집적회로 기판용 분리 구조체와 형성 방법
KR1020117014787A Ceased KR20110081909A (ko) 2005-12-09 2006-12-07 반도체 집적회로 기판용 분리 구조체와 형성 방법
KR1020087014965A Ceased KR20080098481A (ko) 2005-12-09 2006-12-07 반도체 집적회로 기판용 분리 구조체와 형성 방법

Family Applications Before (1)

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KR1020117014788A Ceased KR20110079861A (ko) 2005-12-09 2006-12-07 반도체 집적회로 기판용 분리 구조체와 형성 방법

Family Applications After (2)

Application Number Title Priority Date Filing Date
KR1020117014787A Ceased KR20110081909A (ko) 2005-12-09 2006-12-07 반도체 집적회로 기판용 분리 구조체와 형성 방법
KR1020087014965A Ceased KR20080098481A (ko) 2005-12-09 2006-12-07 반도체 집적회로 기판용 분리 구조체와 형성 방법

Country Status (7)

Country Link
US (5) US20070132056A1 (enExample)
EP (1) EP1958249A1 (enExample)
JP (4) JP5438973B2 (enExample)
KR (4) KR20110079861A (enExample)
CN (1) CN101366112B (enExample)
TW (2) TWI544573B (enExample)
WO (1) WO2007070311A1 (enExample)

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US7939420B2 (en) * 2002-08-14 2011-05-10 Advanced Analogic Technologies, Inc. Processes for forming isolation structures for integrated circuit devices
US8513087B2 (en) * 2002-08-14 2013-08-20 Advanced Analogic Technologies, Incorporated Processes for forming isolation structures for integrated circuit devices
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US7737526B2 (en) * 2007-03-28 2010-06-15 Advanced Analogic Technologies, Inc. Isolated trench MOSFET in epi-less semiconductor sustrate
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US8067292B2 (en) * 2008-01-23 2011-11-29 Macronix International Co., Ltd. Isolation structure, non-volatile memory having the same, and method of fabricating the same
US8907405B2 (en) 2011-04-18 2014-12-09 International Business Machines Corporation Semiconductor structures with dual trench regions and methods of manufacturing the semiconductor structures
US8722479B2 (en) 2011-05-25 2014-05-13 Globalfoundries Inc. Method of protecting STI structures from erosion during processing operations
US20120326230A1 (en) * 2011-06-22 2012-12-27 International Business Machines Corporation Silicon on insulator complementary metal oxide semiconductor with an isolation formed at low temperature
KR20130006903A (ko) * 2011-06-27 2013-01-18 삼성전자주식회사 소자 분리막 구조물 및 그 형성 방법, 상기 소자 분리막 구조물을 갖는 반도체 장치 및 그 제조 방법
US8673738B2 (en) 2012-06-25 2014-03-18 International Business Machines Corporation Shallow trench isolation structures
US9768055B2 (en) * 2012-08-21 2017-09-19 Stmicroelectronics, Inc. Isolation regions for SOI devices
US9012300B2 (en) * 2012-10-01 2015-04-21 United Microelectronics Corp. Manufacturing method for a shallow trench isolation
US9455188B2 (en) * 2013-01-18 2016-09-27 Globalfoundries Inc. Through silicon via device having low stress, thin film gaps and methods for forming the same
US20140213034A1 (en) * 2013-01-29 2014-07-31 United Microelectronics Corp. Method for forming isolation structure
US20150069608A1 (en) * 2013-09-11 2015-03-12 International Business Machines Corporation Through-silicon via structure and method for improving beol dielectric performance
US9076868B1 (en) * 2014-07-18 2015-07-07 Globalfoundries Inc. Shallow trench isolation structure with sigma cavity
CN105280545A (zh) * 2014-07-24 2016-01-27 联华电子股份有限公司 半导体装置的浅沟槽隔离结构与其制造方法
US9412641B1 (en) 2015-02-23 2016-08-09 International Business Machines Corporation FinFET having controlled dielectric region height
KR102140358B1 (ko) * 2016-12-23 2020-08-03 매그나칩 반도체 유한회사 잡음 감소를 위한 분리 구조를 갖는 통합 반도체 소자
CN109216256B (zh) * 2017-07-03 2021-01-05 无锡华润上华科技有限公司 沟槽隔离结构及其制造方法
KR102828453B1 (ko) 2020-06-22 2025-07-03 삼성전자주식회사 가변 저항 메모리 소자
KR20220094440A (ko) 2020-12-29 2022-07-06 주식회사 제이디케이바이오 부착성 규조류 광배양 장치
US20250046708A1 (en) * 2023-08-04 2025-02-06 Nanya Technology Corporation Semiconductor device with protection layer and method for fabricating the same

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Publication number Publication date
TW200733297A (en) 2007-09-01
TWI460818B (zh) 2014-11-11
KR20110111549A (ko) 2011-10-11
KR20110081909A (ko) 2011-07-14
WO2007070311A1 (en) 2007-06-21
US7994605B2 (en) 2011-08-09
US7923821B2 (en) 2011-04-12
KR20080098481A (ko) 2008-11-10
CN101366112A (zh) 2009-02-11
JP2016164998A (ja) 2016-09-08
KR20110079861A (ko) 2011-07-08
JP6026486B2 (ja) 2016-11-16
US20070132056A1 (en) 2007-06-14
US20100055864A1 (en) 2010-03-04
JP6263569B2 (ja) 2018-01-17
TWI544573B (zh) 2016-08-01
US7955947B2 (en) 2011-06-07
JP5438973B2 (ja) 2014-03-12
US20080203543A1 (en) 2008-08-28
TW201419444A (zh) 2014-05-16
US20080254592A1 (en) 2008-10-16
EP1958249A1 (en) 2008-08-20
JP2013168662A (ja) 2013-08-29
JP2015062239A (ja) 2015-04-02
US7915137B2 (en) 2011-03-29
US20080203520A1 (en) 2008-08-28
JP2009518867A (ja) 2009-05-07
CN101366112B (zh) 2011-05-04

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