KR100321302B1 - 플래시 메모리의 제어 방법, 및 이 제어 방법을 이용한플래시 메모리 시스템과 이 제어 방법을 이용한 플래시메모리 칩 - Google Patents

플래시 메모리의 제어 방법, 및 이 제어 방법을 이용한플래시 메모리 시스템과 이 제어 방법을 이용한 플래시메모리 칩 Download PDF

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Publication number
KR100321302B1
KR100321302B1 KR1019990056034A KR19990056034A KR100321302B1 KR 100321302 B1 KR100321302 B1 KR 100321302B1 KR 1019990056034 A KR1019990056034 A KR 1019990056034A KR 19990056034 A KR19990056034 A KR 19990056034A KR 100321302 B1 KR100321302 B1 KR 100321302B1
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South Korea
Prior art keywords
data
error
flash memory
memory
unit
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Expired - Fee Related
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KR1019990056034A
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Korean (ko)
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KR20000048015A (ko
Inventor
다나까도모하루
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니시무로 타이죠
가부시끼가이샤 도시바
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14—Error detection or correction of the data by redundancy in operations
    • G06F11/1402—Saving, restoring, recovering or retrying
    • G06F11/1415—Saving, restoring, recovering or retrying at system level
    • G06F11/1433—Saving, restoring, recovering or retrying at system level during software upgrading
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1068—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in sector programmable memories, e.g. flash disk
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Read Only Memory (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
KR1019990056034A 1998-12-10 1999-12-09 플래시 메모리의 제어 방법, 및 이 제어 방법을 이용한플래시 메모리 시스템과 이 제어 방법을 이용한 플래시메모리 칩 Expired - Fee Related KR100321302B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP35143598A JP2000173289A (ja) 1998-12-10 1998-12-10 エラー訂正可能なフラッシュメモリシステム
JP1998-351435 1998-12-10

Publications (2)

Publication Number Publication Date
KR20000048015A KR20000048015A (ko) 2000-07-25
KR100321302B1 true KR100321302B1 (ko) 2002-03-18

Family

ID=18417275

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019990056034A Expired - Fee Related KR100321302B1 (ko) 1998-12-10 1999-12-09 플래시 메모리의 제어 방법, 및 이 제어 방법을 이용한플래시 메모리 시스템과 이 제어 방법을 이용한 플래시메모리 칩

Country Status (5)

Country Link
US (2) US6185134B1 (https=)
EP (1) EP1008936A3 (https=)
JP (1) JP2000173289A (https=)
KR (1) KR100321302B1 (https=)
TW (1) TW455874B (https=)

Families Citing this family (149)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001297316A (ja) * 2000-04-14 2001-10-26 Mitsubishi Electric Corp メモリカード及びその制御方法
JP4323707B2 (ja) * 2000-10-25 2009-09-02 富士通マイクロエレクトロニクス株式会社 フラッシュメモリの欠陥管理方法
GB2374966A (en) * 2001-04-27 2002-10-30 Ibm Capturing and analysing attempts by a reader device to read data from a data holding entity
JP2003059276A (ja) * 2001-08-08 2003-02-28 Mitsubishi Electric Corp 不揮発性半導体記憶装置
JP4059472B2 (ja) * 2001-08-09 2008-03-12 株式会社ルネサステクノロジ メモリカード及びメモリコントローラ
JP4034949B2 (ja) 2001-09-06 2008-01-16 株式会社ルネサステクノロジ 不揮発性半導体記憶装置
US20040083334A1 (en) * 2002-10-28 2004-04-29 Sandisk Corporation Method and apparatus for managing the integrity of data in non-volatile memory system
JP4299558B2 (ja) * 2003-03-17 2009-07-22 株式会社ルネサステクノロジ 情報記憶装置および情報処理システム
US7372731B2 (en) * 2003-06-17 2008-05-13 Sandisk Il Ltd. Flash memories with adaptive reference voltages
JP2005056394A (ja) * 2003-07-18 2005-03-03 Toshiba Corp 記憶装置及びメモリカード
US6917542B2 (en) * 2003-07-29 2005-07-12 Sandisk Corporation Detecting over programmed memory
US6914823B2 (en) * 2003-07-29 2005-07-05 Sandisk Corporation Detecting over programmed memory after further programming
TWI307019B (en) * 2003-12-05 2009-03-01 Hon Hai Prec Ind Co Ltd A system and method for ensuring completeness of data
US7594135B2 (en) * 2003-12-31 2009-09-22 Sandisk Corporation Flash memory system startup operation
JP4595342B2 (ja) 2004-02-19 2010-12-08 日本電気株式会社 記憶装置のデータ書き込み、読み出し方法およびデータ記憶システム
JP4357331B2 (ja) * 2004-03-24 2009-11-04 東芝メモリシステムズ株式会社 マイクロプロセッサブートアップ制御装置、及び情報処理システム
JP4722839B2 (ja) * 2004-05-19 2011-07-13 パナソニック株式会社 メモリ制御回路、不揮発性記憶装置及びメモリ制御方法
JP4135680B2 (ja) * 2004-05-31 2008-08-20 ソニー株式会社 半導体記憶装置および信号処理システム
JP2006048783A (ja) * 2004-08-02 2006-02-16 Renesas Technology Corp 不揮発性メモリおよびメモリカード
JP2006048777A (ja) * 2004-08-02 2006-02-16 Toshiba Corp Ｎａｎｄフラッシュメモリおよびデータ書き込み方法
ITMI20041968A1 (it) * 2004-10-15 2005-01-15 Atmel Corp "metodo e sistema per la gestione dei bit di indirizzo durante le operazioni di programmazione bufferizzata in un dispositivo di memoria"
JP4261462B2 (ja) * 2004-11-05 2009-04-30 株式会社東芝 不揮発性メモリシステム
JP4261461B2 (ja) * 2004-11-05 2009-04-30 株式会社東芝 半導体集積回路装置、及びそれを用いた不揮発性メモリシステム
JP4695385B2 (ja) 2004-11-30 2011-06-08 株式会社東芝 メモリカードおよびカードコントローラ
US7437653B2 (en) * 2004-12-22 2008-10-14 Sandisk Corporation Erased sector detection mechanisms
US7522457B2 (en) * 2005-03-31 2009-04-21 Sandisk Corporation Systems for erase voltage manipulation in non-volatile memory for controlled shifts in threshold voltage
US7457166B2 (en) * 2005-03-31 2008-11-25 Sandisk Corporation Erase voltage manipulation in non-volatile memory for controlled shifts in threshold voltage
US9286198B2 (en) 2005-04-21 2016-03-15 Violin Memory Method and system for storage of data in non-volatile media
US9384818B2 (en) 2005-04-21 2016-07-05 Violin Memory Memory power management
US8200887B2 (en) 2007-03-29 2012-06-12 Violin Memory, Inc. Memory management system and method
US8452929B2 (en) * 2005-04-21 2013-05-28 Violin Memory Inc. Method and system for storage of data in non-volatile media
US7958430B1 (en) * 2005-06-20 2011-06-07 Cypress Semiconductor Corporation Flash memory device and method
JP4761910B2 (ja) * 2005-10-05 2011-08-31 株式会社東芝 不揮発性半導体記憶装置及びそれを用いた不揮発性メモリシステム
JP4791831B2 (ja) * 2006-01-20 2011-10-12 株式会社東芝 半導体記憶装置
JP4846384B2 (ja) * 2006-02-20 2011-12-28 株式会社東芝 半導体記憶装置
JP4836608B2 (ja) * 2006-02-27 2011-12-14 株式会社東芝 半導体記憶装置
JP4864006B2 (ja) * 2006-04-06 2012-01-25 株式会社アドバンテスト 試験装置および試験方法
CN103280239B (zh) * 2006-05-12 2016-04-06 苹果公司 存储设备中的失真估计和消除
US8156403B2 (en) 2006-05-12 2012-04-10 Anobit Technologies Ltd. Combined distortion estimation and error correction coding for memory devices
US7697326B2 (en) * 2006-05-12 2010-04-13 Anobit Technologies Ltd. Reducing programming error in memory devices
US8239735B2 (en) 2006-05-12 2012-08-07 Apple Inc. Memory Device with adaptive capacity
JP2007305267A (ja) * 2006-05-15 2007-11-22 Toshiba Corp 半導体記憶装置
US8060806B2 (en) * 2006-08-27 2011-11-15 Anobit Technologies Ltd. Estimation of non-linear distortion in memory devices
US20080072119A1 (en) * 2006-08-31 2008-03-20 Rodney Rozman Allowable bit errors per sector in memory devices
KR100894809B1 (ko) 2006-09-22 2009-04-24 삼성전자주식회사 메모리 시스템 및 그것의 프로그램 방법
KR100845526B1 (ko) 2006-10-19 2008-07-10 삼성전자주식회사 플래시 메모리를 포함한 메모리 시스템 및 그것의 프로그램방법
US8028186B2 (en) 2006-10-23 2011-09-27 Violin Memory, Inc. Skew management in an interconnection system
US7975192B2 (en) * 2006-10-30 2011-07-05 Anobit Technologies Ltd. Reading memory cells using multiple thresholds
US7821826B2 (en) 2006-10-30 2010-10-26 Anobit Technologies, Ltd. Memory cell readout using successive approximation
US7924648B2 (en) 2006-11-28 2011-04-12 Anobit Technologies Ltd. Memory power and performance management
WO2008068747A2 (en) * 2006-12-03 2008-06-12 Anobit Technologies Ltd. Automatic defect management in memory devices
US7593263B2 (en) 2006-12-17 2009-09-22 Anobit Technologies Ltd. Memory device with reduced reading latency
US7900102B2 (en) * 2006-12-17 2011-03-01 Anobit Technologies Ltd. High-speed programming of memory devices
JP5112086B2 (ja) * 2007-01-17 2013-01-09 株式会社東芝 半導体記憶装置
US8151166B2 (en) * 2007-01-24 2012-04-03 Anobit Technologies Ltd. Reduction of back pattern dependency effects in memory devices
US7751240B2 (en) 2007-01-24 2010-07-06 Anobit Technologies Ltd. Memory device with negative thresholds
WO2008111058A2 (en) * 2007-03-12 2008-09-18 Anobit Technologies Ltd. Adaptive estimation of memory cell read thresholds
US11010076B2 (en) 2007-03-29 2021-05-18 Violin Systems Llc Memory system with multiple striping of raid groups and method for performing the same
US9632870B2 (en) * 2007-03-29 2017-04-25 Violin Memory, Inc. Memory system with multiple striping of raid groups and method for performing the same
US8001320B2 (en) * 2007-04-22 2011-08-16 Anobit Technologies Ltd. Command interface for memory devices
US8234545B2 (en) * 2007-05-12 2012-07-31 Apple Inc. Data storage with incremental redundancy
US8429493B2 (en) 2007-05-12 2013-04-23 Apple Inc. Memory device with internal signap processing unit
JP5029883B2 (ja) * 2007-05-17 2012-09-19 横河電機株式会社 半導体試験装置
JP4994112B2 (ja) * 2007-05-22 2012-08-08 ルネサスエレクトロニクス株式会社 半導体集積回路装置およびメモリ制御方法
US7925936B1 (en) 2007-07-13 2011-04-12 Anobit Technologies Ltd. Memory device with non-uniform programming levels
US8259497B2 (en) 2007-08-06 2012-09-04 Apple Inc. Programming schemes for multi-level analog memory cells
JP4621715B2 (ja) 2007-08-13 2011-01-26 株式会社東芝 メモリ装置
US8174905B2 (en) * 2007-09-19 2012-05-08 Anobit Technologies Ltd. Programming orders for reducing distortion in arrays of multi-level analog memory cells
US7773413B2 (en) 2007-10-08 2010-08-10 Anobit Technologies Ltd. Reliable data storage in analog memory cells in the presence of temperature variations
US8000141B1 (en) 2007-10-19 2011-08-16 Anobit Technologies Ltd. Compensation for voltage drifts in analog memory cells
US8527819B2 (en) 2007-10-19 2013-09-03 Apple Inc. Data storage in analog memory cell arrays having erase failures
US8068360B2 (en) * 2007-10-19 2011-11-29 Anobit Technologies Ltd. Reading analog memory cells using built-in multi-threshold commands
KR101509836B1 (ko) * 2007-11-13 2015-04-06 애플 인크. 멀티 유닛 메모리 디바이스에서의 메모리 유닛의 최적화된 선택
US8225181B2 (en) 2007-11-30 2012-07-17 Apple Inc. Efficient re-read operations from memory devices
US8209588B2 (en) * 2007-12-12 2012-06-26 Anobit Technologies Ltd. Efficient interference cancellation in analog memory cell arrays
US8456905B2 (en) 2007-12-16 2013-06-04 Apple Inc. Efficient data storage in multi-plane memory devices
US8085586B2 (en) * 2007-12-27 2011-12-27 Anobit Technologies Ltd. Wear level estimation in analog memory cells
JP5150245B2 (ja) * 2007-12-27 2013-02-20 株式会社東芝 半導体記憶装置
JP2009176393A (ja) * 2007-12-27 2009-08-06 Toshiba Corp 不揮発性半導体記憶装置及びその自動テスト方法
US8122320B2 (en) * 2008-01-22 2012-02-21 Qimonda Ag Integrated circuit including an ECC error counter
US8156398B2 (en) * 2008-02-05 2012-04-10 Anobit Technologies Ltd. Parameter estimation based on error correction code parity check equations
WO2009098776A1 (ja) * 2008-02-08 2009-08-13 Fujitsu Limited バックアップ方法、ディスクアレイ装置及びコントローラ
KR101466698B1 (ko) 2008-02-19 2014-11-28 삼성전자주식회사 메모리 장치 및 메모리 데이터 읽기 방법
US7924587B2 (en) * 2008-02-21 2011-04-12 Anobit Technologies Ltd. Programming of analog memory cells using a single programming pulse per state transition
US7864573B2 (en) 2008-02-24 2011-01-04 Anobit Technologies Ltd. Programming analog memory cells for reduced variance after retention
US7870446B2 (en) * 2008-02-29 2011-01-11 Kabushiki Kaisha Toshiba Information processing apparatus and nonvolatile semiconductor memory drive
JP4643671B2 (ja) * 2008-03-11 2011-03-02 株式会社東芝 メモリシステム
US8276043B2 (en) * 2008-03-01 2012-09-25 Kabushiki Kaisha Toshiba Memory system
US8230300B2 (en) * 2008-03-07 2012-07-24 Apple Inc. Efficient readout from analog memory cells using data compression
US8059457B2 (en) * 2008-03-18 2011-11-15 Anobit Technologies Ltd. Memory device with multiple-accuracy read commands
US8400858B2 (en) 2008-03-18 2013-03-19 Apple Inc. Memory device with reduced sense time readout
US7903462B1 (en) * 2008-04-04 2011-03-08 Link A Media Devices Corporation E/P durability by using a sub-range of a full programming range
US7995388B1 (en) 2008-08-05 2011-08-09 Anobit Technologies Ltd. Data storage using modified voltages
US7924613B1 (en) 2008-08-05 2011-04-12 Anobit Technologies Ltd. Data storage in analog memory cells with protection against programming interruption
US8949684B1 (en) 2008-09-02 2015-02-03 Apple Inc. Segmented data storage
US8169825B1 (en) 2008-09-02 2012-05-01 Anobit Technologies Ltd. Reliable data storage in analog memory cells subjected to long retention periods
US8000135B1 (en) 2008-09-14 2011-08-16 Anobit Technologies Ltd. Estimation of memory cell read thresholds by sampling inside programming level distribution intervals
US8482978B1 (en) 2008-09-14 2013-07-09 Apple Inc. Estimation of memory cell read thresholds by sampling inside programming level distribution intervals
US7768836B2 (en) * 2008-10-10 2010-08-03 Sandisk Corporation Nonvolatile memory and method with reduced program verify by ignoring fastest and/or slowest programming bits
US8239734B1 (en) 2008-10-15 2012-08-07 Apple Inc. Efficient data storage in storage device arrays
US8045375B2 (en) * 2008-10-24 2011-10-25 Sandisk Technologies Inc. Programming non-volatile memory with high resolution variable initial programming pulse
US8261159B1 (en) 2008-10-30 2012-09-04 Apple, Inc. Data scrambling schemes for memory devices
JP5259343B2 (ja) 2008-10-31 2013-08-07 株式会社東芝 メモリ装置
US8208304B2 (en) * 2008-11-16 2012-06-26 Anobit Technologies Ltd. Storage at M bits/cell density in N bits/cell analog memory cell devices, M>N
US8174857B1 (en) 2008-12-31 2012-05-08 Anobit Technologies Ltd. Efficient readout schemes for analog memory cell devices using multiple read threshold sets
US8248831B2 (en) * 2008-12-31 2012-08-21 Apple Inc. Rejuvenation of analog memory cells
US8924661B1 (en) 2009-01-18 2014-12-30 Apple Inc. Memory system including a controller and processors associated with memory devices
JP5134569B2 (ja) * 2009-02-23 2013-01-30 ラピスセミコンダクタ株式会社 メモリ装置
US8228701B2 (en) 2009-03-01 2012-07-24 Apple Inc. Selective activation of programming schemes in analog memory cell arrays
US8832354B2 (en) * 2009-03-25 2014-09-09 Apple Inc. Use of host system resources by memory controller
US8259506B1 (en) 2009-03-25 2012-09-04 Apple Inc. Database of memory read thresholds
US8238157B1 (en) 2009-04-12 2012-08-07 Apple Inc. Selective re-programming of analog memory cells
CN102576330B (zh) 2009-06-12 2015-01-28 提琴存储器公司 具有持久化无用单元收集机制的存储系统
US8054691B2 (en) 2009-06-26 2011-11-08 Sandisk Technologies Inc. Detecting the completion of programming for non-volatile storage
US8479080B1 (en) 2009-07-12 2013-07-02 Apple Inc. Adaptive over-provisioning in memory systems
US8495465B1 (en) 2009-10-15 2013-07-23 Apple Inc. Error correction coding over multiple memory pages
US8677054B1 (en) 2009-12-16 2014-03-18 Apple Inc. Memory management schemes for non-volatile memory devices
US8694814B1 (en) 2010-01-10 2014-04-08 Apple Inc. Reuse of host hibernation storage space by memory controller
US8572311B1 (en) 2010-01-11 2013-10-29 Apple Inc. Redundant data storage in multi-die memory systems
JP2011165026A (ja) 2010-02-12 2011-08-25 Toshiba Corp エラー検出訂正システム
US8694853B1 (en) 2010-05-04 2014-04-08 Apple Inc. Read commands for reading interfering memory cells
US8572423B1 (en) 2010-06-22 2013-10-29 Apple Inc. Reducing peak current in memory systems
US8595591B1 (en) 2010-07-11 2013-11-26 Apple Inc. Interference-aware assignment of programming levels in analog memory cells
US9104580B1 (en) 2010-07-27 2015-08-11 Apple Inc. Cache memory for hybrid disk drives
US8645794B1 (en) 2010-07-31 2014-02-04 Apple Inc. Data storage in analog memory cells using a non-integer number of bits per cell
US8856475B1 (en) 2010-08-01 2014-10-07 Apple Inc. Efficient selection of memory blocks for compaction
US8694854B1 (en) 2010-08-17 2014-04-08 Apple Inc. Read threshold setting based on soft readout statistics
JP2012069180A (ja) * 2010-09-21 2012-04-05 Toshiba Corp 半導体記憶装置
JP2012068814A (ja) 2010-09-22 2012-04-05 Toshiba Corp 半導体記憶装置およびメモリ制御装置
US9021181B1 (en) 2010-09-27 2015-04-28 Apple Inc. Memory management for unifying memory cell conditions by using maximum time intervals
US8374031B2 (en) 2010-09-29 2013-02-12 SanDisk Technologies, Inc. Techniques for the fast settling of word lines in NAND flash memory
US8842471B2 (en) 2012-01-06 2014-09-23 Sandisk Technologies Inc. Charge cycling by equalizing and regulating the source, well, and bit line levels during write operations for NAND flash memory: program to verify transition
US8910017B2 (en) 2012-07-02 2014-12-09 Sandisk Technologies Inc. Flash memory with random partition
JP5768100B2 (ja) 2013-09-10 2015-08-26 株式会社東芝 メモリ装置、サーバ装置、及びメモリ制御方法
GB201322075D0 (en) 2013-12-13 2014-01-29 Ibm Device for selecting a level for at least one read voltage
JP6226809B2 (ja) * 2014-05-01 2017-11-08 東芝メモリ株式会社 半導体記憶装置
US9251909B1 (en) 2014-09-29 2016-02-02 International Business Machines Corporation Background threshold voltage shifting using base and delta threshold voltage shift values in flash memory
US9563373B2 (en) 2014-10-21 2017-02-07 International Business Machines Corporation Detecting error count deviations for non-volatile memory blocks for advanced non-volatile memory block management
US10365859B2 (en) 2014-10-21 2019-07-30 International Business Machines Corporation Storage array management employing a merged background management process
US9990279B2 (en) 2014-12-23 2018-06-05 International Business Machines Corporation Page-level health equalization
US10339048B2 (en) 2014-12-23 2019-07-02 International Business Machines Corporation Endurance enhancement scheme using memory re-evaluation
JP6600146B2 (ja) * 2015-03-27 2019-10-30 ルネサスエレクトロニクス株式会社 データ処理回路及びエラー訂正方法
JP2017045405A (ja) * 2015-08-28 2017-03-02 株式会社東芝 メモリシステム
US20190095299A1 (en) * 2017-09-28 2019-03-28 Cnex Labs, Inc. Storage system with machine learning mechanism and method of operation thereof
CN110286853B (zh) * 2019-06-06 2024-02-06 大唐微电子技术有限公司 一种数据写入方法和装置、计算机可读存储介质
US11422896B2 (en) * 2020-03-27 2022-08-23 Intel Corporation Technology to enable secure and resilient recovery of firmware data
CN111625481B (zh) * 2020-04-28 2022-07-26 深圳市德明利技术股份有限公司 一种防止闪存比特错误放大的方法和装置以及设备
US11556416B2 (en) 2021-05-05 2023-01-17 Apple Inc. Controlling memory readout reliability and throughput by adjusting distance between read thresholds
US11847342B2 (en) 2021-07-28 2023-12-19 Apple Inc. Efficient transfer of hard data and confidence levels in reading a nonvolatile memory

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69024086T2 (de) * 1989-04-13 1996-06-20 Sundisk Corp EEprom-System mit Blocklöschung
US5396468A (en) * 1991-03-15 1995-03-07 Sundisk Corporation Streamlined write operation for EEPROM system
US5504760A (en) * 1991-03-15 1996-04-02 Sandisk Corporation Mixed data encoding EEPROM system
US5361227A (en) 1991-12-19 1994-11-01 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory device and memory system using the same
JP2647321B2 (ja) 1991-12-19 1997-08-27 株式会社東芝 不揮発性半導体記憶装置及びこれを用いた記憶システム
JP3485938B2 (ja) * 1992-03-31 2004-01-13 株式会社東芝 不揮発性半導体メモリ装置
JP3178914B2 (ja) 1992-10-14 2001-06-25 株式会社東芝 半導体ファイル装置
JP3178912B2 (ja) 1992-10-14 2001-06-25 株式会社東芝 半導体メモリチップ
JP3999822B2 (ja) * 1993-12-28 2007-10-31 株式会社東芝 記憶システム
US5822256A (en) * 1994-09-06 1998-10-13 Intel Corporation Method and circuitry for usage of partially functional nonvolatile memory
US5475693A (en) * 1994-12-27 1995-12-12 Intel Corporation Error management processes for flash EEPROM memory arrays
JP3941149B2 (ja) * 1996-12-03 2007-07-04 ソニー株式会社 半導体不揮発性記憶装置
JPH09160728A (ja) * 1995-12-11 1997-06-20 Oki Electric Ind Co Ltd 記憶装置のエラー訂正方法
US5721739A (en) * 1995-12-14 1998-02-24 Fairchild Semiconductor Corporation Method for detecting read errors, correcting single-bit read errors and reporting multiple-bit read errors
US5715193A (en) * 1996-05-23 1998-02-03 Micron Quantum Devices, Inc. Flash memory system and method for monitoring the disturb effect on memory cell blocks due to high voltage conditions of other memory cell blocks
JP2000030500A (ja) 1998-07-10 2000-01-28 Mitsubishi Electric Corp 不揮発性半導体記憶装置

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US6185134B1 (en) 2001-02-06
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