JPWO2010024433A1 - 半導体装置およびその製造方法 - Google Patents
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Abstract
Description
(素子構造)
本発明の第1の実施の形態に係る半導体装置の模式的断面構造は、図1に示すように表される。また、第1の実施の形態に係る半導体装置の模式的鳥瞰構造は、図2に示すように表される。
第1の実施の形態に係る半導体装置において、ドレイン・ソース間飽和電流IDSSと減衰ピーク位置に対応するコラム層14の底面からの距離との関係は、図7に示すように表される。図7においては、3He++イオンのドーズ量を1×1012個/cm2、5×1012個/cm2とした場合を示す。
第1の実施の形態に係る半導体装置の製造方法は、図1〜図2に示すように、高抵抗で第1導電型の第1ベース層12を形成する工程と、第1ベース層12の裏面に第1導電型のドレイン層10を形成する工程と、第1ベース層12の表面に第2導電型の第2ベース層16を形成する工程と、第2ベース層16の表面に第1導電型のソース層18を形成する工程と、ソース層18および第2ベース層16の表面上にゲート絶縁膜20を形成する工程と、ゲート絶縁膜20上にゲート電極22を形成する工程と、第2ベース層16およびソース層18の下部の第1ベース層12内にドレイン層10に対向して第2導電型のコラム層14を形成する工程と、ドレイン層10にドレイン電極28を形成する工程と、
前記ソース層および前記第2ベース層にソース電極を形成する工程と、コラム層14に対して重粒子照射を行い、トラップレベルを局所的に形成する工程とを有する。
上記のように、本発明は第1の実施の形態によって記載したが、この開示の一部をなす論述および図面は例示的なものであり、この発明を限定するものであると理解すべきではない。この開示から当業者には様々な代替実施の形態、実施例および運用技術が明らかとなろう。
12…第1ベース層
14…コラム層
16…第2ベース層
18…ソース層
20…ゲート絶縁膜
22…ゲート電極
24…層間絶縁膜
26…ソース電極
28…ドレイン電極
Claims (9)
- 高抵抗で第1導電型の第1ベース層と、
前記第1ベース層の裏面に設けられた第1導電型のドレイン層と、
前記第1ベース層の表面に形成された第2導電型の第2ベース層と、
前記第2ベース層の表面に形成された第1導電型のソース層と、
前記ソース層および前記第2ベース層の表面上に配置されたゲート絶縁膜と、
前記ゲート絶縁膜上に配置されたゲート電極と、
前記第2ベース層および前記ソース層の下部の前記第1ベース層内に前記ドレイン層に対向して形成された第2導電型のコラム層と、
前記ドレイン層に設けられたドレイン電極と、
前記ソース層および前記第2ベース層に設けられたソース電極とを備え、
前記コラム層に対して重粒子照射を行い、トラップレベルを局所的に形成したことを特徴とする半導体装置。 - 前記コラム層の底面を基準とし、前記コラム層の底面からの距離と逆回復時間との関係より求めた第1の位置と、前記コラム層の底面からの距離とドレイン・ソース間飽和電流との関係より求めた第2の位置との間に、前記イオン照射の減衰ピーク位置が含まれることを特徴とする請求項1に記載の半導体装置。
- 前記重粒子照射する粒子種は、プロトン、3He++、4He++のいずれかであることを特徴とする請求項1または2に記載の半導体装置。
- 前記重粒子照射のドーズ量は、5×1010〜5×1012個/cm2であることを特徴とする請求項1〜3のいずれか1項に記載の半導体装置。
- 前記第1ベース層、前記第2ベース層、および前記ソース層は、矩形若しくは六角形を基調とする平面パターンを格子状、若しくは千鳥格子状に配置したことを特徴とする請求項1〜4のいずれか1項に記載の半導体装置。
- 高抵抗で第1導電型の第1ベース層を形成する工程と、
前記第1ベース層の裏面に第1導電型のドレイン層を形成する工程と、
前記第1ベース層の表面に第2導電型の第2ベース層を形成する工程と、
前記第2ベース層の表面に第1導電型のソース層を形成する工程と、
前記ソース層および前記第2ベース層の表面上にゲート絶縁膜を形成する工程と、
前記ゲート絶縁膜上にゲート電極を形成する工程と、
前記第2ベース層および前記ソース層の下部の前記第1ベース層内に前記ドレイン層に対向して第2導電型のコラム層を形成する工程と、
前記ドレイン層にドレイン電極を形成する工程と、
前記ソース層および前記第2ベース層にソース電極を形成する工程と、
前記コラム層に対して重粒子照射を行い、トラップレベルを局所的に形成する工程と
を有することを特徴とする半導体装置の製造方法。 - 前記トラップレベルを局所的に形成する工程は、
前記コラム層の底面を基準とし、前記コラム層の底面からの距離と逆回復時間との関係より第1の位置を決定する工程と、
前記コラム層の底面からの距離とドレイン・ソース間飽和電流との関係より求めた第2の位置を決定する工程と、
前記第1の位置と前記第2の位置との間に減衰ピーク位置が含まれるように重粒子照射を実施する工程と
を有することを特徴とする請求項6に記載の半導体装置の製造方法。 - 前記重粒子照射する粒子種は、プロトン、3He++、4He++のいずれかであることを特徴とする請求項6または7に記載の半導体装置の製造方法。
- 前記重粒子照射のドーズ量は、5×1010〜5×1012個/cm2であることを特徴とする請求項6〜8のいずれか1項に記載の半導体装置の製造方法。
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CN102138206B (zh) | 2014-03-12 |
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JP6557304B2 (ja) | 2019-08-07 |
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US9385217B2 (en) | 2016-07-05 |
US20140312411A1 (en) | 2014-10-23 |
US9755065B2 (en) | 2017-09-05 |
CN102138206A (zh) | 2011-07-27 |
US10672900B2 (en) | 2020-06-02 |
JP5723595B2 (ja) | 2015-05-27 |
US20160284835A1 (en) | 2016-09-29 |
WO2010024433A1 (ja) | 2010-03-04 |
KR20110069039A (ko) | 2011-06-22 |
TW201011917A (en) | 2010-03-16 |
US8492829B2 (en) | 2013-07-23 |
US20130302957A1 (en) | 2013-11-14 |
JP6731522B2 (ja) | 2020-07-29 |
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