JP6911982B2 - 半導体装置及びその製造方法 - Google Patents
半導体装置及びその製造方法 Download PDFInfo
- Publication number
- JP6911982B2 JP6911982B2 JP2020112654A JP2020112654A JP6911982B2 JP 6911982 B2 JP6911982 B2 JP 6911982B2 JP 2020112654 A JP2020112654 A JP 2020112654A JP 2020112654 A JP2020112654 A JP 2020112654A JP 6911982 B2 JP6911982 B2 JP 6911982B2
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- Prior art keywords
- copper
- layer
- insulating layer
- wiring
- groove
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- 239000004065 semiconductor Substances 0.000 title claims description 82
- 238000004519 manufacturing process Methods 0.000 title claims description 33
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 195
- 229910052802 copper Inorganic materials 0.000 claims description 194
- 239000010949 copper Substances 0.000 claims description 194
- 238000000034 method Methods 0.000 claims description 70
- 239000000758 substrate Substances 0.000 claims description 50
- 239000000463 material Substances 0.000 claims description 28
- 238000005245 sintering Methods 0.000 claims description 19
- 239000002245 particle Substances 0.000 claims description 15
- 230000003746 surface roughness Effects 0.000 claims description 14
- 239000011347 resin Substances 0.000 claims description 10
- 229920005989 resin Polymers 0.000 claims description 10
- 239000002253 acid Substances 0.000 claims description 6
- 239000011810 insulating material Substances 0.000 description 14
- BDAGIHXWWSANSR-UHFFFAOYSA-N methanoic acid Natural products OC=O BDAGIHXWWSANSR-UHFFFAOYSA-N 0.000 description 10
- 238000010438 heat treatment Methods 0.000 description 9
- 229910000679 solder Inorganic materials 0.000 description 8
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 6
- 230000005540 biological transmission Effects 0.000 description 6
- ORQBXQOJMQIAOY-UHFFFAOYSA-N nobelium Chemical compound [No] ORQBXQOJMQIAOY-UHFFFAOYSA-N 0.000 description 6
- 238000004544 sputter deposition Methods 0.000 description 6
- OSWFIVFLDKOXQC-UHFFFAOYSA-N 4-(3-methoxyphenyl)aniline Chemical compound COC1=CC=CC(C=2C=CC(N)=CC=2)=C1 OSWFIVFLDKOXQC-UHFFFAOYSA-N 0.000 description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 5
- 230000015572 biosynthetic process Effects 0.000 description 5
- 235000019253 formic acid Nutrition 0.000 description 5
- 238000010030 laminating Methods 0.000 description 5
- 238000012536 packaging technology Methods 0.000 description 5
- 238000000206 photolithography Methods 0.000 description 5
- 229910052710 silicon Inorganic materials 0.000 description 5
- 239000010703 silicon Substances 0.000 description 5
- 239000000945 filler Substances 0.000 description 4
- 238000000227 grinding Methods 0.000 description 4
- 238000007747 plating Methods 0.000 description 4
- 239000002904 solvent Substances 0.000 description 4
- 238000005507 spraying Methods 0.000 description 4
- QTBSBXVTEAMEQO-UHFFFAOYSA-N Acetic acid Chemical compound CC(O)=O QTBSBXVTEAMEQO-UHFFFAOYSA-N 0.000 description 3
- 239000011248 coating agent Substances 0.000 description 3
- 238000000576 coating method Methods 0.000 description 3
- 239000011162 core material Substances 0.000 description 3
- 238000009713 electroplating Methods 0.000 description 3
- 239000006260 foam Substances 0.000 description 3
- 239000011521 glass Substances 0.000 description 3
- 229910052757 nitrogen Inorganic materials 0.000 description 3
- 238000007639 printing Methods 0.000 description 3
- 241001050985 Disco Species 0.000 description 2
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 2
- CDBYLPFSWZWCQE-UHFFFAOYSA-L Sodium Carbonate Chemical compound [Na+].[Na+].[O-]C([O-])=O CDBYLPFSWZWCQE-UHFFFAOYSA-L 0.000 description 2
- 238000005336 cracking Methods 0.000 description 2
- 238000007772 electroless plating Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 239000004088 foaming agent Substances 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 239000011368 organic material Substances 0.000 description 2
- 238000007650 screen-printing Methods 0.000 description 2
- 238000004528 spin coating Methods 0.000 description 2
- WGTYBPLFGIVFAS-UHFFFAOYSA-M tetramethylammonium hydroxide Chemical compound [OH-].C[N+](C)(C)C WGTYBPLFGIVFAS-UHFFFAOYSA-M 0.000 description 2
- PXGOKWXKJXAPGV-UHFFFAOYSA-N Fluorine Chemical compound FF PXGOKWXKJXAPGV-UHFFFAOYSA-N 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 125000003158 alcohol group Chemical group 0.000 description 1
- 125000003277 amino group Chemical group 0.000 description 1
- 239000007864 aqueous solution Substances 0.000 description 1
- 239000012298 atmosphere Substances 0.000 description 1
- 229910052797 bismuth Inorganic materials 0.000 description 1
- JCXGWMGPZLAOME-UHFFFAOYSA-N bismuth atom Chemical compound [Bi] JCXGWMGPZLAOME-UHFFFAOYSA-N 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 239000011889 copper foil Substances 0.000 description 1
- 238000002788 crimping Methods 0.000 description 1
- 238000004132 cross linking Methods 0.000 description 1
- 238000004925 denaturation Methods 0.000 description 1
- 230000036425 denaturation Effects 0.000 description 1
- 229910003460 diamond Inorganic materials 0.000 description 1
- 239000010432 diamond Substances 0.000 description 1
- 125000004185 ester group Chemical group 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 229910052731 fluorine Inorganic materials 0.000 description 1
- 239000011737 fluorine Substances 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 125000004435 hydrogen atom Chemical class [H]* 0.000 description 1
- 230000001771 impaired effect Effects 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 238000007641 inkjet printing Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000005304 joining Methods 0.000 description 1
- 238000000608 laser ablation Methods 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 239000012299 nitrogen atmosphere Substances 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 229920002577 polybenzoxazole Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 230000002040 relaxant effect Effects 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 229910000029 sodium carbonate Inorganic materials 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 229910052718 tin Inorganic materials 0.000 description 1
- 238000009281 ultraviolet germicidal irradiation Methods 0.000 description 1
- 229910052724 xenon Inorganic materials 0.000 description 1
- FHNFHKCVQCLJFQ-UHFFFAOYSA-N xenon atom Chemical compound [Xe] FHNFHKCVQCLJFQ-UHFFFAOYSA-N 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
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- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4857—Multilayer substrates
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
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- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4853—Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
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- H—ELECTRICITY
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- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4867—Applying pastes or inks, e.g. screen printing
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- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/561—Batch processing
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/565—Moulds
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- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/568—Temporary substrate used as encapsulation process aid
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
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- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5383—Multilayer substrates
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- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5386—Geometry or layout of the interconnection structure
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- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/465—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits by applying an insulating layer having channels for the next circuit layer
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4682—Manufacture of core-less build-up multilayer circuits on a temporary carrier or on a metal foil
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- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
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- H01L2224/1131—Manufacturing methods by local deposition of the material of the bump connector in liquid form
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Description
Claims (11)
- 溝部を有する絶縁層を基板上に形成する絶縁層形成工程と、
前記溝部を埋めるように前記絶縁層上に銅層を形成する銅層形成工程と、
前記溝部内の銅層部分を残し、前記絶縁層上の前記銅層をフライカット法により除去する除去工程と、を備え、
前記除去工程後における前記絶縁層の露出面の表面粗さと、前記銅層部分の露出面の表面粗さとが、0.03μm以上0.1μm以下である、半導体装置の製造方法。 - 前記除去工程において、前記絶縁層の一部を含めて前記フライカット法により除去し、
前記除去工程後における前記絶縁層の残存部における露出面の表面粗さは、0.03μm以上0.1μm以下である、請求項1に記載の半導体装置の製造方法。 - 前記絶縁層が、感光性樹脂材料を用いて形成されるものであって、
前記銅層形成工程の前に、前記絶縁層に対して露光及び現像を行うことによって、前記溝部を前記絶縁層に形成する溝部形成工程をさらに備える、請求項1又は2に記載の半導体装置の製造方法。 - 前記溝部が、0.5〜5μmのライン幅を有する、請求項1〜3のいずれか1項に記載の半導体装置の製造方法。
- 前記銅層形成工程において、前記絶縁層の少なくとも前記溝部に銅ペーストを塗布し、当該銅ペーストを焼結処理することによって前記銅層を形成する、請求項1〜4のいずれか1項に記載の半導体装置の製造方法。
- 前記焼結処理後の前記銅層の体積抵抗率が、3〜40μΩ・cmである、請求項5に記載の半導体装置の製造方法。
- 前記焼結処理においては、前記銅ペーストを酸存在下にて80〜200℃で加熱する、請求項5又は6に記載の半導体装置の製造方法。
- 前記基板上に仮固定層を形成する仮固定層形成工程をさらに備え、
前記絶縁層形成工程において、前記仮固定層上に前記絶縁層を形成する、請求項1〜7のいずれか1項に記載の半導体装置の製造方法。 - 前記仮固定層形成工程において、200℃以上で体積膨張する粒子を含有する前記仮固定層を形成する、請求項8に記載の半導体装置の製造方法。
- 前記絶縁層形成工程では、前記絶縁層に前記溝部を形成した後であって前記銅層形成工程前に、前記絶縁層を加熱硬化する、請求項1〜9のいずれか一項に記載の半導体装置の製造方法。
- 基板上に設けられた配線体に半導体素子が搭載されてなる半導体装置であって、
前記配線体は、配線層を有し、
前記配線層には、前記配線層の一面側に溝部を有する絶縁層と、前記溝部を埋めるように形成された銅配線とが設けられ、
前記一面側における前記絶縁層及び前記銅配線の表面粗さが、0.03μm以上0.1μm以下となっている、
半導体装置。
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Publication number | Publication date |
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TW202345314A (zh) | 2023-11-16 |
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TW201724449A (zh) | 2017-07-01 |
US10388608B2 (en) | 2019-08-20 |
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TWI814411B (zh) | 2023-09-01 |
JP7120402B2 (ja) | 2022-08-17 |
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