JP5383098B2 - 半導体装置の作製方法 - Google Patents

半導体装置の作製方法 Download PDF

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Publication number
JP5383098B2
JP5383098B2 JP2008159876A JP2008159876A JP5383098B2 JP 5383098 B2 JP5383098 B2 JP 5383098B2 JP 2008159876 A JP2008159876 A JP 2008159876A JP 2008159876 A JP2008159876 A JP 2008159876A JP 5383098 B2 JP5383098 B2 JP 5383098B2
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substrate
semiconductor
semiconductor layer
region
layer
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Expired - Fee Related
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JP2008159876A
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Japanese (ja)
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JP2009027156A5 (https=
JP2009027156A (ja
Inventor
明久 下村
秀和 宮入
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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Priority to JP2008159876A priority Critical patent/JP5383098B2/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/202—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials
    • H10P30/204—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials into Group IV semiconductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/208—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically inactive species
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P36/00—Gettering within semiconductor bodies
    • H10P36/03—Gettering within semiconductor bodies within silicon bodies
    • H10P36/07—Gettering within semiconductor bodies within silicon bodies of silicon-on-insulator structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1914—Preparing SOI wafers using bonding
    • H10P90/1916—Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers

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  • Thin Film Transistor (AREA)
  • Recrystallisation Techniques (AREA)
JP2008159876A 2007-06-20 2008-06-19 半導体装置の作製方法 Expired - Fee Related JP5383098B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2008159876A JP5383098B2 (ja) 2007-06-20 2008-06-19 半導体装置の作製方法

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
JP2007162464 2007-06-20
JP2007162464 2007-06-20
JP2007162444 2007-06-20
JP2007162444 2007-06-20
JP2008159876A JP5383098B2 (ja) 2007-06-20 2008-06-19 半導体装置の作製方法

Publications (3)

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JP2009027156A JP2009027156A (ja) 2009-02-05
JP2009027156A5 JP2009027156A5 (https=) 2011-07-07
JP5383098B2 true JP5383098B2 (ja) 2014-01-08

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Family Applications (1)

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JP2008159876A Expired - Fee Related JP5383098B2 (ja) 2007-06-20 2008-06-19 半導体装置の作製方法

Country Status (7)

Country Link
US (2) US8093135B2 (https=)
JP (1) JP5383098B2 (https=)
KR (1) KR101478813B1 (https=)
CN (2) CN102592977B (https=)
SG (1) SG182214A1 (https=)
TW (1) TWI485805B (https=)
WO (1) WO2008156040A1 (https=)

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US8431451B2 (en) 2007-06-29 2013-04-30 Semicondutor Energy Laboratory Co., Ltd. Display device and method for manufacturing the same
JP5507063B2 (ja) * 2007-07-09 2014-05-28 株式会社半導体エネルギー研究所 半導体装置の作製方法
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US8236668B2 (en) * 2007-10-10 2012-08-07 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing SOI substrate
JP2009135453A (ja) * 2007-10-30 2009-06-18 Semiconductor Energy Lab Co Ltd 半導体装置の作製方法、半導体装置及び電子機器
JP2010153802A (ja) 2008-11-20 2010-07-08 Semiconductor Energy Lab Co Ltd 半導体装置及び半導体装置の作製方法
US8299537B2 (en) * 2009-02-11 2012-10-30 International Business Machines Corporation Semiconductor-on-insulator substrate and structure including multiple order radio frequency harmonic supressing region
CN102576735B (zh) * 2009-09-30 2016-01-20 大日本印刷株式会社 挠性装置用基板、挠性装置用薄膜晶体管基板、挠性装置、薄膜元件用基板、薄膜元件、薄膜晶体管、薄膜元件用基板的制造方法、薄膜元件的制造方法及薄膜晶体管的制造方法
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CN103137537B (zh) * 2011-11-28 2015-04-15 中国科学院上海微系统与信息技术研究所 一种图形化全耗尽绝缘体上Si/CoSi2衬底材料及其制备方法
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JP6471650B2 (ja) * 2015-08-27 2019-02-20 株式会社Sumco Ｓｏｉウェーハの製造方法およびｓｏｉウェーハ
JP6524862B2 (ja) * 2015-08-27 2019-06-05 株式会社Sumco Ｓｏｉウェーハの製造方法およびｓｏｉウェーハ
CN108028214B (zh) * 2015-12-30 2022-04-08 玛特森技术公司 用于毫秒退火系统的气体流动控制
US9966301B2 (en) * 2016-06-27 2018-05-08 New Fab, LLC Reduced substrate effects in monolithically integrated RF circuits
JP2019054153A (ja) * 2017-09-15 2019-04-04 東芝メモリ株式会社 半導体装置の製造方法
JP6680378B2 (ja) * 2019-03-13 2020-04-15 株式会社Sumco Ｓｏｉウェーハ
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009033123A (ja) * 2007-06-27 2009-02-12 Semiconductor Energy Lab Co Ltd Ｓｏｉ基板の作製方法および半導体装置の作製方法

Also Published As

Publication number Publication date
US8093135B2 (en) 2012-01-10
CN102592977B (zh) 2015-03-25
TWI485805B (zh) 2015-05-21
WO2008156040A1 (en) 2008-12-24
CN102592977A (zh) 2012-07-18
SG182214A1 (en) 2012-07-30
CN101681843B (zh) 2012-05-09
US8551828B2 (en) 2013-10-08
KR101478813B1 (ko) 2015-01-02
TW200917416A (en) 2009-04-16
KR20100033408A (ko) 2010-03-29
CN101681843A (zh) 2010-03-24
US20080318367A1 (en) 2008-12-25
JP2009027156A (ja) 2009-02-05
US20110117708A1 (en) 2011-05-19

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