JP5348874B2 - 半導体装置及びその作製方法 - Google Patents

半導体装置及びその作製方法 Download PDF

Info

Publication number
JP5348874B2
JP5348874B2 JP2007313006A JP2007313006A JP5348874B2 JP 5348874 B2 JP5348874 B2 JP 5348874B2 JP 2007313006 A JP2007313006 A JP 2007313006A JP 2007313006 A JP2007313006 A JP 2007313006A JP 5348874 B2 JP5348874 B2 JP 5348874B2
Authority
JP
Japan
Prior art keywords
insulating layer
layer
silicon layer
silicon
region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2007313006A
Other languages
English (en)
Japanese (ja)
Other versions
JP2008166744A5 (enExample
JP2008166744A (ja
Inventor
舜平 山崎
佳寿子 池田
慎也 笹川
英臣 須沢
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Original Assignee
Semiconductor Energy Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Priority to JP2007313006A priority Critical patent/JP5348874B2/ja
Publication of JP2008166744A publication Critical patent/JP2008166744A/ja
Publication of JP2008166744A5 publication Critical patent/JP2008166744A5/ja
Application granted granted Critical
Publication of JP5348874B2 publication Critical patent/JP5348874B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6729Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/6737Thin-film transistors [TFT] characterised by the electrodes characterised by the electrode materials
    • H10D30/6739Conductor-insulator-semiconductor electrodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0321Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
    • H10D30/0323Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon comprising monocrystalline silicon
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6704Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6706Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device for preventing leakage current 
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/20Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311Gate electrodes for field-effect devices
    • H10D64/411Gate electrodes for field-effect devices for FETs
    • H10D64/511Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/514Gate electrodes for field-effect devices for FETs for IGFETs characterised by the insulating layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/60Electrodes characterised by their materials
    • H10D64/66Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01Manufacture or treatment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/201Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI

Landscapes

  • Thin Film Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Electrodes Of Semiconductors (AREA)
JP2007313006A 2006-12-05 2007-12-04 半導体装置及びその作製方法 Expired - Fee Related JP5348874B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2007313006A JP5348874B2 (ja) 2006-12-05 2007-12-04 半導体装置及びその作製方法

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2006327921 2006-12-05
JP2006327921 2006-12-05
JP2007313006A JP5348874B2 (ja) 2006-12-05 2007-12-04 半導体装置及びその作製方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2013170390A Division JP5685297B2 (ja) 2006-12-05 2013-08-20 半導体装置

Publications (3)

Publication Number Publication Date
JP2008166744A JP2008166744A (ja) 2008-07-17
JP2008166744A5 JP2008166744A5 (enExample) 2011-01-13
JP5348874B2 true JP5348874B2 (ja) 2013-11-20

Family

ID=39474724

Family Applications (3)

Application Number Title Priority Date Filing Date
JP2007313006A Expired - Fee Related JP5348874B2 (ja) 2006-12-05 2007-12-04 半導体装置及びその作製方法
JP2013170390A Active JP5685297B2 (ja) 2006-12-05 2013-08-20 半導体装置
JP2015006617A Expired - Fee Related JP5973598B2 (ja) 2006-12-05 2015-01-16 半導体装置の作製方法

Family Applications After (2)

Application Number Title Priority Date Filing Date
JP2013170390A Active JP5685297B2 (ja) 2006-12-05 2013-08-20 半導体装置
JP2015006617A Expired - Fee Related JP5973598B2 (ja) 2006-12-05 2015-01-16 半導体装置の作製方法

Country Status (4)

Country Link
US (2) US7968884B2 (enExample)
JP (3) JP5348874B2 (enExample)
KR (1) KR20080052428A (enExample)
CN (1) CN101197394B (enExample)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5374805B2 (ja) * 2006-03-27 2013-12-25 株式会社Sumco Simoxウェーハの製造方法
JP5500771B2 (ja) * 2006-12-05 2014-05-21 株式会社半導体エネルギー研究所 半導体装置及びマイクロプロセッサ
TWI418036B (zh) * 2006-12-05 2013-12-01 Semiconductor Energy Lab 半導體裝置及其製造方法
JP5337380B2 (ja) * 2007-01-26 2013-11-06 株式会社半導体エネルギー研究所 半導体装置及びその作製方法
US7947981B2 (en) * 2007-01-30 2011-05-24 Semiconductor Energy Laboratory Co., Ltd. Display device
US7936009B2 (en) * 2008-07-09 2011-05-03 Fairchild Semiconductor Corporation Shielded gate trench FET with an inter-electrode dielectric having a low-k dielectric therein
WO2010029865A1 (en) 2008-09-12 2010-03-18 Semiconductor Energy Laboratory Co., Ltd. Display device
JP2010153802A (ja) 2008-11-20 2010-07-08 Semiconductor Energy Lab Co Ltd 半導体装置及び半導体装置の作製方法
US8461582B2 (en) 2009-03-05 2013-06-11 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the same
KR102577885B1 (ko) 2009-10-16 2023-09-14 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치
KR101836067B1 (ko) * 2009-12-21 2018-03-08 가부시키가이샤 한도오따이 에네루기 켄큐쇼 박막 트랜지스터와 그 제작 방법
TWI535028B (zh) * 2009-12-21 2016-05-21 半導體能源研究所股份有限公司 薄膜電晶體
US8476744B2 (en) 2009-12-28 2013-07-02 Semiconductor Energy Laboratory Co., Ltd. Thin film transistor with channel including microcrystalline and amorphous semiconductor regions
US9230826B2 (en) 2010-08-26 2016-01-05 Semiconductor Energy Laboratory Co., Ltd. Etching method using mixed gas and method for manufacturing semiconductor device
US8704230B2 (en) 2010-08-26 2014-04-22 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
US8952458B2 (en) * 2011-04-14 2015-02-10 Taiwan Semiconductor Manufacturing Company, Ltd. Gate dielectric layer having interfacial layer and high-K dielectric over the interfacial layer
KR101771726B1 (ko) * 2012-06-18 2017-08-25 삼성전기주식회사 정전기 방지 소자 및 이를 포함하는 복합 전자 부품
JP5960000B2 (ja) * 2012-09-05 2016-08-02 ルネサスエレクトロニクス株式会社 半導体装置及び半導体装置の製造方法
US9356045B2 (en) * 2013-06-10 2016-05-31 Raytheon Company Semiconductor structure having column III-V isolation regions
WO2017149584A1 (ja) 2016-02-29 2017-09-08 川澄化学工業株式会社 癒着防止材
KR101925945B1 (ko) * 2017-02-28 2018-12-06 서울시립대학교 산학협력단 테이퍼 형상의 빔을 가진 릴레이 소자의 제조 방법 및 테이퍼 형상의 빔을 가진 릴레이 소자
CN110880520B (zh) * 2018-09-06 2024-11-29 松下知识产权经营株式会社 摄像装置
CN109860279B (zh) * 2019-01-24 2022-03-18 南京京东方显示技术有限公司 一种薄膜晶体管及其修复方法
CN114758366B (zh) * 2021-01-12 2025-12-09 群创光电股份有限公司 感测装置

Family Cites Families (41)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59150469A (ja) 1983-02-03 1984-08-28 Toshiba Corp 半導体装置の製造方法
JP2717237B2 (ja) * 1991-05-16 1998-02-18 株式会社 半導体エネルギー研究所 絶縁ゲイト型半導体装置およびその作製方法
DE69229314T2 (de) 1991-09-10 1999-11-11 Sharp K.K., Osaka Halbleiteranordnung und Verfahren zur Herstellung
JPH06268224A (ja) * 1993-03-12 1994-09-22 Mitsubishi Electric Corp 電界効果型トランジスタを含む半導体装置
JPH06275832A (ja) * 1993-03-18 1994-09-30 Toshiba Corp 薄膜トランジスタおよびその製造方法
JPH07176753A (ja) 1993-12-17 1995-07-14 Semiconductor Energy Lab Co Ltd 薄膜半導体装置およびその作製方法
JP3452981B2 (ja) 1994-04-29 2003-10-06 株式会社半導体エネルギー研究所 半導体集積回路およびその作製方法
US6433361B1 (en) * 1994-04-29 2002-08-13 Semiconductor Energy Laboratory Co., Ltd. Semiconductor integrated circuit and method for forming the same
JP3497627B2 (ja) * 1994-12-08 2004-02-16 株式会社東芝 半導体装置およびその製造方法
JPH08186262A (ja) * 1994-12-19 1996-07-16 Korea Electron Telecommun 薄膜トランジスタの製造方法
JP3504025B2 (ja) * 1995-06-06 2004-03-08 三菱電機株式会社 半導体装置およびその製造方法
KR0164079B1 (ko) * 1995-06-30 1998-12-01 김주용 반도체 소자 및 그 제조방법
US5989998A (en) 1996-08-29 1999-11-23 Matsushita Electric Industrial Co., Ltd. Method of forming interlayer insulating film
JPH11258636A (ja) 1998-03-16 1999-09-24 Toshiba Corp 薄膜トランジスタおよびその製造方法
US6087208A (en) * 1998-03-31 2000-07-11 Advanced Micro Devices, Inc. Method for increasing gate capacitance by using both high and low dielectric gate material
JP2000012864A (ja) * 1998-06-22 2000-01-14 Semiconductor Energy Lab Co Ltd 半導体装置の作製方法
JP2000049352A (ja) * 1998-07-28 2000-02-18 Asahi Kasei Microsystems Kk 半導体装置及びその製造方法
JP2006310879A (ja) * 1998-12-24 2006-11-09 Renesas Technology Corp 半導体装置
JP2000208775A (ja) * 1999-01-18 2000-07-28 Furontekku:Kk 半導体装置とその製造方法
TW444252B (en) * 1999-03-19 2001-07-01 Toshiba Corp Semiconductor apparatus and its fabricating method
KR100640207B1 (ko) * 1999-10-29 2006-10-31 엘지.필립스 엘시디 주식회사 박막트랜지스터 및 그 제조방법
JP4389359B2 (ja) * 2000-06-23 2009-12-24 日本電気株式会社 薄膜トランジスタ及びその製造方法
JP2003069025A (ja) * 2001-08-22 2003-03-07 Nec Corp 半導体装置及びその実装方法
EP1326273B1 (en) * 2001-12-28 2012-01-18 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
JP4187497B2 (ja) 2002-01-25 2008-11-26 Jsr株式会社 半導体基板の化学機械研磨方法
CN101217150B (zh) * 2002-03-05 2011-04-06 株式会社半导体能源研究所 半导体元件和使用半导体元件的半导体装置
JP2003298059A (ja) * 2002-03-29 2003-10-17 Advanced Lcd Technologies Development Center Co Ltd 薄膜トランジスタ
JP2004152790A (ja) * 2002-10-28 2004-05-27 Toshiba Corp 半導体装置、及び、半導体装置の製造方法
JP2004241755A (ja) * 2003-01-15 2004-08-26 Renesas Technology Corp 半導体装置
JP3779286B2 (ja) * 2003-06-27 2006-05-24 沖電気工業株式会社 Soi構造を用いたしきい値電圧可変相補型mosfet
KR20050052029A (ko) 2003-11-28 2005-06-02 삼성에스디아이 주식회사 박막트랜지스터
JP2005236202A (ja) * 2004-02-23 2005-09-02 Seiko Epson Corp 半導体装置およびその製造方法
JP2006164998A (ja) * 2004-12-02 2006-06-22 Renesas Technology Corp 半導体装置およびその製造方法
US7345343B2 (en) * 2005-08-02 2008-03-18 Texas Instruments Incorporated Integrated circuit having a top side wafer contact and a method of manufacture therefor
JP4223026B2 (ja) * 2005-06-03 2009-02-12 株式会社ルネサステクノロジ 半導体装置
JP4964442B2 (ja) * 2005-08-10 2012-06-27 三菱電機株式会社 薄膜トランジスタおよびその製造方法
JP4533304B2 (ja) * 2005-11-29 2010-09-01 富士通セミコンダクター株式会社 半導体装置の製造方法
JP2006186382A (ja) * 2006-01-27 2006-07-13 Toshiba Corp 電界効果トランジスタ
US7692223B2 (en) * 2006-04-28 2010-04-06 Semiconductor Energy Laboratory Co., Ltd Semiconductor device and method for manufacturing the same
EP1850374A3 (en) * 2006-04-28 2007-11-21 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
TWI418036B (zh) * 2006-12-05 2013-12-01 Semiconductor Energy Lab 半導體裝置及其製造方法

Also Published As

Publication number Publication date
JP5973598B2 (ja) 2016-08-23
CN101197394B (zh) 2012-07-04
JP5685297B2 (ja) 2015-03-18
JP2015073138A (ja) 2015-04-16
CN101197394A (zh) 2008-06-11
JP2008166744A (ja) 2008-07-17
JP2013254980A (ja) 2013-12-19
US20110254004A1 (en) 2011-10-20
US7968884B2 (en) 2011-06-28
KR20080052428A (ko) 2008-06-11
US20080128808A1 (en) 2008-06-05

Similar Documents

Publication Publication Date Title
JP5348874B2 (ja) 半導体装置及びその作製方法
JP5348873B2 (ja) 半導体装置及びその作製方法
JP5728151B2 (ja) Soi基板の作製方法
JP5393057B2 (ja) 半導体装置の作製方法
US8222117B2 (en) SOI substrate and method for manufacturing SOI substrate
JP5337380B2 (ja) 半導体装置及びその作製方法
JP5337347B2 (ja) 半導体装置、半導体装置の作製方法
JP5411456B2 (ja) 半導体装置
TWI425638B (zh) 半導體裝置及其製造方法
JP5105915B2 (ja) 半導体装置及びその作製方法
JP2007006464A (ja) 半導体装置

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20101122

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20101122

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20130131

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20130212

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20130314

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20130730

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20130820

R150 Certificate of patent or registration of utility model

Ref document number: 5348874

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

LAPS Cancellation because of no payment of annual fees