JP4964442B2 - 薄膜トランジスタおよびその製造方法 - Google Patents
薄膜トランジスタおよびその製造方法 Download PDFInfo
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- JP4964442B2 JP4964442B2 JP2005231600A JP2005231600A JP4964442B2 JP 4964442 B2 JP4964442 B2 JP 4964442B2 JP 2005231600 A JP2005231600 A JP 2005231600A JP 2005231600 A JP2005231600 A JP 2005231600A JP 4964442 B2 JP4964442 B2 JP 4964442B2
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- semiconductor layer
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- film transistor
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- 239000010409 thin film Substances 0.000 title claims description 60
- 238000004519 manufacturing process Methods 0.000 title claims description 13
- 239000010408 film Substances 0.000 claims description 142
- 239000004065 semiconductor Substances 0.000 claims description 101
- 239000000758 substrate Substances 0.000 claims description 23
- 238000004528 spin coating Methods 0.000 claims description 6
- 239000010410 layer Substances 0.000 description 88
- 230000005684 electric field Effects 0.000 description 12
- 238000005530 etching Methods 0.000 description 8
- 239000012535 impurity Substances 0.000 description 8
- 239000011229 interlayer Substances 0.000 description 8
- 238000010438 heat treatment Methods 0.000 description 7
- 230000001681 protective effect Effects 0.000 description 7
- 239000002184 metal Substances 0.000 description 6
- 238000000034 method Methods 0.000 description 6
- 239000011521 glass Substances 0.000 description 5
- 150000002500 ions Chemical class 0.000 description 5
- 238000005229 chemical vapour deposition Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 3
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 3
- 239000003513 alkali Substances 0.000 description 3
- 229910052796 boron Inorganic materials 0.000 description 3
- 238000001312 dry etching Methods 0.000 description 3
- 229910052698 phosphorus Inorganic materials 0.000 description 3
- 239000011574 phosphorus Substances 0.000 description 3
- 238000001039 wet etching Methods 0.000 description 3
- 238000001994 activation Methods 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 2
- 239000004973 liquid crystal related substance Substances 0.000 description 2
- 238000000059 patterning Methods 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- QOSATHPSBFQAML-UHFFFAOYSA-N hydrogen peroxide;hydrate Chemical compound O.OO QOSATHPSBFQAML-UHFFFAOYSA-N 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78651—Silicon transistors
- H01L29/7866—Non-monocrystalline silicon transistors
- H01L29/78672—Polycrystalline or microcrystalline silicon transistor
- H01L29/78675—Polycrystalline or microcrystalline silicon transistor with normal-type structure, e.g. with top gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78651—Silicon transistors
- H01L29/7866—Non-monocrystalline silicon transistors
- H01L29/78663—Amorphous silicon transistors
- H01L29/78666—Amorphous silicon transistors with normal-type structure, e.g. with top gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1296—Multistep manufacturing methods adapted to increase the uniformity of device parameters
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Manufacturing & Machinery (AREA)
- Thin Film Transistor (AREA)
Description
<A.構成>
図1は、本実施の形態に係る薄膜トランジスタの主要部の構成を示す上面図である。図2は、本実施の形態に係る薄膜トランジスタの主要部の構成を示す断面図である。図3は、本実施の形態に係る薄膜トランジスタの構成を示す断面図である。ここで図2は、図1のA−A線断面図に対応しており、図3は、図1のB−B線断面図に対応している。
次に、本実施の形態に係る薄膜トランジスタの製造方法について説明する。まず、絶縁性基板1の全面に半導体膜(図示せず)を成膜する。
図2には、ゲート電極5からゲート絶縁膜4を介して半導体層2に印加される電界の一部を図示している。半導体層2へ印加される電界のうち、垂直方向からの電界をE1、斜め方向からの電界をE2と示している。
<A.構成>
図5は、本実施の形態に係る薄膜トランジスタの構成を示す断面図である。本実施の形態に係る薄膜トランジスタは、半導体層2の絶縁性基板1に対向する面以外の面を覆うように、酸化膜からなる保護膜6がさらに形成されている。
次に、本実施の形態に係る薄膜トランジスタの製造方法について説明する。
本実施の形態に係る薄膜トランジスタは、実施の形態1の薄膜トランジスタと同様の効果に加えて、半導体層2が保護膜6により覆われているのでゲート絶縁膜4やゲート電極5を形成する際に、半導体層2の表面を外部雰囲気から保護することができる。
<A.構成>
図6は、本実施の形態に係る薄膜トランジスタの主要部の構成を示す断面図である。本実施の形態に係る薄膜トランジスタは、島状の半導体層2上にゲート絶縁膜4が形成されている。
次に、本実施の形態に係る薄膜トランジスタの製造方法について説明する。まず、絶縁性基板1の全面に半導体膜を成膜する。
本実施の形態に係る薄膜トランジスタは、ゲート絶縁膜4の溝部に絶縁膜7が埋め込まれている。そのため、ゲート絶縁膜4の上部が滑らかに形成される。その結果、ゲート絶縁膜4上にゲート電極5を断線することなく形成できる。また、半導体層2をテーパー状に形成する必要がなく、均一の膜厚に形成される。半導体層2に膜厚の薄い部分がないので、ハンプを生じない良好な電気特性の薄膜トランジスタを得ることができる。
Claims (4)
- 絶縁性基板上に島状に形成された半導体層と、
前記半導体層上に形成されたゲート絶縁膜と、
前記ゲート絶縁膜上に形成されたゲート電極と、
を備える薄膜トランジスタであって、
前記半導体層の側壁部での段差による前記ゲート絶縁膜の溝部を埋め込むように形成され、かつ前記半導体層の直上には形成されていない絶縁膜をさらに備えることを特徴とする薄膜トランジスタ。 - 前記絶縁膜は、SOG膜であることを特徴とする請求項1に記載の薄膜トランジスタ。
- 請求項1に記載の薄膜トランジスタの製造方法であって、
(a)絶縁性基板上に島状の半導体層を形成する工程と、
(b)前記半導体層を覆うようにゲート絶縁膜を形成する工程と、
(c)前記ゲート絶縁膜上に前記絶縁膜をスピン塗布することにより、前記半導体層の側壁部での段差による前記ゲート絶縁膜の溝部を埋め込み、かつ前記半導体層の直上には形成されないように前記絶縁膜を形成する工程と、
を備えることを特徴とする薄膜トランジスタの製造方法。 - 前記工程(c)は、前記絶縁性基板上にSOG膜をスピン塗布することにより、前記絶縁膜を形成する工程を含むことを特徴とする請求項3に記載の薄膜トランジスタの製造方法。
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005231600A JP4964442B2 (ja) | 2005-08-10 | 2005-08-10 | 薄膜トランジスタおよびその製造方法 |
TW095118799A TWI309476B (en) | 2005-08-10 | 2006-05-26 | Thin film transistor and method of manufacturing the same |
US11/420,956 US7709841B2 (en) | 2005-08-10 | 2006-05-30 | Thin film transistor having an island like semiconductor layer on an insulator |
CNA2006101110362A CN1913177A (zh) | 2005-08-10 | 2006-08-10 | 薄膜晶体管及其制造方法 |
KR1020070063151A KR100841380B1 (ko) | 2005-08-10 | 2007-06-26 | 박막트랜지스터 및 그 제조방법 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005231600A JP4964442B2 (ja) | 2005-08-10 | 2005-08-10 | 薄膜トランジスタおよびその製造方法 |
Publications (2)
Publication Number | Publication Date |
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JP2007048934A JP2007048934A (ja) | 2007-02-22 |
JP4964442B2 true JP4964442B2 (ja) | 2012-06-27 |
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Family Applications (1)
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JP2005231600A Active JP4964442B2 (ja) | 2005-08-10 | 2005-08-10 | 薄膜トランジスタおよびその製造方法 |
Country Status (5)
Country | Link |
---|---|
US (1) | US7709841B2 (ja) |
JP (1) | JP4964442B2 (ja) |
KR (1) | KR100841380B1 (ja) |
CN (1) | CN1913177A (ja) |
TW (1) | TWI309476B (ja) |
Families Citing this family (13)
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US8067772B2 (en) * | 2006-12-05 | 2011-11-29 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
US7968884B2 (en) * | 2006-12-05 | 2011-06-28 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
TWI535028B (zh) * | 2009-12-21 | 2016-05-21 | 半導體能源研究所股份有限公司 | 薄膜電晶體 |
KR101836067B1 (ko) * | 2009-12-21 | 2018-03-08 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 박막 트랜지스터와 그 제작 방법 |
US9230826B2 (en) | 2010-08-26 | 2016-01-05 | Semiconductor Energy Laboratory Co., Ltd. | Etching method using mixed gas and method for manufacturing semiconductor device |
US8704230B2 (en) | 2010-08-26 | 2014-04-22 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
US9348808B2 (en) * | 2011-12-12 | 2016-05-24 | Empire Technology Development Llc | Content-based automatic input protocol selection |
JP6106024B2 (ja) | 2013-05-21 | 2017-03-29 | 株式会社ジャパンディスプレイ | 薄膜トランジスタの製造方法及び薄膜トランジスタ |
US10032924B2 (en) * | 2014-03-31 | 2018-07-24 | The Hong Kong University Of Science And Technology | Metal oxide thin film transistor with channel, source and drain regions respectively capped with covers of different gas permeability |
CN105304786A (zh) * | 2015-11-13 | 2016-02-03 | 杭州士兰明芯科技有限公司 | Led芯片及其制作方法 |
CN105633224A (zh) * | 2016-01-04 | 2016-06-01 | 厦门市三安光电科技有限公司 | 一种led芯片电极与芯片结构及其制作方法 |
US10504939B2 (en) | 2017-02-21 | 2019-12-10 | The Hong Kong University Of Science And Technology | Integration of silicon thin-film transistors and metal-oxide thin film transistors |
CN106997904B (zh) * | 2017-04-17 | 2020-01-07 | 京东方科技集团股份有限公司 | 薄膜晶体管及制备方法、栅极驱动电路 |
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-
2005
- 2005-08-10 JP JP2005231600A patent/JP4964442B2/ja active Active
-
2006
- 2006-05-26 TW TW095118799A patent/TWI309476B/zh not_active IP Right Cessation
- 2006-05-30 US US11/420,956 patent/US7709841B2/en not_active Expired - Fee Related
- 2006-08-10 CN CNA2006101110362A patent/CN1913177A/zh active Pending
-
2007
- 2007-06-26 KR KR1020070063151A patent/KR100841380B1/ko active IP Right Grant
Also Published As
Publication number | Publication date |
---|---|
US20070034871A1 (en) | 2007-02-15 |
KR100841380B1 (ko) | 2008-06-26 |
CN1913177A (zh) | 2007-02-14 |
JP2007048934A (ja) | 2007-02-22 |
US7709841B2 (en) | 2010-05-04 |
KR20070082072A (ko) | 2007-08-20 |
TW200707749A (en) | 2007-02-16 |
TWI309476B (en) | 2009-05-01 |
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