JP4705881B2 - リードフレーム及びそれを用いた半導体装置 - Google Patents
リードフレーム及びそれを用いた半導体装置 Download PDFInfo
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- JP4705881B2 JP4705881B2 JP2006130369A JP2006130369A JP4705881B2 JP 4705881 B2 JP4705881 B2 JP 4705881B2 JP 2006130369 A JP2006130369 A JP 2006130369A JP 2006130369 A JP2006130369 A JP 2006130369A JP 4705881 B2 JP4705881 B2 JP 4705881B2
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- 239000004065 semiconductor Substances 0.000 title claims description 97
- 238000007789 sealing Methods 0.000 claims description 92
- 229920005989 resin Polymers 0.000 claims description 81
- 239000011347 resin Substances 0.000 claims description 81
- 239000000463 material Substances 0.000 claims description 80
- 230000015556 catabolic process Effects 0.000 claims description 13
- 239000002184 metal Substances 0.000 claims description 8
- 229910052751 metal Inorganic materials 0.000 claims description 8
- 241000272168 Laridae Species 0.000 claims description 4
- 230000008646 thermal stress Effects 0.000 description 15
- 230000035882 stress Effects 0.000 description 14
- 230000017525 heat dissipation Effects 0.000 description 10
- 230000007547 defect Effects 0.000 description 9
- 230000006866 deterioration Effects 0.000 description 9
- 238000000034 method Methods 0.000 description 8
- 238000005530 etching Methods 0.000 description 6
- 230000001771 impaired effect Effects 0.000 description 5
- 238000012986 modification Methods 0.000 description 5
- 230000004048 modification Effects 0.000 description 5
- 229910001111 Fine metal Inorganic materials 0.000 description 3
- 239000000853 adhesive Substances 0.000 description 3
- 230000001070 adhesive effect Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 230000035939 shock Effects 0.000 description 3
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 3
- 238000005520 cutting process Methods 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 238000003825 pressing Methods 0.000 description 2
- 238000000926 separation method Methods 0.000 description 2
- 229910000881 Cu alloy Inorganic materials 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 238000004299 exfoliation Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 230000002250 progressing effect Effects 0.000 description 1
- 230000000717 retained effect Effects 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 238000001721 transfer moulding Methods 0.000 description 1
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Description
本発明の第1の実施形態について図面を参照しながら説明する。
以下、本発明の第2の実施形態について図面を参照しながら説明する。
以下、本発明の第3の実施形態について図面を参照しながら説明する。
以下、本発明の第4の実施形態について図面を参照しながら説明する。
2 ダイパッド
3 タイバー
4 放熱板
5 インナーリード
6 GND(接地)リード
7 封止領域
8 アウターリード
9 溝部
10 突出部
11 ボンディングエリア
12 島状ボンディングエリア
13 連結部
14a〜14f スリット
15 屈曲部
16 GNDリード上ボンディングエリア
17 半導体チップ
18 電極パッド
19 接地用電極パッド
20 ボンディングエリア
21 金属細線
22 封止部
Claims (3)
- 上面に半導体チップを保持するダイパッドと、
前記ダイパッドにおける一の側面及び該一の側面と対向する他の側面からそれぞれ外側に延在する放熱板と、
前記ダイパッドにおける前記放熱板を除いて対向する両側面とそれぞれ対向し、前記ダイパッドを挟むように配置された複数のインナーリードと、
前記複数のインナーリードの外側に形成され、前記インナーリードと接続される複数のアウターリードとを備え、
前記複数のインナーリードのうちの少なくとも1つは、前記ダイパッドと連結された接地リードであり、
前記放熱板には、周囲の三方向が第1のスリットに囲まれ且つ残りの一方向が連結部により前記放熱板と接続され、前記ダイパッドと同一電位を有する島状のボンディングエリアが形成され、
前記第1のスリットは、前記連結部における前記放熱板との接続部分の両側方が前記インナーリード側に延びる切り欠き部を有していることを特徴とするリードフレーム。 - 前記請求項1に記載のリードフレームを用いた半導体装置であって、
前記ダイパッドの上に保持され、電極パッド及び接地用電極パッドを有する半導体チップと、
前記半導体チップを含む前記ダイパッド、前記各インナーリード及び前記島状のボンディングエリアを含む前記放熱板の一部を封止する封止用樹脂材よりなる封止部とを備え、 前記半導体チップは、金属細線により、前記電極パッドが前記インナーリードと電気的に接続され、前記接地用電極パッドが前記島状のボンディングエリア又は前記接地リードのボンディングエリアと電気的に接続されており、
前記島状のボンディングエリアは、前記連結部を除く周囲が前記封止用樹脂材により覆われており、
前記放熱板における残部と前記各アウターリードは、ガルウィング状に屈曲されていることを特徴とする半導体装置。 - 前記半導体チップは、高耐圧素子であることを特徴とする請求項2に記載の半導体装
置。
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JP2006130369A JP4705881B2 (ja) | 2006-05-09 | 2006-05-09 | リードフレーム及びそれを用いた半導体装置 |
SG200700808-9A SG137738A1 (en) | 2006-05-09 | 2007-02-02 | Lead frame and semiconductor device using the same |
CNA2007100057372A CN101071796A (zh) | 2006-05-09 | 2007-02-13 | 引线框及使用了它的半导体装置 |
US11/705,509 US20070262409A1 (en) | 2006-05-09 | 2007-02-13 | Lead frame and semiconductor device using the same |
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5026848B2 (ja) * | 2007-04-19 | 2012-09-19 | スタンレー電気株式会社 | 光半導体デバイスおよびその製造方法 |
JP2012089563A (ja) * | 2010-10-15 | 2012-05-10 | Sanken Electric Co Ltd | 半導体モジュール |
CN102034784B (zh) * | 2010-11-10 | 2013-06-05 | 吴江巨丰电子有限公司 | 一种28k引线框架 |
JP5885987B2 (ja) * | 2011-10-05 | 2016-03-16 | ローム株式会社 | 半導体装置 |
CN106611753A (zh) * | 2015-10-26 | 2017-05-03 | 无锡华润矽科微电子有限公司 | 芯片封装框架及芯片封装结构 |
CN106783753A (zh) * | 2016-12-21 | 2017-05-31 | 伍昭云 | 半导体器件 |
US10242935B2 (en) * | 2017-08-31 | 2019-03-26 | Nxp Usa, Inc. | Packaged semiconductor device and method for forming |
CN109192715B (zh) * | 2018-09-20 | 2024-03-22 | 江苏长电科技股份有限公司 | 引线框结构、封装结构及其制造方法 |
JP7225722B2 (ja) * | 2018-11-16 | 2023-02-21 | 富士電機株式会社 | リードフレーム、半導体装置及び半導体装置の製造方法 |
EP3671829B1 (en) * | 2018-12-17 | 2023-09-27 | Nexperia B.V. | Leadframe assembly for a semiconductor device |
JP7353121B2 (ja) * | 2019-10-08 | 2023-09-29 | キヤノン株式会社 | 半導体装置および機器 |
CN112563233B (zh) * | 2020-12-09 | 2023-04-11 | 天水七四九电子有限公司 | 一种平面封装件及其生产方法 |
WO2023176267A1 (ja) * | 2022-03-17 | 2023-09-21 | ローム株式会社 | 半導体装置 |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01244654A (ja) * | 1988-03-25 | 1989-09-29 | Nec Kyushu Ltd | リードフレーム |
JPH03276667A (ja) * | 1990-03-26 | 1991-12-06 | Hitachi Ltd | 半導体装置 |
JP2000150759A (ja) * | 1998-11-04 | 2000-05-30 | Denso Corp | 樹脂封止型半導体装置 |
JP2001085588A (ja) * | 1999-09-10 | 2001-03-30 | Mitsumi Electric Co Ltd | リードフレーム及び半導体装置 |
JP2002334965A (ja) * | 2001-05-08 | 2002-11-22 | Kunifumi Komiya | 高周波デバイス用パッケージ |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5291060A (en) * | 1989-10-16 | 1994-03-01 | Shinko Electric Industries Co., Ltd. | Lead frame and semiconductor device using same |
US5583375A (en) * | 1990-06-11 | 1996-12-10 | Hitachi, Ltd. | Semiconductor device with lead structure within the planar area of the device |
KR0148077B1 (ko) * | 1994-08-16 | 1998-08-01 | 김광호 | 분리된 다이 패드를 갖는 반도체 패키지 |
US5780772A (en) * | 1997-01-24 | 1998-07-14 | National Semiconductor Corporation | Solution to mold wire sweep in fine pitch devices |
US5869898A (en) * | 1997-04-25 | 1999-02-09 | Nec Corporation | Lead-frame having interdigitated signal and ground leads with high frequency leads positioned adjacent a corner and shielded by ground leads on either side thereof |
JP3063847B2 (ja) * | 1998-05-01 | 2000-07-12 | 日本電気株式会社 | リードフレーム及びそれを用いた半導体装置 |
JP3895570B2 (ja) * | 2000-12-28 | 2007-03-22 | 株式会社ルネサステクノロジ | 半導体装置 |
US6661083B2 (en) * | 2001-02-27 | 2003-12-09 | Chippac, Inc | Plastic semiconductor package |
JP2003204027A (ja) * | 2002-01-09 | 2003-07-18 | Matsushita Electric Ind Co Ltd | リードフレーム及びその製造方法、樹脂封止型半導体装置及びその製造方法 |
TWI250632B (en) * | 2003-05-28 | 2006-03-01 | Siliconware Precision Industries Co Ltd | Ground-enhancing semiconductor package and lead frame |
JP4469654B2 (ja) * | 2004-05-13 | 2010-05-26 | パナソニック株式会社 | 半導体装置及び半導体装置の製造方法 |
US8536688B2 (en) * | 2004-05-25 | 2013-09-17 | Stats Chippac Ltd. | Integrated circuit leadframe and fabrication method therefor |
JP4255934B2 (ja) * | 2005-08-26 | 2009-04-22 | シャープ株式会社 | 半導体素子、および、この半導体素子を用いた電子機器 |
-
2006
- 2006-05-09 JP JP2006130369A patent/JP4705881B2/ja active Active
-
2007
- 2007-02-02 SG SG200700808-9A patent/SG137738A1/en unknown
- 2007-02-13 US US11/705,509 patent/US20070262409A1/en not_active Abandoned
- 2007-02-13 CN CNA2007100057372A patent/CN101071796A/zh active Pending
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01244654A (ja) * | 1988-03-25 | 1989-09-29 | Nec Kyushu Ltd | リードフレーム |
JPH03276667A (ja) * | 1990-03-26 | 1991-12-06 | Hitachi Ltd | 半導体装置 |
JP2000150759A (ja) * | 1998-11-04 | 2000-05-30 | Denso Corp | 樹脂封止型半導体装置 |
JP2001085588A (ja) * | 1999-09-10 | 2001-03-30 | Mitsumi Electric Co Ltd | リードフレーム及び半導体装置 |
JP2002334965A (ja) * | 2001-05-08 | 2002-11-22 | Kunifumi Komiya | 高周波デバイス用パッケージ |
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US20070262409A1 (en) | 2007-11-15 |
SG137738A1 (en) | 2007-12-28 |
CN101071796A (zh) | 2007-11-14 |
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