JP4593159B2 - 半導体装置 - Google Patents

半導体装置 Download PDF

Info

Publication number
JP4593159B2
JP4593159B2 JP2004129233A JP2004129233A JP4593159B2 JP 4593159 B2 JP4593159 B2 JP 4593159B2 JP 2004129233 A JP2004129233 A JP 2004129233A JP 2004129233 A JP2004129233 A JP 2004129233A JP 4593159 B2 JP4593159 B2 JP 4593159B2
Authority
JP
Japan
Prior art keywords
memory cell
semiconductor device
gate electrode
writing
charge storage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2004129233A
Other languages
English (en)
Japanese (ja)
Other versions
JP2005011490A (ja
JP2005011490A5 (enExample
Inventor
望 松崎
哲也 石丸
真 水野
孝司 橋本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Electronics Corp
Original Assignee
Renesas Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Electronics Corp filed Critical Renesas Electronics Corp
Priority to JP2004129233A priority Critical patent/JP4593159B2/ja
Priority to US10/852,150 priority patent/US8054680B2/en
Priority to TW093114807A priority patent/TW200506952A/zh
Priority to CNA2004100455022A priority patent/CN1574062A/zh
Priority to KR1020040038120A priority patent/KR20040103781A/ko
Publication of JP2005011490A publication Critical patent/JP2005011490A/ja
Publication of JP2005011490A5 publication Critical patent/JP2005011490A5/ja
Application granted granted Critical
Publication of JP4593159B2 publication Critical patent/JP4593159B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • G11C16/107Programming all cells in an array, sector or block to the same state prior to flash erasing
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • G11C16/14Circuits for erasing electrically, e.g. erase voltage switching circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/26Sensing or reading circuits; Data output circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/34Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436Arrangements for verifying correct programming or erasure
    • G11C16/3468Prevention of overerasure or overprogramming, e.g. by verifying whilst erasing or writing
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region

Landscapes

  • Read Only Memory (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
JP2004129233A 2003-05-28 2004-04-26 半導体装置 Expired - Fee Related JP4593159B2 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2004129233A JP4593159B2 (ja) 2003-05-28 2004-04-26 半導体装置
US10/852,150 US8054680B2 (en) 2003-05-28 2004-05-25 Semiconductor device
TW093114807A TW200506952A (en) 2003-05-28 2004-05-25 Semiconductor device
CNA2004100455022A CN1574062A (zh) 2003-05-28 2004-05-28 半导体器件
KR1020040038120A KR20040103781A (ko) 2003-05-28 2004-05-28 반도체 장치

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2003150226 2003-05-28
JP2004129233A JP4593159B2 (ja) 2003-05-28 2004-04-26 半導体装置

Publications (3)

Publication Number Publication Date
JP2005011490A JP2005011490A (ja) 2005-01-13
JP2005011490A5 JP2005011490A5 (enExample) 2007-05-17
JP4593159B2 true JP4593159B2 (ja) 2010-12-08

Family

ID=33566714

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004129233A Expired - Fee Related JP4593159B2 (ja) 2003-05-28 2004-04-26 半導体装置

Country Status (5)

Country Link
US (1) US8054680B2 (enExample)
JP (1) JP4593159B2 (enExample)
KR (1) KR20040103781A (enExample)
CN (1) CN1574062A (enExample)
TW (1) TW200506952A (enExample)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007193862A (ja) * 2006-01-17 2007-08-02 Toshiba Corp 不揮発性半導体記憶装置
JP4965948B2 (ja) * 2006-09-21 2012-07-04 ルネサスエレクトロニクス株式会社 半導体装置
JP5068053B2 (ja) * 2006-10-02 2012-11-07 ルネサスエレクトロニクス株式会社 不揮発性半導体記憶装置およびその動作方法
JP2008270343A (ja) * 2007-04-17 2008-11-06 Renesas Technology Corp 不揮発性半導体記憶装置
JP5238208B2 (ja) 2007-09-27 2013-07-17 株式会社東芝 不揮発性半導体記憶装置の駆動方法及び不揮発性半導体記憶装置
US7643349B2 (en) * 2007-10-18 2010-01-05 Macronix International Co., Ltd. Efficient erase algorithm for SONOS-type NAND flash
JP5166095B2 (ja) * 2008-03-31 2013-03-21 株式会社東芝 不揮発性半導体記憶装置の駆動方法及び不揮発性半導体記憶装置
US8432732B2 (en) 2010-07-09 2013-04-30 Sandisk Technologies Inc. Detection of word-line leakage in memory arrays
US8514630B2 (en) 2010-07-09 2013-08-20 Sandisk Technologies Inc. Detection of word-line leakage in memory arrays: current based approach
US8379454B2 (en) * 2011-05-05 2013-02-19 Sandisk Technologies Inc. Detection of broken word-lines in memory arrays
US8775901B2 (en) 2011-07-28 2014-07-08 SanDisk Technologies, Inc. Data recovery for defective word lines during programming of non-volatile memory arrays
US8750042B2 (en) 2011-07-28 2014-06-10 Sandisk Technologies Inc. Combined simultaneous sensing of multiple wordlines in a post-write read (PWR) and detection of NAND failures
US8730722B2 (en) 2012-03-02 2014-05-20 Sandisk Technologies Inc. Saving of data in cases of word-line to word-line short in memory arrays
US9165683B2 (en) 2013-09-23 2015-10-20 Sandisk Technologies Inc. Multi-word line erratic programming detection
KR102170975B1 (ko) * 2013-10-31 2020-10-28 삼성전자주식회사 불휘발성 메모리 장치 및 그것의 불량 워드라인 탐지 방법
US9443612B2 (en) 2014-07-10 2016-09-13 Sandisk Technologies Llc Determination of bit line to low voltage signal shorts
US9484086B2 (en) 2014-07-10 2016-11-01 Sandisk Technologies Llc Determination of word line to local source line shorts
US9514835B2 (en) 2014-07-10 2016-12-06 Sandisk Technologies Llc Determination of word line to word line shorts between adjacent blocks
US9460809B2 (en) 2014-07-10 2016-10-04 Sandisk Technologies Llc AC stress mode to screen out word line to word line shorts
US9202593B1 (en) 2014-09-02 2015-12-01 Sandisk Technologies Inc. Techniques for detecting broken word lines in non-volatile memories
US9240249B1 (en) 2014-09-02 2016-01-19 Sandisk Technologies Inc. AC stress methods to screen out bit line defects
US9449694B2 (en) 2014-09-04 2016-09-20 Sandisk Technologies Llc Non-volatile memory with multi-word line select for defect detection operations
US9659666B2 (en) 2015-08-31 2017-05-23 Sandisk Technologies Llc Dynamic memory recovery at the sub-block level

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3882469A (en) * 1971-11-30 1975-05-06 Texas Instruments Inc Non-volatile variable threshold memory cell
JPH02137196A (ja) * 1988-11-17 1990-05-25 Mitsubishi Electric Corp 不揮発性半導体記憶装置
US5408115A (en) * 1994-04-04 1995-04-18 Motorola Inc. Self-aligned, split-gate EEPROM device
JP3123921B2 (ja) * 1995-05-18 2001-01-15 三洋電機株式会社 半導体装置および不揮発性半導体メモリ
US6469343B1 (en) * 1998-04-02 2002-10-22 Nippon Steel Corporation Multi-level type nonvolatile semiconductor memory device
JPH11134881A (ja) * 1997-10-31 1999-05-21 Sanyo Electric Co Ltd 不揮発性多値メモリ装置及びそのデータの消去方法
JP2000021181A (ja) * 1998-06-30 2000-01-21 Matsushita Electric Ind Co Ltd 不揮発性半導体記憶装置
KR100357644B1 (ko) * 1999-02-19 2002-10-25 미쓰비시덴키 가부시키가이샤 비휘발성 반도체 기억장치 및 그 구동방법, 동작방법 및제조방법
TW546840B (en) * 2001-07-27 2003-08-11 Hitachi Ltd Non-volatile semiconductor memory device
JP3980874B2 (ja) * 2001-11-30 2007-09-26 スパンション エルエルシー 半導体記憶装置及びその駆動方法
JP2003257192A (ja) * 2002-03-06 2003-09-12 Mitsubishi Electric Corp 半導体記憶装置および不揮発性半導体記憶装置
KR100456596B1 (ko) * 2002-05-08 2004-11-09 삼성전자주식회사 부유트랩형 비휘발성 기억소자의 소거 방법
US6894931B2 (en) * 2002-06-20 2005-05-17 Kabushiki Kaisha Toshiba Nonvolatile semiconductor memory device
JP2004303918A (ja) * 2003-03-31 2004-10-28 Renesas Technology Corp 半導体装置の製造方法および半導体装置

Also Published As

Publication number Publication date
US8054680B2 (en) 2011-11-08
JP2005011490A (ja) 2005-01-13
CN1574062A (zh) 2005-02-02
TW200506952A (en) 2005-02-16
US20050006698A1 (en) 2005-01-13
KR20040103781A (ko) 2004-12-09

Similar Documents

Publication Publication Date Title
JP4593159B2 (ja) 半導体装置
JP5072723B2 (ja) 不揮発性半導体記憶装置
KR100960352B1 (ko) 선 소거 단계를 이용하여 플래시 메모리를 소거하는 방법
US20030206435A1 (en) Nonvolatile semiconductor storage device and data erasing method
JP3709126B2 (ja) 不揮発性半導体メモリ装置の消去方法
KR102098266B1 (ko) 반도체 메모리 장치
US6515908B2 (en) Nonvolatile semiconductor memory device having reduced erase time and method of erasing data of the same
JP3980874B2 (ja) 半導体記憶装置及びその駆動方法
KR20140047516A (ko) 불휘발성 반도체 메모리, 소거 방법 및 프로그램 방법
JP2009266356A (ja) Nand型フラッシュメモリ
JP5565948B2 (ja) 半導体メモリ
KR20120006936A (ko) 비휘발성 메모리 블록의 소프트 프로그램
JP3974778B2 (ja) 不揮発性半導体メモリ装置およびそのデータ消去方法
KR101668340B1 (ko) Nand형 플래시 메모리 및 그의 프로그래밍 방법
JP2012198966A (ja) 不揮発性半導体記憶装置及びそのデータ消去方法
CN111724852A (zh) 非易失性存储器件及其擦除方法
CN100464375C (zh) 降低擦除时间及防止过擦除之擦除方法
JP5058461B2 (ja) フラッシュメモリのための選択的消去方法
JPWO2006059375A1 (ja) 半導体装置および半導体装置の制御方法
US7075832B2 (en) Method for erasing an NROM cell
JP4672673B2 (ja) 半導体装置および半導体装置の制御方法
JP4613353B2 (ja) 半導体装置およびプログラム方法
US20110069556A1 (en) Nand flash memory
JP2008293616A (ja) 不揮発性半導体記憶装置の消去方法
JP2005228371A (ja) 半導体記憶装置及びその閾値電圧制御方法

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20070323

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20070323

RD02 Notification of acceptance of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7422

Effective date: 20070323

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20090713

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20090721

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20090918

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20100216

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20100414

A711 Notification of change in applicant

Free format text: JAPANESE INTERMEDIATE CODE: A712

Effective date: 20100510

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20100831

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20100915

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130924

Year of fee payment: 3

R150 Certificate of patent or registration of utility model

Ref document number: 4593159

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

Free format text: JAPANESE INTERMEDIATE CODE: R150

S531 Written request for registration of change of domicile

Free format text: JAPANESE INTERMEDIATE CODE: R313531

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

LAPS Cancellation because of no payment of annual fees