TW200506952A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
TW200506952A
TW200506952A TW093114807A TW93114807A TW200506952A TW 200506952 A TW200506952 A TW 200506952A TW 093114807 A TW093114807 A TW 093114807A TW 93114807 A TW93114807 A TW 93114807A TW 200506952 A TW200506952 A TW 200506952A
Authority
TW
Taiwan
Prior art keywords
erase
memory cells
semiconductor nonvolatile
nonvolatile memory
memory device
Prior art date
Application number
TW093114807A
Other languages
Chinese (zh)
Inventor
Nozomu Matsuzaki
Tetsuya Ishimaru
Makoto Mizuno
Takashi Hashimoto
Original Assignee
Renesas Tech Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Tech Corp filed Critical Renesas Tech Corp
Publication of TW200506952A publication Critical patent/TW200506952A/en

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/107—Programming all cells in an array, sector or block to the same state prior to flash erasing
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/26—Sensing or reading circuits; Data output circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3468—Prevention of overerasure or overprogramming, e.g. by verifying whilst erasing or writing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region

Abstract

Memory cells in which an erase and write operation is performed by injecting electrons from a substrate and extracting the electrons into a gate electrode constitute a semiconductor nonvolatile memory device. That is a gate extraction semiconductor nonvolatile memory device. In that device, if an erase bias is applied in a first process of an erase and write operation, memory cells in an overerase condition occur and the charge retention characteristics of such memory cells are degraded. The present invention provides a semiconductor nonvolatile memory device using means for writing all the memory cells in an erase unit before applying the erase bias, and then applying the erase bias.
TW093114807A 2003-05-28 2004-05-25 Semiconductor device TW200506952A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2003150226 2003-05-28
JP2004129233A JP4593159B2 (en) 2003-05-28 2004-04-26 Semiconductor device

Publications (1)

Publication Number Publication Date
TW200506952A true TW200506952A (en) 2005-02-16

Family

ID=33566714

Family Applications (1)

Application Number Title Priority Date Filing Date
TW093114807A TW200506952A (en) 2003-05-28 2004-05-25 Semiconductor device

Country Status (5)

Country Link
US (1) US8054680B2 (en)
JP (1) JP4593159B2 (en)
KR (1) KR20040103781A (en)
CN (1) CN1574062A (en)
TW (1) TW200506952A (en)

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JP2007193862A (en) * 2006-01-17 2007-08-02 Toshiba Corp Nonvolatile semiconductor memory device
JP4965948B2 (en) * 2006-09-21 2012-07-04 ルネサスエレクトロニクス株式会社 Semiconductor device
JP5068053B2 (en) * 2006-10-02 2012-11-07 ルネサスエレクトロニクス株式会社 Nonvolatile semiconductor memory device and operation method thereof
JP2008270343A (en) * 2007-04-17 2008-11-06 Renesas Technology Corp Non-volatile semiconductor storage device
JP5238208B2 (en) * 2007-09-27 2013-07-17 株式会社東芝 Nonvolatile semiconductor memory device driving method and nonvolatile semiconductor memory device
US7643349B2 (en) * 2007-10-18 2010-01-05 Macronix International Co., Ltd. Efficient erase algorithm for SONOS-type NAND flash
JP5166095B2 (en) 2008-03-31 2013-03-21 株式会社東芝 Nonvolatile semiconductor memory device driving method and nonvolatile semiconductor memory device
US8432732B2 (en) 2010-07-09 2013-04-30 Sandisk Technologies Inc. Detection of word-line leakage in memory arrays
US8514630B2 (en) 2010-07-09 2013-08-20 Sandisk Technologies Inc. Detection of word-line leakage in memory arrays: current based approach
US8379454B2 (en) * 2011-05-05 2013-02-19 Sandisk Technologies Inc. Detection of broken word-lines in memory arrays
US8750042B2 (en) 2011-07-28 2014-06-10 Sandisk Technologies Inc. Combined simultaneous sensing of multiple wordlines in a post-write read (PWR) and detection of NAND failures
US8775901B2 (en) 2011-07-28 2014-07-08 SanDisk Technologies, Inc. Data recovery for defective word lines during programming of non-volatile memory arrays
US8730722B2 (en) 2012-03-02 2014-05-20 Sandisk Technologies Inc. Saving of data in cases of word-line to word-line short in memory arrays
US9165683B2 (en) 2013-09-23 2015-10-20 Sandisk Technologies Inc. Multi-word line erratic programming detection
KR102170975B1 (en) * 2013-10-31 2020-10-28 삼성전자주식회사 Nonvolatile memory device and defected wordline detection method thereof
US9514835B2 (en) 2014-07-10 2016-12-06 Sandisk Technologies Llc Determination of word line to word line shorts between adjacent blocks
US9484086B2 (en) 2014-07-10 2016-11-01 Sandisk Technologies Llc Determination of word line to local source line shorts
US9460809B2 (en) 2014-07-10 2016-10-04 Sandisk Technologies Llc AC stress mode to screen out word line to word line shorts
US9443612B2 (en) 2014-07-10 2016-09-13 Sandisk Technologies Llc Determination of bit line to low voltage signal shorts
US9202593B1 (en) 2014-09-02 2015-12-01 Sandisk Technologies Inc. Techniques for detecting broken word lines in non-volatile memories
US9240249B1 (en) 2014-09-02 2016-01-19 Sandisk Technologies Inc. AC stress methods to screen out bit line defects
US9449694B2 (en) 2014-09-04 2016-09-20 Sandisk Technologies Llc Non-volatile memory with multi-word line select for defect detection operations
US9659666B2 (en) 2015-08-31 2017-05-23 Sandisk Technologies Llc Dynamic memory recovery at the sub-block level

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US3882469A (en) * 1971-11-30 1975-05-06 Texas Instruments Inc Non-volatile variable threshold memory cell
JPH02137196A (en) * 1988-11-17 1990-05-25 Mitsubishi Electric Corp Non-volatile semiconductor memory
US5408115A (en) * 1994-04-04 1995-04-18 Motorola Inc. Self-aligned, split-gate EEPROM device
JP3123921B2 (en) * 1995-05-18 2001-01-15 三洋電機株式会社 Semiconductor device and nonvolatile semiconductor memory
US6469343B1 (en) * 1998-04-02 2002-10-22 Nippon Steel Corporation Multi-level type nonvolatile semiconductor memory device
JPH11134881A (en) * 1997-10-31 1999-05-21 Sanyo Electric Co Ltd Nonvolatile multi-value memory and method of erasing data thereof
JP2000021181A (en) * 1998-06-30 2000-01-21 Matsushita Electric Ind Co Ltd Nonvolatile semiconductor memory apparatus
TW451427B (en) * 1999-02-19 2001-08-21 Mitsubishi Electric Corp Non-volatile semiconductor memory device and the driving method, operation method and manufacturing method of the same
TW546840B (en) * 2001-07-27 2003-08-11 Hitachi Ltd Non-volatile semiconductor memory device
JP3980874B2 (en) * 2001-11-30 2007-09-26 スパンション エルエルシー Semiconductor memory device and driving method thereof
JP2003257192A (en) * 2002-03-06 2003-09-12 Mitsubishi Electric Corp Semiconductor memory device and nonvolatile semiconductor memory device
KR100456596B1 (en) * 2002-05-08 2004-11-09 삼성전자주식회사 Method of erasing floating trap type non-volatile memory device
US6894931B2 (en) * 2002-06-20 2005-05-17 Kabushiki Kaisha Toshiba Nonvolatile semiconductor memory device
JP2004303918A (en) * 2003-03-31 2004-10-28 Renesas Technology Corp Semiconductor device and method of manufacturing the same

Also Published As

Publication number Publication date
JP2005011490A (en) 2005-01-13
US20050006698A1 (en) 2005-01-13
CN1574062A (en) 2005-02-02
KR20040103781A (en) 2004-12-09
US8054680B2 (en) 2011-11-08
JP4593159B2 (en) 2010-12-08

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