JP4493182B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP4493182B2 JP4493182B2 JP2000252158A JP2000252158A JP4493182B2 JP 4493182 B2 JP4493182 B2 JP 4493182B2 JP 2000252158 A JP2000252158 A JP 2000252158A JP 2000252158 A JP2000252158 A JP 2000252158A JP 4493182 B2 JP4493182 B2 JP 4493182B2
- Authority
- JP
- Japan
- Prior art keywords
- region
- insulating film
- film
- semiconductor substrate
- opening
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004065 semiconductor Substances 0.000 title claims description 81
- 239000000758 substrate Substances 0.000 claims description 92
- 238000002955 isolation Methods 0.000 claims description 49
- 239000010410 layer Substances 0.000 claims description 47
- 230000015572 biosynthetic process Effects 0.000 claims description 36
- 239000012535 impurity Substances 0.000 claims description 26
- 239000011800 void material Substances 0.000 claims description 25
- 239000011229 interlayer Substances 0.000 claims description 15
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 56
- 229910052710 silicon Inorganic materials 0.000 description 56
- 239000010703 silicon Substances 0.000 description 56
- 238000000034 method Methods 0.000 description 52
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 22
- 239000013078 crystal Substances 0.000 description 17
- 230000007547 defect Effects 0.000 description 17
- 238000004519 manufacturing process Methods 0.000 description 16
- 238000009792 diffusion process Methods 0.000 description 14
- 229920002120 photoresistant polymer Polymers 0.000 description 13
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 11
- 229920005591 polysilicon Polymers 0.000 description 11
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical group [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 5
- 229910052751 metal Inorganic materials 0.000 description 5
- 239000002184 metal Substances 0.000 description 5
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 4
- 229910052796 boron Inorganic materials 0.000 description 4
- 229910052698 phosphorus Inorganic materials 0.000 description 4
- 239000011574 phosphorus Substances 0.000 description 4
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 239000005368 silicate glass Substances 0.000 description 3
- DJQYKWDYUQPOOE-OGRLCSSISA-N (2s,3s)-2-[4-[(1s)-1-amino-3-methylbutyl]triazol-1-yl]-1-[4-[4-[4-[(2s,3s)-2-[4-[(1s)-1-amino-3-methylbutyl]triazol-1-yl]-3-methylpentanoyl]piperazin-1-yl]-6-[2-[2-(2-prop-2-ynoxyethoxy)ethoxy]ethylamino]-1,3,5-triazin-2-yl]piperazin-1-yl]-3-methylpentan- Chemical compound Cl.N1([C@@H]([C@@H](C)CC)C(=O)N2CCN(CC2)C=2N=C(NCCOCCOCCOCC#C)N=C(N=2)N2CCN(CC2)C(=O)[C@H]([C@@H](C)CC)N2N=NC(=C2)[C@@H](N)CC(C)C)C=C([C@@H](N)CC(C)C)N=N1 DJQYKWDYUQPOOE-OGRLCSSISA-N 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 230000003071 parasitic effect Effects 0.000 description 2
- 230000002093 peripheral effect Effects 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- -1 Phospho Chemical class 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000002784 hot electron Substances 0.000 description 1
- 230000001771 impaired effect Effects 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 230000002040 relaxant effect Effects 0.000 description 1
- 229910021332 silicide Inorganic materials 0.000 description 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- WQJQOUPTWCFRMM-UHFFFAOYSA-N tungsten disilicide Chemical compound [Si]#[W]#[Si] WQJQOUPTWCFRMM-UHFFFAOYSA-N 0.000 description 1
- 229910021342 tungsten silicide Inorganic materials 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B99/00—Subject matter not provided for in other groups of this subclass
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/5222—Capacitive arrangements or effects of, or between wiring layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2000252158A JP4493182B2 (ja) | 2000-08-23 | 2000-08-23 | 半導体装置 |
US09/773,624 US6469339B1 (en) | 2000-08-23 | 2001-02-02 | Semiconductor memory with voids for suppressing crystal defects |
KR10-2001-0017788A KR100383780B1 (ko) | 2000-08-23 | 2001-04-04 | 반도체 장치 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2000252158A JP4493182B2 (ja) | 2000-08-23 | 2000-08-23 | 半導体装置 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2010047579A Division JP2010153904A (ja) | 2010-03-04 | 2010-03-04 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2002076299A JP2002076299A (ja) | 2002-03-15 |
JP4493182B2 true JP4493182B2 (ja) | 2010-06-30 |
Family
ID=18741451
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2000252158A Expired - Fee Related JP4493182B2 (ja) | 2000-08-23 | 2000-08-23 | 半導体装置 |
Country Status (3)
Country | Link |
---|---|
US (1) | US6469339B1 (ko) |
JP (1) | JP4493182B2 (ko) |
KR (1) | KR100383780B1 (ko) |
Families Citing this family (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6489253B1 (en) * | 2001-02-16 | 2002-12-03 | Advanced Micro Devices, Inc. | Method of forming a void-free interlayer dielectric (ILD0) for 0.18-μm flash memory technology and semiconductor device thereby formed |
JP3917063B2 (ja) | 2002-11-21 | 2007-05-23 | 株式会社東芝 | 半導体装置及びその製造方法 |
US7045849B2 (en) * | 2003-05-21 | 2006-05-16 | Sandisk Corporation | Use of voids between elements in semiconductor structures for isolation |
JP4786126B2 (ja) * | 2003-06-04 | 2011-10-05 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
JP2006302950A (ja) | 2005-04-15 | 2006-11-02 | Renesas Technology Corp | 不揮発性半導体装置および不揮発性半導体装置の製造方法 |
KR100784860B1 (ko) | 2005-10-31 | 2007-12-14 | 삼성전자주식회사 | 비휘발성 메모리 장치 및 그 제조 방법 |
US8436410B2 (en) | 2005-10-31 | 2013-05-07 | Samsung Electronics Co., Ltd. | Semiconductor devices comprising a plurality of gate structures |
EP1804293A1 (en) * | 2005-12-30 | 2007-07-04 | STMicroelectronics S.r.l. | Process for manufacturing a non volatile memory electronic device |
JP2007299975A (ja) * | 2006-05-01 | 2007-11-15 | Renesas Technology Corp | 半導体装置およびその製造方法 |
JP4827639B2 (ja) * | 2006-07-12 | 2011-11-30 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
US7948021B2 (en) | 2007-04-27 | 2011-05-24 | Kabushiki Kaisha Toshiba | Semiconductor memory device and method of fabricating the same |
JP2009010088A (ja) * | 2007-06-27 | 2009-01-15 | Toshiba Corp | 半導体装置とその製造方法 |
JP2009194244A (ja) * | 2008-02-15 | 2009-08-27 | Toshiba Corp | 半導体記憶装置及びその製造方法 |
JP4729060B2 (ja) * | 2008-02-26 | 2011-07-20 | 株式会社東芝 | 半導体記憶装置の製造方法 |
KR100972453B1 (ko) * | 2010-04-05 | 2010-07-28 | (주)종합건축사사무소건원 | 베란다용 안전난간 |
KR20120015178A (ko) * | 2010-08-11 | 2012-02-21 | 삼성전자주식회사 | 반도체 소자 및 반도체 소자 제조 방법 |
JP5570953B2 (ja) | 2010-11-18 | 2014-08-13 | 株式会社東芝 | 不揮発性半導体記憶装置および不揮発性半導体記憶装置の製造方法 |
SG181212A1 (en) * | 2010-11-18 | 2012-06-28 | Toshiba Kk | Nonvolatile semiconductor memory and method of manufacturing with multiple air gaps |
KR101813513B1 (ko) | 2011-11-30 | 2018-01-02 | 삼성전자주식회사 | 반도체 소자 및 반도체 소자의 제조 방법 |
JP5526162B2 (ja) * | 2012-01-16 | 2014-06-18 | ルネサスエレクトロニクス株式会社 | 不揮発性半導体装置および不揮発性半導体装置の製造方法 |
KR20140030483A (ko) * | 2012-08-30 | 2014-03-12 | 에스케이하이닉스 주식회사 | 비휘발성 메모리 장치 및 그 제조 방법 |
US9129995B2 (en) * | 2013-08-23 | 2015-09-08 | Kabushiki Kaisha Toshiba | Semiconductor memory device and method for manufacturing the same |
CN105310173B (zh) * | 2014-07-31 | 2017-05-24 | 福建登泰科技有限公司 | 一种设有拖鞋带固定扣的人字拖鞋 |
CN112992774B (zh) * | 2019-12-02 | 2022-06-10 | 长鑫存储技术有限公司 | 间隙的形成方法 |
CN113314457B (zh) * | 2020-02-27 | 2023-04-18 | 长鑫存储技术有限公司 | 半导体结构的形成方法及半导体结构 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11251428A (ja) * | 1997-12-31 | 1999-09-17 | Lg Semicon Co Ltd | 半導体デバイスの配線構造及び形成方法 |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0286146A (ja) * | 1988-09-22 | 1990-03-27 | Hitachi Ltd | 半導体装置 |
JP3597885B2 (ja) * | 1994-06-06 | 2004-12-08 | テキサス インスツルメンツ インコーポレイテツド | 半導体装置 |
JPH0897379A (ja) | 1994-09-27 | 1996-04-12 | Sony Corp | 半導体集積回路とその製法 |
JPH0964179A (ja) * | 1995-08-25 | 1997-03-07 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
US6303464B1 (en) * | 1996-12-30 | 2001-10-16 | Intel Corporation | Method and structure for reducing interconnect system capacitance through enclosed voids in a dielectric layer |
JP2998678B2 (ja) | 1997-02-17 | 2000-01-11 | 日本電気株式会社 | 半導体装置の製造方法 |
JP3519589B2 (ja) * | 1997-12-24 | 2004-04-19 | 株式会社ルネサステクノロジ | 半導体集積回路の製造方法 |
JP2000068482A (ja) * | 1998-08-18 | 2000-03-03 | Toshiba Corp | 不揮発性半導体メモリ |
JP2000100976A (ja) * | 1998-09-21 | 2000-04-07 | Matsushita Electronics Industry Corp | 半導体メモリアレイ装置およびその製造方法 |
JP2000183149A (ja) * | 1998-12-10 | 2000-06-30 | Sanyo Electric Co Ltd | 半導体装置 |
JP3540640B2 (ja) * | 1998-12-22 | 2004-07-07 | 株式会社東芝 | 不揮発性半導体記憶装置 |
-
2000
- 2000-08-23 JP JP2000252158A patent/JP4493182B2/ja not_active Expired - Fee Related
-
2001
- 2001-02-02 US US09/773,624 patent/US6469339B1/en not_active Expired - Lifetime
- 2001-04-04 KR KR10-2001-0017788A patent/KR100383780B1/ko not_active IP Right Cessation
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11251428A (ja) * | 1997-12-31 | 1999-09-17 | Lg Semicon Co Ltd | 半導体デバイスの配線構造及び形成方法 |
Also Published As
Publication number | Publication date |
---|---|
KR100383780B1 (ko) | 2003-05-12 |
KR20020015934A (ko) | 2002-03-02 |
US6469339B1 (en) | 2002-10-22 |
JP2002076299A (ja) | 2002-03-15 |
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