JP4170210B2 - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
JP4170210B2
JP4170210B2 JP2003422108A JP2003422108A JP4170210B2 JP 4170210 B2 JP4170210 B2 JP 4170210B2 JP 2003422108 A JP2003422108 A JP 2003422108A JP 2003422108 A JP2003422108 A JP 2003422108A JP 4170210 B2 JP4170210 B2 JP 4170210B2
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Japan
Prior art keywords
conductivity type
contact
region
semiconductor device
diffusion layer
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Expired - Fee Related
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JP2003422108A
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English (en)
Japanese (ja)
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JP2005183661A (ja
JP2005183661A5 (enExample
Inventor
基嗣 奥島
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NEC Electronics Corp
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NEC Electronics Corp
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Filing date
Publication date
Application filed by NEC Electronics Corp filed Critical NEC Electronics Corp
Priority to JP2003422108A priority Critical patent/JP4170210B2/ja
Priority to EP04029737A priority patent/EP1544918A3/en
Priority to CNB2004101019088A priority patent/CN100505240C/zh
Priority to US11/014,702 priority patent/US7183612B2/en
Publication of JP2005183661A publication Critical patent/JP2005183661A/ja
Publication of JP2005183661A5 publication Critical patent/JP2005183661A5/ja
Application granted granted Critical
Publication of JP4170210B2 publication Critical patent/JP4170210B2/ja
Anticipated expiration legal-status Critical
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
    • H10D89/911—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using passive elements as protective elements

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  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
JP2003422108A 2003-12-19 2003-12-19 半導体装置 Expired - Fee Related JP4170210B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2003422108A JP4170210B2 (ja) 2003-12-19 2003-12-19 半導体装置
EP04029737A EP1544918A3 (en) 2003-12-19 2004-12-15 Semiconductor device with ESD element
CNB2004101019088A CN100505240C (zh) 2003-12-19 2004-12-20 半导体器件
US11/014,702 US7183612B2 (en) 2003-12-19 2004-12-20 Semiconductor device having an electrostatic discharge protecting element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2003422108A JP4170210B2 (ja) 2003-12-19 2003-12-19 半導体装置

Publications (3)

Publication Number Publication Date
JP2005183661A JP2005183661A (ja) 2005-07-07
JP2005183661A5 JP2005183661A5 (enExample) 2005-11-24
JP4170210B2 true JP4170210B2 (ja) 2008-10-22

Family

ID=34510681

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003422108A Expired - Fee Related JP4170210B2 (ja) 2003-12-19 2003-12-19 半導体装置

Country Status (4)

Country Link
US (1) US7183612B2 (enExample)
EP (1) EP1544918A3 (enExample)
JP (1) JP4170210B2 (enExample)
CN (1) CN100505240C (enExample)

Families Citing this family (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8816443B2 (en) * 2001-10-12 2014-08-26 Quantum Semiconductor Llc Method of fabricating heterojunction photodiodes with CMOS
JP4078482B2 (ja) * 2002-02-15 2008-04-23 住友化学株式会社 プロピレンオキサイドの精製方法
KR100568515B1 (ko) * 2004-12-06 2006-04-07 삼성전자주식회사 저항 소자를 구비한 반도체소자 및 그 제조방법
US7595245B2 (en) * 2005-08-12 2009-09-29 Texas Instruments Incorporated Semiconductor device having a gate electrode material feature located adjacent a gate width side of its gate electrode and a method of manufacture therefor
JP4519097B2 (ja) 2006-03-29 2010-08-04 ルネサスエレクトロニクス株式会社 半導体装置
TWI496272B (zh) * 2006-09-29 2015-08-11 菲爾卻德半導體公司 用於功率金氧半導體場效電晶體之雙電壓多晶矽二極體靜電放電電路
US7557413B2 (en) * 2006-11-10 2009-07-07 Taiwan Semiconductor Manufacturing Co., Ltd. Serpentine ballasting resistors for multi-finger ESD protection device
JP4384195B2 (ja) 2007-03-22 2009-12-16 株式会社東芝 半導体装置の製造方法
JP2008305852A (ja) 2007-06-05 2008-12-18 Toshiba Corp 半導体装置
JP5165967B2 (ja) * 2007-08-22 2013-03-21 セイコーインスツル株式会社 半導体装置
US8108817B2 (en) * 2008-02-14 2012-01-31 International Business Machines Corporation Semiconductor structure and method of designing semiconductor structure to avoid high voltage initiated latch-up in low voltage sectors
US7919830B2 (en) 2008-04-03 2011-04-05 International Business Machines Corporation Method and structure for ballast resistor
GB2460471B (en) * 2008-05-31 2011-11-23 Filtronic Compound Semiconductors Ltd A field effect transistor and a method of manufacture thereof
JP5476611B2 (ja) * 2009-10-29 2014-04-23 パナソニック株式会社 半導体装置
US9312260B2 (en) * 2010-05-26 2016-04-12 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuits and manufacturing methods thereof
JP5593160B2 (ja) * 2010-08-13 2014-09-17 ルネサスエレクトロニクス株式会社 半導体装置
TWI548057B (zh) * 2011-04-22 2016-09-01 半導體能源研究所股份有限公司 半導體裝置
US8981484B2 (en) * 2011-06-27 2015-03-17 Marvell World Trade Ltd. Ballast resistor for super-high-voltage devices
US8648425B2 (en) * 2011-06-28 2014-02-11 Taiwan Semiconductor Manufacturing Company, Ltd. Resistors formed based on metal-oxide-semiconductor structures
JP6022804B2 (ja) * 2011-07-25 2016-11-09 ルネサスエレクトロニクス株式会社 半導体集積回路
CN102437563A (zh) * 2011-12-20 2012-05-02 上海丽恒光微电子科技有限公司 单电源电路和多电源电路
KR101944935B1 (ko) * 2012-03-16 2019-02-07 에스케이하이닉스 주식회사 반도체 장치 및 그 제조 방법
WO2013179593A1 (ja) * 2012-05-29 2013-12-05 パナソニック株式会社 半導体記憶装置および半導体記憶装置を搭載した半導体装置
US9536790B2 (en) * 2014-01-14 2017-01-03 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device with self-heat reducing layers
JP6333672B2 (ja) * 2014-08-28 2018-05-30 ルネサスエレクトロニクス株式会社 半導体装置
JP6349217B2 (ja) * 2014-09-29 2018-06-27 日立オートモティブシステムズ株式会社 電子制御装置
US10395035B2 (en) * 2016-09-27 2019-08-27 Intel Corporation Photon emission attack resistance driver circuits
FR3062236A1 (fr) * 2017-01-23 2018-07-27 Stmicroelectronics (Rousset) Sas Barre de connexion
EP3428971B1 (en) * 2017-07-12 2020-09-09 Nxp B.V. A semiconductor switch device and method
EP3553822B1 (en) * 2018-04-09 2021-02-24 NXP USA, Inc. Esd protection device, semiconductor device that includes an esd protection device, and method of manufacturing same
JP6622352B2 (ja) * 2018-04-24 2019-12-18 ルネサスエレクトロニクス株式会社 半導体装置

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6245161A (ja) * 1985-08-23 1987-02-27 Hitachi Ltd 半導体集積回路装置
JP2773221B2 (ja) 1989-04-13 1998-07-09 セイコーエプソン株式会社 半導体装置
JP2638537B2 (ja) * 1995-01-11 1997-08-06 日本電気株式会社 半導体装置
US5654860A (en) * 1995-08-16 1997-08-05 Micron Technology, Inc. Well resistor for ESD protection of CMOS circuits
US5811856A (en) * 1995-11-13 1998-09-22 Taiwan Semiconductor Manufacturing Company, Ltd. Layout of ESD input-protection circuit
US6587320B1 (en) * 2000-01-04 2003-07-01 Sarnoff Corporation Apparatus for current ballasting ESD sensitive devices
US6310380B1 (en) 2000-03-06 2001-10-30 Chartered Semiconductor Manufacturing, Inc. Electrostatic discharge protection transistor structure with a trench extending through the source or drain silicide layers
TW511268B (en) * 2000-04-21 2002-11-21 Winbond Electronics Corp Output buffer with excellent electrostatic discharge protection effect
US6583972B2 (en) * 2000-06-15 2003-06-24 Sarnoff Corporation Multi-finger current ballasting ESD protection circuit and interleaved ballasting for ESD-sensitive circuits
DE10103297A1 (de) * 2001-01-25 2002-08-22 Infineon Technologies Ag MOS-Transistor
US7005708B2 (en) * 2001-06-14 2006-02-28 Sarnoff Corporation Minimum-dimension, fully-silicided MOS driver and ESD protection design for optimized inter-finger coupling
JP3879063B2 (ja) * 2002-06-11 2007-02-07 富士通株式会社 半導体装置およびその製造方法
US20050045952A1 (en) * 2003-08-27 2005-03-03 International Business Machines Corporation Pfet-based esd protection strategy for improved external latch-up robustness

Also Published As

Publication number Publication date
JP2005183661A (ja) 2005-07-07
CN1630078A (zh) 2005-06-22
US20050133839A1 (en) 2005-06-23
EP1544918A3 (en) 2009-04-01
EP1544918A2 (en) 2005-06-22
US7183612B2 (en) 2007-02-27
CN100505240C (zh) 2009-06-24

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