JP2019054170A - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP2019054170A JP2019054170A JP2017178414A JP2017178414A JP2019054170A JP 2019054170 A JP2019054170 A JP 2019054170A JP 2017178414 A JP2017178414 A JP 2017178414A JP 2017178414 A JP2017178414 A JP 2017178414A JP 2019054170 A JP2019054170 A JP 2019054170A
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
- H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
- H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]
- H10D62/106—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
- H10D30/66—Vertical DMOS [VDMOS] FETs
- H10D30/665—Vertical DMOS [VDMOS] FETs having edge termination structures
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
- H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
- H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
- H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
- H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
- H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]
- H10D62/109—Reduced surface field [RESURF] PN junction structures
- H10D62/111—Multiple RESURF structures, e.g. double RESURF or 3D-RESURF structures
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
- H10D62/112—Constructional design considerations for preventing surface leakage or controlling electric field concentration for preventing surface leakage due to surface inversion layers, e.g. by using channel stoppers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/124—Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
- H10D62/393—Body regions of DMOS transistors or IGBTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/60—Impurity distributions or concentrations
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/111—Field plates
- H10D64/112—Field plates comprising multiple field plate segments
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D8/00—Diodes
- H10D8/01—Manufacture or treatment
- H10D8/051—Manufacture or treatment of Schottky diodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D8/00—Diodes
- H10D8/60—Schottky-barrier diodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
- H10D12/411—Insulated-gate bipolar transistors [IGBT]
- H10D12/441—Vertical IGBTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/124—Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
- H10D62/126—Top-view geometrical layouts of the regions or the junctions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
- H10D62/832—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
- H10D62/8325—Silicon carbide
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/85—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs
- H10D62/8503—Nitride Group III-V materials, e.g. AlN or GaN
Landscapes
- Electrodes Of Semiconductors (AREA)
- Chemical & Material Sciences (AREA)
- Composite Materials (AREA)
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2017178414A JP2019054170A (ja) | 2017-09-15 | 2017-09-15 | 半導体装置 |
| CN201810177805.1A CN109509790B (zh) | 2017-09-15 | 2018-03-05 | 半导体装置 |
| EP18160163.4A EP3457442B1 (en) | 2017-09-15 | 2018-03-06 | Semiconductor device |
| US15/912,697 US10347713B2 (en) | 2017-09-15 | 2018-03-06 | Semiconductor device having a triple region resurf structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2017178414A JP2019054170A (ja) | 2017-09-15 | 2017-09-15 | 半導体装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2019054170A true JP2019054170A (ja) | 2019-04-04 |
| JP2019054170A5 JP2019054170A5 (enExample) | 2019-09-19 |
Family
ID=61580953
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2017178414A Abandoned JP2019054170A (ja) | 2017-09-15 | 2017-09-15 | 半導体装置 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US10347713B2 (enExample) |
| EP (1) | EP3457442B1 (enExample) |
| JP (1) | JP2019054170A (enExample) |
| CN (1) | CN109509790B (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2024009372A (ja) * | 2019-04-12 | 2024-01-19 | 富士電機株式会社 | 超接合半導体装置 |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR102463180B1 (ko) * | 2018-05-04 | 2022-11-03 | 현대자동차 주식회사 | 반도체 소자 및 그 제조 방법 |
| JP2024046441A (ja) * | 2022-09-22 | 2024-04-03 | 株式会社東芝 | 半導体装置およびその製造方法 |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008147362A (ja) * | 2006-12-08 | 2008-06-26 | Toyota Central R&D Labs Inc | 半導体装置 |
| JP2008227238A (ja) * | 2007-03-14 | 2008-09-25 | Toyota Central R&D Labs Inc | 半導体装置 |
| JP2009038213A (ja) * | 2007-08-01 | 2009-02-19 | Toyota Motor Corp | 半導体装置 |
| JP2012151143A (ja) * | 2011-01-14 | 2012-08-09 | Toyota Motor Corp | 半導体装置 |
| JP2014204038A (ja) * | 2013-04-08 | 2014-10-27 | 三菱電機株式会社 | 半導体装置及びその製造方法 |
| EP3012870A1 (en) * | 2014-10-20 | 2016-04-27 | ABB Technology AG | Edge termination for high voltage semiconductor devices |
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| JP6523886B2 (ja) * | 2015-09-11 | 2019-06-05 | 株式会社東芝 | 半導体装置 |
| JP2017055010A (ja) * | 2015-09-11 | 2017-03-16 | 株式会社東芝 | 半導体装置 |
| JP2017063079A (ja) * | 2015-09-24 | 2017-03-30 | 住友電気工業株式会社 | 炭化珪素半導体装置およびその製造方法 |
| JP6672764B2 (ja) * | 2015-12-16 | 2020-03-25 | 富士電機株式会社 | 半導体装置および半導体装置の製造方法 |
| JP6524002B2 (ja) * | 2016-03-16 | 2019-06-05 | 株式会社東芝 | 半導体装置 |
| JP6659516B2 (ja) * | 2016-10-20 | 2020-03-04 | トヨタ自動車株式会社 | 半導体装置 |
-
2017
- 2017-09-15 JP JP2017178414A patent/JP2019054170A/ja not_active Abandoned
-
2018
- 2018-03-05 CN CN201810177805.1A patent/CN109509790B/zh active Active
- 2018-03-06 US US15/912,697 patent/US10347713B2/en active Active
- 2018-03-06 EP EP18160163.4A patent/EP3457442B1/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008147362A (ja) * | 2006-12-08 | 2008-06-26 | Toyota Central R&D Labs Inc | 半導体装置 |
| JP2008227238A (ja) * | 2007-03-14 | 2008-09-25 | Toyota Central R&D Labs Inc | 半導体装置 |
| JP2009038213A (ja) * | 2007-08-01 | 2009-02-19 | Toyota Motor Corp | 半導体装置 |
| JP2012151143A (ja) * | 2011-01-14 | 2012-08-09 | Toyota Motor Corp | 半導体装置 |
| JP2014204038A (ja) * | 2013-04-08 | 2014-10-27 | 三菱電機株式会社 | 半導体装置及びその製造方法 |
| EP3012870A1 (en) * | 2014-10-20 | 2016-04-27 | ABB Technology AG | Edge termination for high voltage semiconductor devices |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| JP2024009372A (ja) * | 2019-04-12 | 2024-01-19 | 富士電機株式会社 | 超接合半導体装置 |
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| US20190088737A1 (en) | 2019-03-21 |
| CN109509790B (zh) | 2022-06-07 |
| EP3457442B1 (en) | 2020-10-07 |
| US10347713B2 (en) | 2019-07-09 |
| EP3457442A1 (en) | 2019-03-20 |
| CN109509790A (zh) | 2019-03-22 |
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