JP2016523725A - 部品上にパターン化されたコーティングを形成する方法 - Google Patents
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- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
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- B—PERFORMING OPERATIONS; TRANSPORTING
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- B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
- B81B7/0032—Packages or encapsulation
- B81B7/0058—Packages or encapsulation for protecting against damages due to external chemical or mechanical influences, e.g. shocks or vibrations
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B2201/00—Specific applications of microelectromechanical systems
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B2203/00—Basic microelectromechanical structures
- B81B2203/01—Suspended structures, i.e. structures allowing a movement
- B81B2203/0127—Diaphragms, i.e. structures separating two media that can control the passage from one medium to another; Membranes, i.e. diaphragms with filtering function
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B2207/00—Microstructural systems or auxiliary parts thereof
- B81B2207/01—Microstructural systems or auxiliary parts thereof comprising a micromechanical device connected to control or processing electronics, i.e. Smart-MEMS
- B81B2207/012—Microstructural systems or auxiliary parts thereof comprising a micromechanical device connected to control or processing electronics, i.e. Smart-MEMS the micromechanical device and the control or processing electronics being separate parts in the same package
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B2207/00—Microstructural systems or auxiliary parts thereof
- B81B2207/11—Structural features, others than packages, for protecting a device against environmental influences
- B81B2207/115—Protective layers applied directly to the device before packaging
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C2203/00—Forming microstructural systems
- B81C2203/07—Integrating an electronic processing unit with a micromechanical structure
- B81C2203/0785—Transfer and j oin technology, i.e. forming the electronic processing unit and the micromechanical structure on separate substrates and joining the substrates
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73257—Bump and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16151—Cap comprising an aperture, e.g. for pressure control, encapsulation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
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Abstract
Description
BE 部品
CA コーティング領域
UCA 非コーティング領域
RT リリースフィルム
LF コーティング(ラミネートフィルム等)
TL 第1及び第2の分割線(CAを包囲)
TR 基板
MK、CK MEMS又はチップコンポーネント
MW MEMSウェーハ
MM (MK内の)マイクロホン膜
AN 凹部(マイクロホン膜上)
KA 基板上のデバイスの上方を覆うキャップ
CR カバー
SO サウンドホール(カバー又は基板内)
ZR (2つのコンポーネントの間の)ギャップ
MA マスク
ML 金属層/メタライジング部
DM 密封材
FV 前側空間
RV 後側空間
DR 硬化すると弾性材料となる粘稠な塊状物
SK サウンドチャネル(SO、DM及びLF中の開口、コンポーネント間及びMKとTRとの間のギャップによって形成されている)
Claims (17)
- コーティング領域(CA)と非コーティング領域(UCA)とを有する表面を有する部品の表面にパターン状のコーティングを形成する方法であって、
a.前記部品の表面にリリースフィルム(RT)を形成し、非コーティング領域内の少なくとも一部に固定することと、
b.前記コーティング領域(CA)内の前記リリースフィルムを除去することと、
c.前記リリースフィルム(RTS)及び前記部品の表面の全表面上にコーティング(LF)を形成することと、
d.前記コーティング領域(CA)を取り囲む第2の分割線(TL2)に沿って前記コーティングを分割することと、
e.少なくとも第2の分割線(TL2)で囲まれた領域内の前記リリースフィルム(RT)の接着力を低減することと、
f.前記非コーティング領域内の前記リリースフィルムを、その上に形成された前記コーティングと共に剥離することと、
を含む方法。 - UVリリーステープ又は熱リリーステープが前記リリースフィルムとして用いられ、前記工程e)において、UV光、レーザー又は熱の作用により接着力が低減される請求項1に記載の方法。
- −前記部品(BE)が、基板(TR)上に配置された1又は複数のMEMSコンポーネント又はチップコンポーネント(MK、CK)を有するデバイス(デバイス)の一部であり、該部品がこれらのコンポーネントを構成しており、
−工程d)において、コーティング(LF)として、フィルムを前記装置の表面全体にわたって、前記MEMSコンポーネント又はチップコンポーネントのいずれか一方、或いは装置としてコンポーネント全体を基板上で密封するように貼付し、
−工程g)により、非コーティング領域(UCA)に、MEMSコンポーネントへのメディアアクセスを形成する、
請求項1又は2に記載の方法。 - −工程a)において、MEMSウェーハの複数のMEMSコンポーネント(MK)に対し同時にリリースフィルム(RT)を貼付し、
−次いで工程b)を実行し、MEMSコンポーネントを分離し、
−少なくとも1つのMEMSコンポーネント(MK)及び少なくとも1つのチップコンポーネント(CK)を有する装置を取り付け、
−その後、工程c)からf)を実行する、
請求項3に記載の方法。 - −工程b)において、非コーティング領域(UCA)を取り囲む第1の分割線(TL1)に沿って切り込みを形成し、
−工程b)において、コーティング領域(CA)のうち、第1の分割線(TL1)で囲まれた領域の外側のリリースフィルムを除去し、
−次いでコーティング(LF)を塗布し、
−工程e)において、まず、熱又はUV照射への曝露により、非コーティング領域全体上のリリースフィルムの接着力を低減し、その後、工程d)においてコーティング内の第2の分割線(TL2)に沿って第2の切り込みを形成し、或いは工程e)の前に工程d)を実行し、
−次いで、工程f)を実行する、
請求項1から4のいずれか1項に記載の方法。 - −前記部品(BE)がMEMSマイクロホンであり、単独で、或いはデバイスに組み込まれた形で基板(TR)上に実装されており、
−工程f)において、マイクロホンのマイクロホン膜上に、非コーティング領域(UCA)として凹部(AN)を露出させ、
−MEMSマイクロホン又はデバイスを覆うように、被覆(CR、KA)を基板上に固定し、被覆の下でMEMSマイクロホン又はデバイスを収容する空洞を包囲及び密封し、
−平坦な基板(TR)を用い、その上に被覆としてキャップ(KA)を形成し、或いはバスタブ状の基板を用い、それを覆うように平坦な被覆(CR)を形成し、
−被覆(KA、CR)又は基板(TR)内にサウンドホール(SO)を設ける、
請求項1から5のいずれか1項に記載の方法。 - コーティング(LF)により、マイクロホン膜の上側の空間を、膜の下側の空間に対し密封し、それにより、膜の上側の空間がコーティングの上方及びカバーの下側に残存する空洞を含み、
コーティングの下側且つマイクロホン膜の下側の空間が、コーティングを貫通し、基板に対し密封された、少なくとも1つのMEMS-及び/又はチップコンポーネントの間のギャップを含む、
請求項5又は6に記載の方法。 - 工程c)において、コーティング(LF)として、深絞り加工可能な フィルムがデバイス上に形成される、請求項6又は7に記載の方法。
- −工程b)及びf)において、2つのコンポーネント(CK、MK)間のギャップ上の架橋領域にもリリースフィルム(RT)を残すか、除去せずにおき、
−工程c)の実施中及び後に、架橋領域に残存したリリースフィルムが、ギャップ上のコーティング(LF)を補強する、
請求項3から8のいずれか1項に記載の方法。 - −リリースフィルム(RT)として熱リリーステープが用いられ、その貼付が、基板(TR)上でのコンポーネントの組み立て後に行われ、
−工程e)において、全体に残ったリリースフィルムの接着力が、熱の作用により低減され、
−非コーティング領域(UCA)内のリリースフィルム及びその上に形成されたコーティング(LF)の剥離が、エアブロー、求引又は粘着フィルムを用いた剥離により行われる、
請求項3から9のいずれか1項に記載の方法。 - 工程c)において、コーティング(LF)として、深絞り加工可能で熱処理可能なフィルムがデバイス上に形成される、請求項3から10のいずれか1項に記載の方法。
- −デバイスに隣接し、それを完全に包囲する外周までの基板上のコーティングを除去し、それにより、コーティングの外周全体での基板との密封を完了し、
−キャップを、基板のコーティングが除去された領域の上に重ね合わせ、基板と接合する、
請求項6から11のいずれか1項に記載の方法。 - −MEMSコンポーネントとしてMEMSマイクロホンが、デバイス内に組み込まれ、フリップチップ実装を用いて基板上にマウントされ、
−カバーとして、キャップが、サウンドホール(SO)内に設けられ、基板上でデバイスを覆うようにマウントされ、
−2つのコンポーネント間のギャップの上方にサウンドホールが設けられ、
−デバイスの上方のキャップとコーティングの間が密封され、内側からキャップ周囲のサウンドホールが密封され、
−サウンドホール下方の密封材に開口が設けられ、
−サウンドホール(SO)を貫通して連続したサウンドチャネル(Schallkanal)(SK)、密封材(DM)及びコーティング(LF)が、ギャップを通り、MEMSコンポーネント(MK)の下側に開口するように、コーティングを貫通してギャップに向かって開口を延在させた、
請求項6から12のいずれか1項に記載の方法。 - キャップ(KA)を設置後に、サウンドホール(SO)を通して、粘性組成物として、密封材(DM)を塗布し、完全に硬化させる、請求項13に記載の方法。
- ギャップを覆うようにコーティング(LF)の上にキャップを載置する前に、密封材(DM)を配置する、請求項13に記載の方法。
- 密封材(DM)として、弾性材料からなる密封リングが、ギャップを覆うコーティングの上に配置された、請求項15に記載の方法。
- -粘性を示し、硬化状態で弾性を示す組成物(LD)として、密封材(DM)が、コーティング(LF)とキャップ(KA)の間のサウンドホール(SO)の領域内に、サウンドホールを閉塞し、コーティングとの境界を密封するように形成され、
-次いで、レーザードリリング法を用いて、密封材(DM)及びコーティング(LF)に開口(OE)を形成する、
請求項13又は14に記載の方法。
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JP6187684B2 (ja) | 2017-08-30 |
US20160297676A1 (en) | 2016-10-13 |
US9556022B2 (en) | 2017-01-31 |
DE102013106353B4 (de) | 2018-06-28 |
WO2014202283A3 (de) | 2015-02-26 |
DE102013106353A1 (de) | 2014-12-18 |
WO2014202283A2 (de) | 2014-12-24 |
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