JP2016518700A - 誘電体基板上への複製回路および変成器の統合 - Google Patents
誘電体基板上への複製回路および変成器の統合 Download PDFInfo
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- JP2016518700A JP2016518700A JP2016500878A JP2016500878A JP2016518700A JP 2016518700 A JP2016518700 A JP 2016518700A JP 2016500878 A JP2016500878 A JP 2016500878A JP 2016500878 A JP2016500878 A JP 2016500878A JP 2016518700 A JP2016518700 A JP 2016518700A
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Abstract
Description
本出願は、参照によりその内容のすべてが明確に本明細書に組み込まれている、2013年3月14日に出願した、同一出願人による米国特許出願第13/829784号の優先権を主張するものである。
101、201、301、2013 複製回路
102、202 302、2012 変成器
103、203、303 誘電体基板
104、703 ドレイン領域
105、702 ソース領域
106、401 ゲート領域
107、602 チャネル領域
108 ゲート絶縁層
109、905 第1のインダクタ
110、1102 第2のインダクタ
111、801、1001、1002、1201 誘電体層
112 アンテナ
113 可変キャパシタ
114 可変抵抗
115 薄膜トランジスタ(TFT)
400、500、600、700、800、900、1000、1100、1200、1300、1400、1500、1600 半導体デバイスを製造するプロセスにおける少なくとも1つのステージの間に形成される構造
402 金属コネクタ
403 基板
404、901、1101、1301 導電層
405 TFT115などのTFTが形成される領域
406 可変抵抗として機能するように構成されるTFTが形成される領域
407 可変キャパシタとして機能するように構成されるTFTが形成される領域
408 横方向結合ハイブリッド変成器が形成される領域
409 垂直結合ハイブリッドが形成される領域
501 絶縁層
601 チャネル領域602を形成するための層
701 ソース領域702およびドレイン領域703を形成するための層
802 ビア(または凹所)
902 ゲート電極
903 ソース電極
904 ドレイン電極
1202、1502 凹所
1302 コネクタ
1401 パッシベーション層
1501 犠牲層
1601 エアギャップ
1700 並列構成の複数のインダクタを有する垂直結合ハイブリッド変成器(VHT)
1701、1702、1801、1802 インダクタ
1800 交互配置構成の複数のインダクタを有する垂直結合ハイブリッド変成器(VHT)
1900 ガラスタイプの材料の表面の上に複製回路および変成器を形成する方法
2000 複製回路2013および変成器2012を含んだモバイルデバイス
2001、2108、2116、2148 プロセッサ
2002、2110、2118、2150 メモリ
2003 ディスプレイコントローラ
2004 ディスプレイ
2005 符号/復号器(CODEC)
2006 スピーカ
2007 マイクロホン
2008 ワイヤレスコントローラ
2009 アンテナ
2010 入力デバイス
2011 電源
2014 システムオンチップデバイス
2100 電子デバイス製造プロセス
2102 物理デバイス情報
2104、2124、2144 ユーザインターフェース
2106 リサーチコンピュータ
2112 ライブラリファイル
2114 デザインコンピュータ
2120 電子設計オートメーション(EDA)ツール
2122 回路設計情報
2126 GDSIIファイル
2128 製造プロセス
2130 マスク製造者
2132 代表マスク
2134 ウェーハ
2136 代表ダイ
2138 パッケージングプロセス
2140 代表パッケージ
2142 PCB設計情報
2146 コンピュータ
2152 GERBERファイル
2154 基板アセンブリプロセス
2156 代表PCB
2158 代表プリント回路アセンブリ(PCA)
2160 製品製造者
2162 第1の代表電子デバイス
2164 第2の代表電子デバイス
Claims (48)
- 誘電体基板の上に配置された複製回路であって、可変キャパシタまたは可変抵抗として機能するように構成される薄膜トランジスタを備える複製回路と、
前記誘電体基板の上に配置され、かつ、前記複製回路に結合された変成器であって、前記複製回路とアンテナとの間のインピーダンス整合を容易にするように構成される変成器と
を備えるデバイス。 - 前記薄膜トランジスタが、ドレイン領域、ソース領域、ゲート領域、チャネル領域およびゲート絶縁層を備える、請求項1に記載のデバイス。
- 前記薄膜トランジスタが、アモルファスシリコン、ポリシリコン、連続結晶粒シリコン、インジウム‐ガリウム‐亜鉛酸化物(IGZO)、二硫化モリブデン(MoS2)、グラフェンまたはそれらの組合せから形成される、請求項1に記載のデバイス。
- 前記変成器が横方向結合ハイブリッド変成器を備える、請求項1に記載のデバイス。
- 前記横方向結合ハイブリッド変成器が、
前記誘電体基板の表面の上に配置された第1のインダクタ構造と、
前記誘電体基板の前記表面の上に配置された第2のインダクタ構造と
を備え、前記第1のインダクタ構造および前記第2のインダクタ構造が互いに並行して配置される、請求項4に記載のデバイス。 - 前記変成器が垂直結合ハイブリッド変成器を備える、請求項1に記載のデバイス。
- 前記垂直結合ハイブリッド変成器が、
前記誘電体基板の表面の上に配置された第1のインダクタ構造と、
前記誘電体基板の前記表面の上に配置され、かつ、前記第1のインダクタ構造の上に配置された第2のインダクタ構造と、
前記第1のインダクタ構造と前記第2のインダクタ構造との間に配置される誘電体層と
を備える、請求項6に記載のデバイス。 - 前記垂直結合ハイブリッド変成器が、
前記誘電体基板の表面の上に配置された第1のインダクタ構造と、
前記誘電体基板の前記表面の上に配置され、かつ、前記第1のインダクタ構造の上に配置された第2のインダクタ構造と
を備え、前記第1のインダクタ構造と前記第2のインダクタ構造との間にエアギャップが配置される、請求項6に記載のデバイス。 - 前記変成器および前記複製回路が互いに並行して配置される、請求項1に記載のデバイス。
- 前記変成器が前記複製回路の上に配置される、請求項1に記載のデバイス。
- 前記複製回路が前記変成器の上に配置される、請求項1に記載のデバイス。
- 前記誘電体基板がガラスタイプの材料から形成される、請求項1に記載のデバイス。
- 前記誘電体基板が、アルカリ土類ボロ‐アルミノケイ酸塩ガラス、ヒ化ガリウム(GaAs)、リン化インジウム(InP)、炭化ケイ素(SiC)、ロジャースラミネートまたはそれらの組合せから形成される、請求項12に記載のデバイス。
- 前記誘電体基板が、サファイア(Al2O3)、水晶、セラミックまたはそれらの組合せから形成される、請求項1に記載のデバイス。
- 少なくとも1つの半導体ダイに統合された、請求項1に記載のデバイス。
- 前記複製回路および前記変成器が統合される、セットトップボックス、音楽プレーヤ、ビデオプレーヤ、娯楽ユニット、ナビゲーションデバイス、通信デバイス、携帯情報端末(PDA)、固定位置データユニットおよびコンピュータのグループから選択される別のデバイスをさらに備える、請求項1に記載のデバイス。
- ガラスタイプの材料の表面の上に複製回路を形成するステップであって、前記複製回路が、可変キャパシタまたは可変抵抗として機能するように構成される薄膜トランジスタを備える、ステップと、
前記ガラスタイプの材料の前記表面の上に変成器を形成するステップであって、前記変成器が前記複製回路に結合され、また、前記変成器が、前記複製回路とアンテナとの間のインピーダンス整合を容易にするように構成される、ステップと
を含む方法。 - 前記変成器を形成するステップが、横方向結合ハイブリッド変成器を形成するステップを含む、請求項17に記載の方法。
- 前記変成器を形成するステップが、垂直結合ハイブリッド変成器を形成するステップを含む、請求項17に記載の方法。
- 前記変成器および前記複製回路が互いに並行して配置される、請求項17に記載の方法。
- 前記変成器が前記複製回路の上に配置される、請求項17に記載の方法。
- 前記複製回路が前記変成器の上に配置される、請求項17に記載の方法。
- 前記変成器を形成するステップおよび前記複製回路を形成するステップが、電子デバイスに統合されたプロセッサによって開始される、請求項17に記載の方法。
- 誘電体基板の上に配置された、インピーダンス整合のための手段であって、可変キャパシタまたは可変抵抗として機能するように構成される薄膜トランジスタを備える、インピーダンス整合のための手段と、
前記誘電体基板の上に配置され、かつ、前記インピーダンス整合のための手段に結合された、エネルギーを伝達するための手段であって、前記インピーダンス整合のための手段とアンテナとの間のインピーダンス整合を容易にするように構成される、エネルギーを伝達するための手段と
を備えるデバイス。 - 前記薄膜トランジスタが、ドレイン領域、ソース領域、ゲート領域、チャネル領域およびゲート絶縁層を備える、請求項24に記載のデバイス。
- 前記エネルギーを伝達するための手段が横方向結合ハイブリッド変成器を備える、請求項24に記載のデバイス。
- 前記横方向結合ハイブリッド変成器が、
前記誘電体基板の表面の上に配置された第1のインダクタ構造と、
前記誘電体基板の前記表面の上に配置された第2のインダクタ構造と
を備え、前記第1のインダクタ構造および前記第2のインダクタ構造が互いに並行して配置される、請求項26に記載のデバイス。 - 前記エネルギーを伝達するための手段が垂直結合ハイブリッド変成器を備える、請求項24に記載のデバイス。
- 前記垂直結合ハイブリッド変成器が、
前記誘電体基板の表面の上に配置された第1のインダクタ構造と、
前記誘電体基板の前記表面の上に配置され、かつ、前記第1のインダクタ構造の上に配置された第2のインダクタ構造と、
前記第1のインダクタ構造と前記第2のインダクタ構造との間に配置される誘電体層と
を備える、請求項28に記載のデバイス。 - 前記垂直結合ハイブリッド変成器が、
前記誘電体基板の表面の上に配置された第1のインダクタ構造と、
前記誘電体基板の前記表面の上に配置され、かつ、前記第1のインダクタ構造の上に配置された第2のインダクタ構造と
を備え、前記第1のインダクタ構造と前記第2のインダクタ構造との間にエアギャップが配置される、請求項28に記載のデバイス。 - 前記エネルギーを伝達するための手段および前記インピーダンス整合のための手段が互いに並行して配置される、請求項24に記載のデバイス。
- 前記エネルギーを伝達するための手段が前記インピーダンス整合のための手段の上に配置される、請求項24に記載のデバイス。
- 前記インピーダンス整合のための手段が前記エネルギーを伝達するための手段の上に配置される、請求項24に記載のデバイス。
- 少なくとも1つの半導体ダイに統合された、請求項24に記載のデバイス。
- 前記エネルギーを伝達するための手段および前記インピーダンス整合のための手段が統合される、セットトップボックス、音楽プレーヤ、ビデオプレーヤ、娯楽ユニット、ナビゲーションデバイス、通信デバイス、携帯情報端末(PDA)、固定位置データユニットおよびコンピュータのグループから選択される別のデバイスをさらに備える、請求項24に記載のデバイス。
- ガラスタイプの材料の表面の上に複製回路を形成するための第1のステップであって、前記複製回路が、可変キャパシタまたは可変抵抗として機能するように構成される薄膜トランジスタを備える、ステップと、
前記ガラスタイプの材料の前記表面の上に変成器を形成するための第2のステップであって、前記変成器が前記複製回路に結合され、前記変成器が、前記複製回路とアンテナとの間のインピーダンス整合を容易にするように構成される、ステップと
を含む方法。 - 前記変成器の形成が横方向結合ハイブリッド変成器の形成を含む、請求項36に記載の方法。
- 前記変成器の形成が垂直結合ハイブリッド変成器の形成を含む、請求項36に記載の方法。
- 前記変成器および前記複製回路が互いに並行して配置される、請求項36に記載の方法。
- 前記変成器が前記複製回路の上に配置される、請求項36に記載の方法。
- 前記複製回路が前記変成器の上に配置される、請求項36に記載の方法。
- 前記変成器の形成および前記複製回路の形成が、電子デバイスに統合されたプロセッサによって開始される、請求項36に記載の方法。
- 前記第1のステップおよび前記第2のステップが、電子デバイスに統合されたプロセッサによって開始される、請求項36に記載の方法。
- プロセッサによって実行されると、
ガラスタイプの材料の表面上への、可変キャパシタまたは可変抵抗として機能するように構成される薄膜トランジスタを備える複製回路の形成を前記プロセッサが開始し、かつ、
前記ガラスタイプの材料の前記表面上への、前記複製回路に結合され、前記複製回路とアンテナとの間のインピーダンス整合を容易にするように構成される変成器の形成を前記プロセッサが開始する
ことになる命令を記憶する非一時的コンピュータ可読媒体。 - 前記非一時的コンピュータ可読媒体が統合される、固定位置データユニットおよびコンピュータのグループから選択されるデバイスをさらに備える、請求項44に記載の非一時的コンピュータ可読媒体。
- 半導体デバイスに対応する設計情報を含んだデータファイルを受け取るステップと、
前記設計情報に従って前記半導体デバイスを製造するステップと
を含む方法であって、前記半導体デバイスが、
誘電体基板の上に配置された複製回路であって、可変キャパシタまたは可変抵抗として機能するように構成される薄膜トランジスタを備える複製回路と、
前記誘電体基板の上に配置され、かつ、前記複製回路に結合された変成器であって、前記複製回路とアンテナとの間のインピーダンス整合を容易にするように構成される変成器と
を含む方法。 - 前記データファイルがGERBER形式を有する、請求項46に記載の方法。
- 前記データファイルがGDSII形式を有する、請求項46に記載の方法。
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WO2023090293A1 (ja) * | 2021-11-17 | 2023-05-25 | 株式会社村田製作所 | 電子素子、および回路装置 |
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JP6203934B2 (ja) | 2017-09-27 |
CN105051897A (zh) | 2015-11-11 |
EP2973695A1 (en) | 2016-01-20 |
US20140266494A1 (en) | 2014-09-18 |
KR20150131205A (ko) | 2015-11-24 |
WO2014150025A1 (en) | 2014-09-25 |
US20170134007A1 (en) | 2017-05-11 |
KR101813972B1 (ko) | 2018-01-02 |
US10116285B2 (en) | 2018-10-30 |
CN105051897B (zh) | 2018-10-02 |
US9634645B2 (en) | 2017-04-25 |
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