JP2013140999A - バルク基板上に作製される分離トライゲートトランジスタ - Google Patents
バルク基板上に作製される分離トライゲートトランジスタ Download PDFInfo
- Publication number
- JP2013140999A JP2013140999A JP2013025282A JP2013025282A JP2013140999A JP 2013140999 A JP2013140999 A JP 2013140999A JP 2013025282 A JP2013025282 A JP 2013025282A JP 2013025282 A JP2013025282 A JP 2013025282A JP 2013140999 A JP2013140999 A JP 2013140999A
- Authority
- JP
- Japan
- Prior art keywords
- fin structure
- bulk substrate
- semiconductor body
- tri
- silicon
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 47
- 238000000034 method Methods 0.000 claims abstract description 75
- 239000004065 semiconductor Substances 0.000 claims abstract description 47
- 230000003647 oxidation Effects 0.000 claims abstract description 23
- 238000007254 oxidation reaction Methods 0.000 claims abstract description 23
- 239000000463 material Substances 0.000 claims description 30
- 229910052710 silicon Inorganic materials 0.000 claims description 26
- 239000010703 silicon Substances 0.000 claims description 26
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 14
- 235000012239 silicon dioxide Nutrition 0.000 claims description 5
- 239000000377 silicon dioxide Substances 0.000 claims description 5
- 239000013078 crystal Substances 0.000 claims description 3
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 claims description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims description 2
- 229910000673 Indium arsenide Inorganic materials 0.000 claims description 2
- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 claims description 2
- VTGARNNDLOTBET-UHFFFAOYSA-N gallium antimonide Chemical compound [Sb]#[Ga] VTGARNNDLOTBET-UHFFFAOYSA-N 0.000 claims description 2
- 229910052732 germanium Inorganic materials 0.000 claims description 2
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 2
- WPYVAWXEWQSOGY-UHFFFAOYSA-N indium antimonide Chemical compound [Sb]#[In] WPYVAWXEWQSOGY-UHFFFAOYSA-N 0.000 claims description 2
- RPQDHPTXJYYUPQ-UHFFFAOYSA-N indium arsenide Chemical compound [In]#[As] RPQDHPTXJYYUPQ-UHFFFAOYSA-N 0.000 claims description 2
- 150000004767 nitrides Chemical class 0.000 abstract description 32
- 230000000694 effects Effects 0.000 abstract description 7
- 238000000137 annealing Methods 0.000 abstract description 4
- 238000000151 deposition Methods 0.000 abstract description 4
- 239000011810 insulating material Substances 0.000 abstract description 4
- 238000000059 patterning Methods 0.000 abstract description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 21
- 238000004519 manufacturing process Methods 0.000 description 9
- 229910052751 metal Inorganic materials 0.000 description 9
- 239000002184 metal Substances 0.000 description 9
- 238000001039 wet etching Methods 0.000 description 9
- 238000001312 dry etching Methods 0.000 description 7
- 239000012212 insulator Substances 0.000 description 6
- 238000002955 isolation Methods 0.000 description 6
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 4
- 229910052581 Si3N4 Inorganic materials 0.000 description 4
- 238000005229 chemical vapour deposition Methods 0.000 description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 4
- 229910052814 silicon oxide Inorganic materials 0.000 description 4
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 3
- 238000000231 atomic layer deposition Methods 0.000 description 3
- 238000005137 deposition process Methods 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- 238000005240 physical vapour deposition Methods 0.000 description 3
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 2
- 229910020177 SiOF Inorganic materials 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66787—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel
- H01L29/66795—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/785—Field effect transistors with field effect produced by an insulated gate having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Thin Film Transistor (AREA)
- Element Separation (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
【解決手段】バルク基板をパターニングしてフィン構造を作製する工程、前記フィン構造の周囲に絶縁材料を堆積する工程、前記絶縁材料をリセス処理して、前記分離トライゲート半導体本体に用いられる前記フィン構造の一部を曝露する工程、前記フィン構造の曝露された部分の全体にわたって窒化物キャップを堆積して、前記フィン構造の曝露された部分を保護する工程、及び、熱酸化処理を実行して前記窒化物キャップの下に位置する前記フィン構造の保護されていない部分を酸化する工程を有する。前記フィンの酸化した部分は、前記窒化物キャップによって保護される前記半導体本体を分離させる。前記窒化物キャップは除去されて良い。前記熱酸化処理は、前記基板を約900℃乃至約1100℃の温度で約0.5時間乃至約3時間アニーリングする工程を有して良い。
【選択図】図2
Description
Claims (6)
- バルク基板;
前記バルク基板と直接接触して、かつ、前記バルク基板から延びるフィン構造;
前記フィン構造と前記バルク基板にわたって形成され、前記フィン構造と前記バルク基板の両方に接触し、かつ、前記フィン構造と前記バルク基板にわたって平坦な上面を有する酸化物層;
前記フィン構造に隣接して位置合わせされている前記酸化物層上に形成される半導体本体;
を有し、
前記半導体本体と前記フィン構造のいずれも、前記バルク基板と同一の材料から形成され、かつ、前記酸化物層は、前記半導体本体を前記フィン構造から分離する、
素子。 - 前記材料がシリコンを有する、請求項1に記載の素子。
- 前記材料が、ゲルマニウム、アンチモン化インジウム、砒化インジウム、燐化インジウム、砒化ガリウム、及びアンチモン化ガリウムからなる群から選ばれる第2材料と混晶を形成するシリコンを有する、請求項1に記載の素子。
- 前記酸化物層が二酸化シリコンを有する、請求項1に記載の素子。
- バルク基板;
前記バルク基板と直接接触して、かつ、前記バルク基板から延びるフィン構造;
前記フィン構造の上部に形成される酸化物層;
前記フィン構造の上部に形成される半導体本体;
を有し、
前記酸化物層は、前記フィン構造の一部のみを消費する熱酸化プロセスによって形成される、
素子。 - 前記フィン構造はシリコンを有し、
前記バルク基板はシリコンを有し、
前記半導体本体はシリコンを有し、かつ、
前記酸化物層は二酸化シリコンを有する、
請求項5に記載の素子。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/779,284 | 2007-07-18 | ||
US11/779,284 US20090020792A1 (en) | 2007-07-18 | 2007-07-18 | Isolated tri-gate transistor fabricated on bulk substrate |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2010517060A Division JP2010533978A (ja) | 2007-07-18 | 2008-06-30 | バルク基板上に作製される分離トライゲートトランジスタ |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2013140999A true JP2013140999A (ja) | 2013-07-18 |
JP5746238B2 JP5746238B2 (ja) | 2015-07-08 |
Family
ID=40260297
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2010517060A Pending JP2010533978A (ja) | 2007-07-18 | 2008-06-30 | バルク基板上に作製される分離トライゲートトランジスタ |
JP2013025282A Active JP5746238B2 (ja) | 2007-07-18 | 2013-02-13 | バルク基板上に作製される分離トライゲートトランジスタ |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2010517060A Pending JP2010533978A (ja) | 2007-07-18 | 2008-06-30 | バルク基板上に作製される分離トライゲートトランジスタ |
Country Status (9)
Country | Link |
---|---|
US (2) | US20090020792A1 (ja) |
JP (2) | JP2010533978A (ja) |
KR (2) | KR101208781B1 (ja) |
CN (3) | CN101755327A (ja) |
BR (1) | BRPI0814114A2 (ja) |
DE (1) | DE112008001835T5 (ja) |
GB (1) | GB2464061A (ja) |
TW (2) | TWI438848B (ja) |
WO (1) | WO2009012053A2 (ja) |
Families Citing this family (31)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20090020792A1 (en) | 2007-07-18 | 2009-01-22 | Rafael Rios | Isolated tri-gate transistor fabricated on bulk substrate |
US8106459B2 (en) | 2008-05-06 | 2012-01-31 | Taiwan Semiconductor Manufacturing Company, Ltd. | FinFETs having dielectric punch-through stoppers |
US8263462B2 (en) * | 2008-12-31 | 2012-09-11 | Taiwan Semiconductor Manufacturing Company, Ltd. | Dielectric punch-through stoppers for forming FinFETs having dual fin heights |
US8293616B2 (en) | 2009-02-24 | 2012-10-23 | Taiwan Semiconductor Manufacturing Company, Ltd. | Methods of fabrication of semiconductor devices with low capacitance |
US9076873B2 (en) | 2011-01-07 | 2015-07-07 | International Business Machines Corporation | Graphene devices with local dual gates |
US20130020640A1 (en) * | 2011-07-18 | 2013-01-24 | Chen John Y | Semiconductor device structure insulated from a bulk silicon substrate and method of forming the same |
US8609480B2 (en) | 2011-12-21 | 2013-12-17 | Globalfoundries Inc. | Methods of forming isolation structures on FinFET semiconductor devices |
US8987835B2 (en) | 2012-03-27 | 2015-03-24 | Taiwan Semiconductor Manufacturing Company, Ltd. | FinFET with a buried semiconductor material between two fins |
US9425212B2 (en) | 2012-06-29 | 2016-08-23 | Intel Corporation | Isolated and bulk semiconductor devices formed on a same bulk substrate |
US9269791B2 (en) * | 2012-07-10 | 2016-02-23 | United Microelectronics Corp. | Multi-gate MOSFET with embedded isolation structures |
US9035430B2 (en) | 2012-08-29 | 2015-05-19 | International Business Machines Corporation | Semiconductor fin on local oxide |
US9041106B2 (en) * | 2012-09-27 | 2015-05-26 | Intel Corporation | Three-dimensional germanium-based semiconductor devices formed on globally or locally isolated substrates |
US9287178B2 (en) | 2012-10-01 | 2016-03-15 | Globalfoundries Inc. | Multi-gate field effect transistor (FET) including isolated fin body |
US8759874B1 (en) | 2012-11-30 | 2014-06-24 | Stmicroelectronics, Inc. | FinFET device with isolated channel |
US8956942B2 (en) | 2012-12-21 | 2015-02-17 | Stmicroelectronics, Inc. | Method of forming a fully substrate-isolated FinFET transistor |
US9166053B2 (en) | 2013-02-22 | 2015-10-20 | Taiwan Semiconductor Manufacturing Company, Ltd. | FinFET device including a stepped profile structure |
US10438856B2 (en) | 2013-04-03 | 2019-10-08 | Stmicroelectronics, Inc. | Methods and devices for enhancing mobility of charge carriers |
US9257327B2 (en) | 2013-04-09 | 2016-02-09 | Samsung Electronics Co., Ltd. | Methods of forming a Field Effect Transistor, including forming a region providing enhanced oxidation |
CN104124168B (zh) * | 2013-04-28 | 2017-11-28 | 中芯国际集成电路制造(上海)有限公司 | 半导体结构的形成方法 |
US9947772B2 (en) | 2014-03-31 | 2018-04-17 | Stmicroelectronics, Inc. | SOI FinFET transistor with strained channel |
US9209185B2 (en) * | 2014-04-16 | 2015-12-08 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method and structure for FinFET device |
US9502518B2 (en) | 2014-06-23 | 2016-11-22 | Stmicroelectronics, Inc. | Multi-channel gate-all-around FET |
US9224736B1 (en) * | 2014-06-27 | 2015-12-29 | Taiwan Semicondcutor Manufacturing Company, Ltd. | Structure and method for SRAM FinFET device |
KR20170041191A (ko) * | 2014-08-05 | 2017-04-14 | 인텔 코포레이션 | 촉매 산화물 형성에 의해 마이크로 전자 디바이스 격리를 생성하는 장치 및 방법 |
CN104299914B (zh) * | 2014-08-08 | 2018-06-01 | 武汉新芯集成电路制造有限公司 | FinFET的制造方法 |
KR102150254B1 (ko) | 2014-09-15 | 2020-09-02 | 삼성전자주식회사 | 반도체 소자의 제조 방법 |
KR102287398B1 (ko) * | 2015-01-14 | 2021-08-06 | 삼성전자주식회사 | 반도체 장치 |
KR102251061B1 (ko) | 2015-05-04 | 2021-05-14 | 삼성전자주식회사 | 변형된 채널층을 갖는 반도체 소자 및 그 제조 방법 |
US9520500B1 (en) | 2015-12-07 | 2016-12-13 | International Business Machines Corporation | Self heating reduction for analog radio frequency (RF) device |
US9748404B1 (en) | 2016-02-29 | 2017-08-29 | International Business Machines Corporation | Method for fabricating a semiconductor device including gate-to-bulk substrate isolation |
US10930793B2 (en) | 2017-04-21 | 2021-02-23 | International Business Machines Corporation | Bottom channel isolation in nanosheet transistors |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05198817A (ja) * | 1991-08-28 | 1993-08-06 | Sharp Corp | 半導体装置の構造および製造方法 |
JPH06342911A (ja) * | 1993-06-01 | 1994-12-13 | Oki Electric Ind Co Ltd | 半導体装置の製造方法 |
JPH0786595A (ja) * | 1993-09-14 | 1995-03-31 | Fujitsu Ltd | 半導体装置とその製造方法 |
JP2006086188A (ja) * | 2004-09-14 | 2006-03-30 | Seiko Epson Corp | 半導体装置および半導体装置の製造方法 |
JP2007521640A (ja) * | 2003-12-08 | 2007-08-02 | インターナショナル・ビジネス・マシーンズ・コーポレーション | ノード・キャパシタンスを増加した半導体メモリ・デバイス |
JP2008311678A (ja) * | 2008-08-22 | 2008-12-25 | Toshiba Corp | 電界効果トランジスタ、集積回路素子、及びそれらの製造方法 |
JP2009027136A (ja) * | 2007-04-19 | 2009-02-05 | Qimonda Ag | 集積回路、メモリ、メモリ製造方法、メモリデバイス製造方法、集積回路およびシステム |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7358121B2 (en) * | 2002-08-23 | 2008-04-15 | Intel Corporation | Tri-gate devices and methods of fabrication |
US7728360B2 (en) * | 2002-12-06 | 2010-06-01 | Taiwan Semiconductor Manufacturing Co., Ltd. | Multiple-gate transistor structure |
US7172943B2 (en) * | 2003-08-13 | 2007-02-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | Multiple-gate transistors formed on bulk substrates |
US7005700B2 (en) * | 2004-01-06 | 2006-02-28 | Jong Ho Lee | Double-gate flash memory device |
US7229889B2 (en) * | 2005-03-10 | 2007-06-12 | International Business Machines Corporation | Methods for metal plating of gate conductors and semiconductors formed thereby |
KR20060124904A (ko) * | 2005-06-01 | 2006-12-06 | 매그나칩 반도체 유한회사 | 핀 전계효과 트랜지스터의 제조방법 |
KR100645065B1 (ko) * | 2005-06-23 | 2006-11-10 | 삼성전자주식회사 | 핀 전계 효과 트랜지스터와 이를 구비하는 비휘발성 메모리장치 및 그 형성 방법 |
US20080001234A1 (en) * | 2006-06-30 | 2008-01-03 | Kangguo Cheng | Hybrid Field Effect Transistor and Bipolar Junction Transistor Structures and Methods for Fabricating Such Structures |
US20090020792A1 (en) | 2007-07-18 | 2009-01-22 | Rafael Rios | Isolated tri-gate transistor fabricated on bulk substrate |
-
2007
- 2007-07-18 US US11/779,284 patent/US20090020792A1/en not_active Abandoned
-
2008
- 2008-06-30 BR BRPI0814114-2A2A patent/BRPI0814114A2/pt not_active IP Right Cessation
- 2008-06-30 CN CN200880025190A patent/CN101755327A/zh active Pending
- 2008-06-30 GB GB1001820A patent/GB2464061A/en not_active Withdrawn
- 2008-06-30 CN CN201610262388.1A patent/CN105938853A/zh active Pending
- 2008-06-30 DE DE112008001835T patent/DE112008001835T5/de not_active Withdrawn
- 2008-06-30 JP JP2010517060A patent/JP2010533978A/ja active Pending
- 2008-06-30 CN CN201210137882.7A patent/CN102683415B/zh active Active
- 2008-06-30 KR KR1020117028038A patent/KR101208781B1/ko not_active IP Right Cessation
- 2008-06-30 WO PCT/US2008/068855 patent/WO2009012053A2/en active Application Filing
- 2008-06-30 KR KR1020107001149A patent/KR20100022526A/ko not_active Application Discontinuation
- 2008-07-01 TW TW097124714A patent/TWI438848B/zh active
- 2008-07-01 TW TW101115144A patent/TWI525712B/zh active
-
2009
- 2009-11-10 US US12/590,562 patent/US7973389B2/en not_active Expired - Fee Related
-
2013
- 2013-02-13 JP JP2013025282A patent/JP5746238B2/ja active Active
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05198817A (ja) * | 1991-08-28 | 1993-08-06 | Sharp Corp | 半導体装置の構造および製造方法 |
JPH06342911A (ja) * | 1993-06-01 | 1994-12-13 | Oki Electric Ind Co Ltd | 半導体装置の製造方法 |
JPH0786595A (ja) * | 1993-09-14 | 1995-03-31 | Fujitsu Ltd | 半導体装置とその製造方法 |
JP2007521640A (ja) * | 2003-12-08 | 2007-08-02 | インターナショナル・ビジネス・マシーンズ・コーポレーション | ノード・キャパシタンスを増加した半導体メモリ・デバイス |
JP2006086188A (ja) * | 2004-09-14 | 2006-03-30 | Seiko Epson Corp | 半導体装置および半導体装置の製造方法 |
JP2009027136A (ja) * | 2007-04-19 | 2009-02-05 | Qimonda Ag | 集積回路、メモリ、メモリ製造方法、メモリデバイス製造方法、集積回路およびシステム |
JP2008311678A (ja) * | 2008-08-22 | 2008-12-25 | Toshiba Corp | 電界効果トランジスタ、集積回路素子、及びそれらの製造方法 |
Also Published As
Publication number | Publication date |
---|---|
WO2009012053A3 (en) | 2009-03-12 |
KR20110131322A (ko) | 2011-12-06 |
CN102683415B (zh) | 2016-01-27 |
TWI438848B (zh) | 2014-05-21 |
TWI525712B (zh) | 2016-03-11 |
CN101755327A (zh) | 2010-06-23 |
CN102683415A (zh) | 2012-09-19 |
KR101208781B1 (ko) | 2012-12-05 |
US7973389B2 (en) | 2011-07-05 |
TW201236087A (en) | 2012-09-01 |
GB2464061A (en) | 2010-04-07 |
US20100059821A1 (en) | 2010-03-11 |
US20090020792A1 (en) | 2009-01-22 |
TW200919589A (en) | 2009-05-01 |
DE112008001835T5 (de) | 2010-07-22 |
KR20100022526A (ko) | 2010-03-02 |
GB201001820D0 (en) | 2010-03-24 |
WO2009012053A2 (en) | 2009-01-22 |
BRPI0814114A2 (pt) | 2015-02-03 |
CN105938853A (zh) | 2016-09-14 |
JP2010533978A (ja) | 2010-10-28 |
JP5746238B2 (ja) | 2015-07-08 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP5746238B2 (ja) | バルク基板上に作製される分離トライゲートトランジスタ | |
CN100524653C (zh) | 各向异性湿蚀刻的器件制造方法及对应器件 | |
JP6419184B2 (ja) | 改善されたSiGeファセットによる改善されたシリサイド形成 | |
KR100994857B1 (ko) | 트랜지스터, 트랜지스터 제조 방법 및 반도체 장치 | |
US7799650B2 (en) | Method for making a transistor with a stressor | |
US7456450B2 (en) | CMOS devices with hybrid channel orientations and method for fabricating the same | |
KR100642754B1 (ko) | 식각 저항성 l형 스페이서를 구비하는 반도체 소자 및이의 제조 방법 | |
CN105470132A (zh) | 鳍式场效应管的形成方法 | |
JP5068074B2 (ja) | 分離領域を有する半導体デバイスを形成するための方法 | |
JP2009065020A (ja) | 半導体装置及びその製造方法 | |
CN105448730A (zh) | 半导体结构及其形成方法 | |
KR100414735B1 (ko) | 반도체소자 및 그 형성 방법 | |
CN103794482B (zh) | 金属栅极的形成方法 | |
CN107706153B (zh) | 半导体器件的形成方法 | |
JP2008300662A (ja) | 半導体装置の製造方法 | |
CN105161414B (zh) | 栅极硬掩模层的去除方法 | |
CN105870005B (zh) | 半导体结构及其形成方法 | |
KR20100108419A (ko) | 박막 및 그 박막을 이용한 반도체 장치의 제조 방법 | |
KR20070101435A (ko) | 반도체 소자 및 그 제조 방법 | |
KR100540339B1 (ko) | 반도체 제조 공정에 있어서의 게이트 구조 형성 방법 | |
JPS60200572A (ja) | 半導体装置の製造方法 | |
CN106298915B (zh) | Pmos晶体管及其形成方法 | |
KR100472858B1 (ko) | 반도체 소자의 제조 방법 | |
JP2011198882A (ja) | 半導体装置の製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20140228 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20140311 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20140602 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20140924 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20141106 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20150407 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20150507 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 5746238 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |