JP2009510562A5 - - Google Patents

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Publication number
JP2009510562A5
JP2009510562A5 JP2008532397A JP2008532397A JP2009510562A5 JP 2009510562 A5 JP2009510562 A5 JP 2009510562A5 JP 2008532397 A JP2008532397 A JP 2008532397A JP 2008532397 A JP2008532397 A JP 2008532397A JP 2009510562 A5 JP2009510562 A5 JP 2009510562A5
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integrated circuit
memory
die
memory module
circuit buffer
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JP2008532397A
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Japanese (ja)
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JP2009510562A (ja
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Priority claimed from US11/236,401 external-priority patent/US7464225B2/en
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JP2008532397A 2005-09-26 2006-09-21 複数の集積回路メモリデバイスと複数のバッファデバイスをマトリクストポロジーで備えるメモリモジュール Pending JP2009510562A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/236,401 US7464225B2 (en) 2005-09-26 2005-09-26 Memory module including a plurality of integrated circuit memory devices and a plurality of buffer devices in a matrix topology
PCT/US2006/036894 WO2007038225A2 (en) 2005-09-26 2006-09-21 A memory module including a plurality of integrated circuit memory devices and a plurality of buffer devices in a matrix topology

Publications (2)

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JP2009510562A JP2009510562A (ja) 2009-03-12
JP2009510562A5 true JP2009510562A5 (cg-RX-API-DMAC7.html) 2009-11-19

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JP2008532397A Pending JP2009510562A (ja) 2005-09-26 2006-09-21 複数の集積回路メモリデバイスと複数のバッファデバイスをマトリクストポロジーで備えるメモリモジュール

Country Status (5)

Country Link
US (3) US7464225B2 (cg-RX-API-DMAC7.html)
EP (1) EP1929479A2 (cg-RX-API-DMAC7.html)
JP (1) JP2009510562A (cg-RX-API-DMAC7.html)
CN (2) CN101887743B (cg-RX-API-DMAC7.html)
WO (1) WO2007038225A2 (cg-RX-API-DMAC7.html)

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