JP2009501440A5 - - Google Patents

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Publication number
JP2009501440A5
JP2009501440A5 JP2008520879A JP2008520879A JP2009501440A5 JP 2009501440 A5 JP2009501440 A5 JP 2009501440A5 JP 2008520879 A JP2008520879 A JP 2008520879A JP 2008520879 A JP2008520879 A JP 2008520879A JP 2009501440 A5 JP2009501440 A5 JP 2009501440A5
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JP
Japan
Prior art keywords
insulating layer
free surface
substrate
plasma
range
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JP2008520879A
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English (en)
Japanese (ja)
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JP4927080B2 (ja
JP2009501440A (ja
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Priority claimed from FR0507573A external-priority patent/FR2888663B1/fr
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Publication of JP2009501440A publication Critical patent/JP2009501440A/ja
Publication of JP2009501440A5 publication Critical patent/JP2009501440A5/ja
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Publication of JP4927080B2 publication Critical patent/JP4927080B2/ja
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JP2008520879A 2005-07-13 2006-07-12 厚い絶縁層の粗さを減少させるための方法 Active JP4927080B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
FR0507573A FR2888663B1 (fr) 2005-07-13 2005-07-13 Procede de diminution de la rugosite d'une couche epaisse d'isolant
FR05/07573 2005-07-13
PCT/EP2006/064169 WO2007006803A1 (fr) 2005-07-13 2006-07-12 Procede de diminution de la rugosite d'une couche epaisse d'isolant

Publications (3)

Publication Number Publication Date
JP2009501440A JP2009501440A (ja) 2009-01-15
JP2009501440A5 true JP2009501440A5 (enExample) 2009-02-26
JP4927080B2 JP4927080B2 (ja) 2012-05-09

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ID=36090950

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Application Number Title Priority Date Filing Date
JP2008520879A Active JP4927080B2 (ja) 2005-07-13 2006-07-12 厚い絶縁層の粗さを減少させるための方法

Country Status (9)

Country Link
US (2) US7446019B2 (enExample)
EP (1) EP1902463B1 (enExample)
JP (1) JP4927080B2 (enExample)
KR (1) KR100958467B1 (enExample)
CN (1) CN100576462C (enExample)
AT (1) ATE524828T1 (enExample)
FR (1) FR2888663B1 (enExample)
SG (1) SG151287A1 (enExample)
WO (1) WO2007006803A1 (enExample)

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JP5354900B2 (ja) * 2007-12-28 2013-11-27 株式会社半導体エネルギー研究所 半導体基板の作製方法
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FR2926674B1 (fr) * 2008-01-21 2010-03-26 Soitec Silicon On Insulator Procede de fabrication d'une structure composite avec couche d'oxyde de collage stable
JP5503876B2 (ja) * 2008-01-24 2014-05-28 株式会社半導体エネルギー研究所 半導体基板の製造方法
US8119490B2 (en) * 2008-02-04 2012-02-21 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing SOI substrate
US7858495B2 (en) * 2008-02-04 2010-12-28 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing SOI substrate
JP4577382B2 (ja) * 2008-03-06 2010-11-10 信越半導体株式会社 貼り合わせウェーハの製造方法
US8420503B2 (en) 2008-04-01 2013-04-16 Shin—Etsu Chemical Co., Ltd. Method for producing SOI substrate
FR2931585B1 (fr) * 2008-05-26 2010-09-03 Commissariat Energie Atomique Traitement de surface par plasma d'azote dans un procede de collage direct
JP5548395B2 (ja) 2008-06-25 2014-07-16 株式会社半導体エネルギー研究所 Soi基板の作製方法
US20100022070A1 (en) * 2008-07-22 2010-01-28 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing soi substrate
JP5663150B2 (ja) * 2008-07-22 2015-02-04 株式会社半導体エネルギー研究所 Soi基板の作製方法
SG160295A1 (en) * 2008-09-29 2010-04-29 Semiconductor Energy Lab Method for manufacturing semiconductor device
US8741740B2 (en) * 2008-10-02 2014-06-03 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing SOI substrate
JP5496598B2 (ja) * 2008-10-31 2014-05-21 信越化学工業株式会社 シリコン薄膜転写絶縁性ウェーハの製造方法
FR2942911B1 (fr) * 2009-03-09 2011-05-13 Soitec Silicon On Insulator Procede de realisation d'une heterostructure avec adaptation locale de coefficient de dilatation thermique
FR2951026B1 (fr) * 2009-10-01 2011-12-02 St Microelectronics Sa Procede de fabrication de resonateurs baw sur une tranche semiconductrice
FR2951023B1 (fr) 2009-10-01 2012-03-09 St Microelectronics Sa Procede de fabrication d'oscillateurs monolithiques a resonateurs baw
FR2951024B1 (fr) 2009-10-01 2012-03-23 St Microelectronics Sa Procede de fabrication de resonateur baw a facteur de qualite eleve
JP5917036B2 (ja) 2010-08-05 2016-05-11 株式会社半導体エネルギー研究所 Soi基板の作製方法
JP2012156495A (ja) 2011-01-07 2012-08-16 Semiconductor Energy Lab Co Ltd Soi基板の作製方法
KR101705937B1 (ko) 2011-01-25 2017-02-10 에베 그룹 에. 탈너 게엠베하 웨이퍼들의 영구적 결합을 위한 방법
JP2014516470A (ja) 2011-04-08 2014-07-10 エーファウ・グループ・エー・タルナー・ゲーエムベーハー ウェハを恒久的にボンディングするための方法
US8802534B2 (en) 2011-06-14 2014-08-12 Semiconductor Energy Laboratory Co., Ltd. Method for forming SOI substrate and apparatus for forming the same
KR102148336B1 (ko) * 2013-11-26 2020-08-27 삼성전자주식회사 표면 처리 방법, 반도체 제조 방법 및 이에 의해 제조된 반도체 장치
EP3100275B1 (en) * 2014-01-29 2018-08-22 Palvannanathan Ganesan Floating nuclear power reactor with a self-cooling containment structure and an emergency heat exchange system
JP6751385B2 (ja) * 2014-07-08 2020-09-02 マサチューセッツ インスティテュート オブ テクノロジー 基板の製造方法
FR3036200B1 (fr) * 2015-05-13 2017-05-05 Soitec Silicon On Insulator Methode de calibration pour equipements de traitement thermique
WO2017102383A1 (en) * 2015-12-18 2017-06-22 Asml Netherlands B.V. A method of manufacturing a membrane assembly for euv lithography, a membrane assembly, a lithographic apparatus, and a device manufacturing method
FR3045939B1 (fr) * 2015-12-22 2018-03-30 Commissariat A L'energie Atomique Et Aux Energies Alternatives Procede de collage direct entre deux structures
CN110709967B (zh) * 2017-07-24 2023-09-01 应用材料公司 改善在氧化硅上的超薄非晶硅膜的连续性的预处理方法
FR3079345B1 (fr) * 2018-03-26 2020-02-21 Soitec Procede de fabrication d'un substrat pour dispositif radiofrequence
CN114203546A (zh) * 2020-09-18 2022-03-18 中芯集成电路(宁波)有限公司 半导体器件及其制造方法
JP7487659B2 (ja) * 2020-12-25 2024-05-21 株式会社Sumco Soiウェーハの製造方法
CN114688950B (zh) * 2022-05-31 2022-08-23 陕西建工第一建设集团有限公司 一种建筑施工用铝合金板平整检测装置

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