JP2009049387A5 - - Google Patents

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Publication number
JP2009049387A5
JP2009049387A5 JP2008184536A JP2008184536A JP2009049387A5 JP 2009049387 A5 JP2009049387 A5 JP 2009049387A5 JP 2008184536 A JP2008184536 A JP 2008184536A JP 2008184536 A JP2008184536 A JP 2008184536A JP 2009049387 A5 JP2009049387 A5 JP 2009049387A5
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JP
Japan
Prior art keywords
substrate
semiconductor substrate
harmonic
laser
laser beam
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Application number
JP2008184536A
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English (en)
Japanese (ja)
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JP5442224B2 (ja
JP2009049387A (ja
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Priority to JP2008184536A priority Critical patent/JP5442224B2/ja
Priority claimed from JP2008184536A external-priority patent/JP5442224B2/ja
Publication of JP2009049387A publication Critical patent/JP2009049387A/ja
Publication of JP2009049387A5 publication Critical patent/JP2009049387A5/ja
Application granted granted Critical
Publication of JP5442224B2 publication Critical patent/JP5442224B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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JP2008184536A 2007-07-23 2008-07-16 Ｓｏｉ基板の製造方法 Expired - Fee Related JP5442224B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2008184536A JP5442224B2 (ja) 2007-07-23 2008-07-16 Ｓｏｉ基板の製造方法

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2007190987 2007-07-23
JP2007190987 2007-07-23
JP2008184536A JP5442224B2 (ja) 2007-07-23 2008-07-16 Ｓｏｉ基板の製造方法

Publications (3)

Publication Number Publication Date
JP2009049387A JP2009049387A (ja) 2009-03-05
JP2009049387A5 true JP2009049387A5 (enExample) 2011-07-14
JP5442224B2 JP5442224B2 (ja) 2014-03-12

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JP2008184536A Expired - Fee Related JP5442224B2 (ja) 2007-07-23 2008-07-16 Ｓｏｉ基板の製造方法

Country Status (2)

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US (1) US8263476B2 (enExample)
JP (1) JP5442224B2 (enExample)

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SG182208A1 (en) * 2008-12-15 2012-07-30 Semiconductor Energy Lab Manufacturing method of soi substrate and manufacturing method of semiconductor device
JP5420968B2 (ja) 2009-05-07 2014-02-19 信越化学工業株式会社 貼り合わせウェーハの製造方法
JP2010278337A (ja) * 2009-05-29 2010-12-09 Shin-Etsu Chemical Co Ltd 表面欠陥密度が少ないｓｏｓ基板
JP2010278338A (ja) 2009-05-29 2010-12-09 Shin-Etsu Chemical Co Ltd 界面近傍における欠陥密度が低いｓｏｓ基板
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JP5279782B2 (ja) * 2010-09-16 2013-09-04 株式会社東芝 半導体装置の製造方法
JP5902917B2 (ja) 2010-11-12 2016-04-13 株式会社半導体エネルギー研究所 半導体基板の作製方法
JP5695535B2 (ja) * 2011-09-27 2015-04-08 株式会社東芝 表示装置の製造方法
FR2984007B1 (fr) * 2011-12-13 2015-05-08 Soitec Silicon On Insulator Procede de stabilisation d'une interface de collage situee au sein d'une structure comprenant une couche d'oxyde enterree et structure obtenue
CN104412706B (zh) * 2012-06-15 2017-05-31 须贺唯知 电子元件的封装方法以及基板接合体
KR101803790B1 (ko) * 2013-04-18 2017-12-04 한화테크윈 주식회사 웨이퍼의 시닝 방법 및 장치
KR20140126439A (ko) * 2013-04-23 2014-10-31 삼성디스플레이 주식회사 투명 플렉시블 표시장치의 제조방법 및 이를 이용한 투명 플렉시블 표시장치
CN104252073B (zh) * 2013-06-27 2017-11-03 瀚宇彩晶股份有限公司 触控液晶显示器
JP5859497B2 (ja) * 2013-08-22 2016-02-10 信越化学工業株式会社 界面近傍における欠陥密度が低いｓｏｓ基板の製造方法
JP5859496B2 (ja) * 2013-08-22 2016-02-10 信越化学工業株式会社 表面欠陥密度が少ないｓｏｓ基板の製造方法
JP2015108735A (ja) * 2013-12-05 2015-06-11 旭硝子株式会社 電子デバイスの製造方法
US10586817B2 (en) 2016-03-24 2020-03-10 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device, manufacturing method thereof, and separation apparatus
JP7001374B2 (ja) * 2017-06-19 2022-02-04 東京エレクトロン株式会社 成膜方法、記憶媒体及び成膜システム
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FR3152083B1 (fr) * 2023-08-07 2025-07-11 Soitec Silicon On Insulator Procede de transfert d’une couche mince sur un substrat support

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