JP2008084959A - 半導体装置及びその製造方法 - Google Patents

半導体装置及びその製造方法 Download PDF

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Publication number
JP2008084959A
JP2008084959A JP2006260949A JP2006260949A JP2008084959A JP 2008084959 A JP2008084959 A JP 2008084959A JP 2006260949 A JP2006260949 A JP 2006260949A JP 2006260949 A JP2006260949 A JP 2006260949A JP 2008084959 A JP2008084959 A JP 2008084959A
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JP
Japan
Prior art keywords
semiconductor chip
semiconductor device
connection terminal
metal layer
wiring pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2006260949A
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English (en)
Japanese (ja)
Other versions
JP2008084959A5 (https=
Inventor
Koji Yamano
孝治 山野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
Original Assignee
Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Priority to JP2006260949A priority Critical patent/JP2008084959A/ja
Priority to KR1020070089769A priority patent/KR20080028279A/ko
Priority to US11/856,354 priority patent/US7884453B2/en
Priority to TW096135326A priority patent/TW200816414A/zh
Priority to CNA2007101541917A priority patent/CN101154641A/zh
Priority to EP07018974A priority patent/EP1906446A2/en
Publication of JP2008084959A publication Critical patent/JP2008084959A/ja
Publication of JP2008084959A5 publication Critical patent/JP2008084959A5/ja
Priority to US12/581,486 priority patent/US8211754B2/en
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/114—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations
    • H10W74/117—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations the substrate having spherical bumps for external connection
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H10W74/012—Manufacture or treatment of encapsulations on active surfaces of flip-chip devices, e.g. forming underfills
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H10W74/014—Manufacture or treatment using batch processing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/0198—Manufacture or treatment batch processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H10W72/07331—Connecting techniques
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H10W72/351—Materials of die-attach connectors
    • H10W72/353—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics
    • H10W72/354—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics comprising polymers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/853—On the same surface
    • H10W72/856—Bump connectors and die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/921—Structures or relative sizes of bond pads
    • H10W72/923—Bond pads having multiple stacked layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H10W72/9415—Dispositions of bond pads relative to the surface, e.g. recessed, protruding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H10W72/942—Dispositions of bond pads relative to underlying supporting features, e.g. bond pads, RDLs or vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/131—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed
    • H10W74/142—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed the encapsulations exposing the passive side of the semiconductor body
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Wire Bonding (AREA)
JP2006260949A 2006-09-26 2006-09-26 半導体装置及びその製造方法 Pending JP2008084959A (ja)

Priority Applications (7)

Application Number Priority Date Filing Date Title
JP2006260949A JP2008084959A (ja) 2006-09-26 2006-09-26 半導体装置及びその製造方法
KR1020070089769A KR20080028279A (ko) 2006-09-26 2007-09-05 반도체 장치 및 그 제조 방법
US11/856,354 US7884453B2 (en) 2006-09-26 2007-09-17 Semiconductor device and manufacturing method thereof
TW096135326A TW200816414A (en) 2006-09-26 2007-09-21 Semiconductor device and manufacturing method thereof
CNA2007101541917A CN101154641A (zh) 2006-09-26 2007-09-24 半导体器件及其制造方法
EP07018974A EP1906446A2 (en) 2006-09-26 2007-09-26 Semiconductor device and manufacturing method thereof
US12/581,486 US8211754B2 (en) 2006-09-26 2009-10-19 Semiconductor device and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006260949A JP2008084959A (ja) 2006-09-26 2006-09-26 半導体装置及びその製造方法

Publications (2)

Publication Number Publication Date
JP2008084959A true JP2008084959A (ja) 2008-04-10
JP2008084959A5 JP2008084959A5 (https=) 2009-08-20

Family

ID=38858918

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006260949A Pending JP2008084959A (ja) 2006-09-26 2006-09-26 半導体装置及びその製造方法

Country Status (6)

Country Link
US (2) US7884453B2 (https=)
EP (1) EP1906446A2 (https=)
JP (1) JP2008084959A (https=)
KR (1) KR20080028279A (https=)
CN (1) CN101154641A (https=)
TW (1) TW200816414A (https=)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101303443A (zh) * 2007-05-11 2008-11-12 鸿富锦精密工业（深圳）有限公司 相机模组及其组装方法
JP2010165940A (ja) * 2009-01-16 2010-07-29 Shinko Electric Ind Co Ltd 半導体素子の樹脂封止方法
US9620455B2 (en) * 2010-06-24 2017-04-11 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming anisotropic conductive film between semiconductor die and build-up interconnect structure
JP5878054B2 (ja) * 2012-03-27 2016-03-08 ルネサスエレクトロニクス株式会社 半導体装置の製造方法及び半導体装置
JP6196893B2 (ja) * 2012-12-18 2017-09-13 新光電気工業株式会社 半導体装置の製造方法
KR101374770B1 (ko) * 2013-11-22 2014-03-17 실리콘밸리(주) 금속 박판의 적층을 이용한 반도체 검사 패드 및 제조방법
CN104576405B (zh) * 2014-12-16 2017-11-07 通富微电子股份有限公司 单层基板封装工艺
US9583472B2 (en) * 2015-03-03 2017-02-28 Apple Inc. Fan out system in package and method for forming the same
US9659907B2 (en) * 2015-04-07 2017-05-23 Apple Inc. Double side mounting memory integration in thin low warpage fanout package
JP6851239B2 (ja) 2017-03-29 2021-03-31 エイブリック株式会社 樹脂封止型半導体装置およびその製造方法
CN111627867A (zh) * 2019-02-28 2020-09-04 富泰华工业（深圳）有限公司 芯片封装结构及其制作方法

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07297227A (ja) * 1994-04-26 1995-11-10 Fujitsu Ltd 半導体装置の製造方法
JPH1174310A (ja) * 1997-08-27 1999-03-16 Matsushita Electron Corp 半導体装置およびその製造方法
JP2001144208A (ja) * 1999-11-15 2001-05-25 Oki Electric Ind Co Ltd 半導体装置
JP2001267461A (ja) * 2000-03-23 2001-09-28 Mitsui High Tec Inc 半導体装置の製造方法
JP2002184905A (ja) * 2000-12-14 2002-06-28 Sharp Corp 半導体装置およびその製造方法
JP2004064082A (ja) * 2000-10-18 2004-02-26 Nec Corp 半導体装置搭載用配線基板およびその製造方法、並びに半導体パッケージ
JP2005328057A (ja) * 1994-03-18 2005-11-24 Hitachi Chem Co Ltd 半導体パッケージの製造法及び半導体パッケージ
JP2007250834A (ja) * 2006-03-16 2007-09-27 Matsushita Electric Ind Co Ltd 電子部品装置の製造方法

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JPH01276750A (ja) 1988-04-28 1989-11-07 Matsushita Electric Ind Co Ltd 半導体装置
JP3313547B2 (ja) 1995-08-30 2002-08-12 沖電気工業株式会社 チップサイズパッケージの製造方法
JP3007833B2 (ja) 1995-12-12 2000-02-07 富士通株式会社 半導体装置及びその製造方法及びリードフレーム及びその製造方法
JP2000164638A (ja) 1998-11-27 2000-06-16 Toshiba Corp 半導体装置
JP2001217354A (ja) 2000-02-07 2001-08-10 Rohm Co Ltd 半導体チップの実装構造、および半導体装置
JP2001257453A (ja) * 2000-03-09 2001-09-21 Shinko Electric Ind Co Ltd 配線基板、半導体装置及びそれらの製造方法
JP2001298115A (ja) 2000-04-13 2001-10-26 Seiko Epson Corp 半導体装置及びその製造方法、回路基板並びに電子機器
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JP3914239B2 (ja) 2005-03-15 2007-05-16 新光電気工業株式会社 配線基板および配線基板の製造方法
JP5000877B2 (ja) * 2005-10-07 2012-08-15 ルネサスエレクトロニクス株式会社 半導体装置
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US7666709B1 (en) * 2008-12-10 2010-02-23 Stats Chippac, Ltd. Semiconductor device and method of placing semiconductor die on a temporary carrier using fiducial patterns
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Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005328057A (ja) * 1994-03-18 2005-11-24 Hitachi Chem Co Ltd 半導体パッケージの製造法及び半導体パッケージ
JPH07297227A (ja) * 1994-04-26 1995-11-10 Fujitsu Ltd 半導体装置の製造方法
JPH1174310A (ja) * 1997-08-27 1999-03-16 Matsushita Electron Corp 半導体装置およびその製造方法
JP2001144208A (ja) * 1999-11-15 2001-05-25 Oki Electric Ind Co Ltd 半導体装置
JP2001267461A (ja) * 2000-03-23 2001-09-28 Mitsui High Tec Inc 半導体装置の製造方法
JP2004064082A (ja) * 2000-10-18 2004-02-26 Nec Corp 半導体装置搭載用配線基板およびその製造方法、並びに半導体パッケージ
JP2002184905A (ja) * 2000-12-14 2002-06-28 Sharp Corp 半導体装置およびその製造方法
JP2007250834A (ja) * 2006-03-16 2007-09-27 Matsushita Electric Ind Co Ltd 電子部品装置の製造方法

Also Published As

Publication number Publication date
US7884453B2 (en) 2011-02-08
EP1906446A2 (en) 2008-04-02
US20100041183A1 (en) 2010-02-18
CN101154641A (zh) 2008-04-02
KR20080028279A (ko) 2008-03-31
US20080073798A1 (en) 2008-03-27
US8211754B2 (en) 2012-07-03
TW200816414A (en) 2008-04-01

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