JP2006032752A - Simox基板の製造方法 - Google Patents
Simox基板の製造方法 Download PDFInfo
- Publication number
- JP2006032752A JP2006032752A JP2004211127A JP2004211127A JP2006032752A JP 2006032752 A JP2006032752 A JP 2006032752A JP 2004211127 A JP2004211127 A JP 2004211127A JP 2004211127 A JP2004211127 A JP 2004211127A JP 2006032752 A JP2006032752 A JP 2006032752A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- oxygen
- heat treatment
- gas atmosphere
- silicon substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 88
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 19
- 239000007789 gas Substances 0.000 claims abstract description 65
- 230000007547 defect Effects 0.000 claims abstract description 63
- 239000001301 oxygen Substances 0.000 claims abstract description 51
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 51
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 39
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 claims abstract description 37
- 239000013078 crystal Substances 0.000 claims abstract description 36
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 32
- 239000010703 silicon Substances 0.000 claims abstract description 32
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 28
- 229910052786 argon Inorganic materials 0.000 claims abstract description 20
- 239000011261 inert gas Substances 0.000 claims abstract description 19
- 238000009826 distribution Methods 0.000 claims abstract description 6
- 239000011800 void material Substances 0.000 claims abstract description 6
- 238000010438 heat treatment Methods 0.000 claims description 40
- -1 oxygen ions Chemical class 0.000 claims description 22
- 238000000034 method Methods 0.000 claims description 13
- 238000002513 implantation Methods 0.000 claims description 6
- 230000002829 reductive effect Effects 0.000 abstract description 15
- 230000001590 oxidative effect Effects 0.000 description 9
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 6
- 239000000047 product Substances 0.000 description 6
- 230000000052 comparative effect Effects 0.000 description 5
- 238000009792 diffusion process Methods 0.000 description 5
- 230000000694 effects Effects 0.000 description 5
- 230000006866 deterioration Effects 0.000 description 4
- 238000005468 ion implantation Methods 0.000 description 4
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- 239000007864 aqueous solution Substances 0.000 description 3
- 238000004140 cleaning Methods 0.000 description 3
- 229910052757 nitrogen Inorganic materials 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 238000011156 evaluation Methods 0.000 description 2
- 239000001307 helium Substances 0.000 description 2
- 229910052734 helium Inorganic materials 0.000 description 2
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 2
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 2
- 239000002245 particle Substances 0.000 description 2
- 238000000859 sublimation Methods 0.000 description 2
- 230000008022 sublimation Effects 0.000 description 2
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 description 1
- 230000000593 degrading effect Effects 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 230000002542 deteriorative effect Effects 0.000 description 1
- 229910001882 dioxygen Inorganic materials 0.000 description 1
- 239000012467 final product Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000002156 mixing Methods 0.000 description 1
- 238000002203 pretreatment Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 239000007858 starting material Substances 0.000 description 1
- 230000001629 suppression Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
- H01L21/26533—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically inactive species in silicon to make buried insulating layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
- H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
- H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
- H01L21/02238—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/02255—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02299—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
- H01L21/3165—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation
- H01L21/31654—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself
- H01L21/31658—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself by thermal oxidation, e.g. of SiGe
- H01L21/31662—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself by thermal oxidation, e.g. of SiGe of silicon in uncombined form
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76243—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using silicon implanted buried insulating layers, e.g. oxide layers, i.e. SIMOX techniques
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- High Energy & Nuclear Physics (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
- Element Separation (AREA)
Abstract
【解決手段】SIMOX基板の製造方法は、酸素イオンを注入したシリコン基板をアルゴンと酸素の混合ガス雰囲気において1300〜1350℃の熱処理を行うことによりSIMOX基板を得る。酸素イオンの注入後であって熱処理以前にシリコン基板を不活性ガス若しくは還元性ガス又は混合ガス雰囲気において1000℃から1280℃の温度範囲で5分〜4時間の前熱処理を行う。酸素イオンが注入されるシリコン基板は、ボイド欠陥又はCOPからなる結晶欠陥密度が1×105cm-3以上でありかつ結晶欠陥のサイズ分布の最大頻度が0.12μm以下であることが好ましい。前熱処理後にシリコン基板を600℃〜1100℃まで不活性ガス若しくは還元性ガス又はこれらとの混合ガス雰囲気において降温させた後にアルゴンと酸素の混合ガス雰囲気における熱処理を行うことが更に好ましい。
【選択図】 図1
Description
本発明は、SOI層表面上における比較的小さなサイズの欠陥をも消滅し得るSIMOX基板の製造方法を提供することにある。
その特徴ある点は、酸素イオンの注入後であって熱処理以前にシリコン基板を不活性ガス若しくは還元性ガス又は不活性ガスと還元性ガスとの混合ガス雰囲気において1000℃から1280℃の温度範囲で5分〜4時間の前熱処理を行うところにある。
この請求項1に記載されたSIMOX基板の製造方法では、酸素イオンの注入後であって熱処理以前にシリコン基板に前熱処理を行うことにより、非酸化性ガス雰囲気下での熱処理による結晶欠陥、特にGrown-in欠陥と呼ばれる空洞欠陥の内壁酸化膜を溶解させ、その後内壁酸化膜が除去された空洞欠陥内に格子間シリコン原子の拡散による穴埋め効果により表面近傍のGrown-in欠陥を縮小、消滅させる。このため、0.3μm未満のサイズの欠陥をも消滅させることができる。
この請求項2に記載されたSIMOX基板の製造方法では、小サイズの結晶欠陥を有す基板を用いているため、酸素イオン飛程のバラツキが小さくなり、次のステップのアルゴンと酸素の混合ガス雰囲気における熱処理による埋め込み酸化膜のバラツキを小さくすることができる。
一般的に、初期段階での非酸化性ガス雰囲気下での1250℃以下の熱処理完了後に、その温度でアルゴンと酸素の混合ガス雰囲気に切り替えるとシリコン基板表面のマイクロラフネスの劣化が起こるけれども、この請求項3に記載された発明では、前熱処理後にマイクロラフネスの劣化が防止できる温度、具体的には1100℃以下まで温度を下げるので、著しいラフネスの劣化を防止することができる。
本発明は、酸素イオンを注入したシリコン基板をアルゴンと酸素の混合ガス雰囲気において1300〜1350℃の熱処理を行うことによりSIMOX基板を得るSIMOX基板の製造方法である。そして、酸素イオンの注入後であってその熱処理以前にシリコン基板を不活性ガス若しくは還元性ガス又は不活性ガスと還元性ガスとの混合ガス雰囲気において1000℃から1280℃の温度範囲で5分〜4時間の前熱処理を行うことを特徴とする。酸化膜を形成するために酸素イオンを注入し、その後従来から行われているアルゴンと酸素の混合ガス雰囲気における熱処理の前段処理として、不活性ガス若しくは還元性ガス又は不活性ガスと還元性ガスとの混合ガス雰囲気において熱処理を加えることによりピット発生起因である小さな結晶欠陥を消滅させる。そして、非酸化性ガス雰囲気下での熱処理による結晶欠陥、特にGrown-in欠陥と呼ばれる空洞欠陥の内壁酸化膜を溶解させ、その後内壁酸化膜が除去された空洞欠陥内に格子間シリコン原子の拡散による穴埋め効果により表面近傍のGrown-in欠陥を縮小、消滅させる。このとき、同時にイオン注入で付着したシリコン系もしくはシリカ系パーティクルも低減または消滅させることが出来るので最終SIMOX基板表面上のピットを更に低減させることが可能になる。
開始材料として直径200mmのチョクラルスキー法によって育成されたシリコン単結晶を加工して得られた以下の3種類の基板を準備した。即ち、(1)結晶欠陥サイズピークが0.13〜0.15μmで最大密度0.5×104cm-2を有する基板、(2)結晶欠陥サイズピークが0.09〜0.12μmで最大密度1.0×105cm-2を有する基板、(3)結晶欠陥サイズピークが0.05〜0.07μmで最大密度1.0×107cm-2を有する基板を準備した。
実施例1における3種類の基板と同一の基板をそれぞれ準備した。これら3種類の基板のそれぞれに実施例1と同一の条件で酸素イオン注入を実施した。次に、図2に記載したように、Arガス100%雰囲気下で700℃投入後、1150℃まで昇温、その後1時間保持した後に1000℃まで降温させた。その後、1%酸素雰囲気−アルゴンガスベースで1350℃まで昇温、その後4時間保持させた後に70%酸素雰囲気で更に4時間保持を行い700℃まで降温させた。その後、HF水溶液で表面酸化膜を除去した後、SC−1洗浄を通して最終SIMOX製品にした。これらのSIMOX基板を実施例2とした。
実施例1における3種類の基板と同一の基板をそれぞれ準備した。これら3種類の基板のそれぞれに実施例1と同一の条件で酸素イオン注入を実施した。次に、図3に記載したように、700℃投入後1%酸素雰囲気−アルゴンガスベースで1350℃まで昇温、その後4時間保持させた後に70%酸素雰囲気で更に4時間保持を行い700℃まで降温させた。その後、HF水溶液で表面酸化膜を除去した後、SC−1洗浄を通して最終SIMOX製品にした。これらのSIMOX基板を比較例1とした。
実施例1,実施例2及び比較例1における(1)から(3)の基板を表面欠陥検出装置にてそれぞれ観察した。その結果は以下の通りであった。
比較例1では、既に開始基板でCOPが発生している領域(基板中央部に密集)と同位置にピットが観察された。当然の如く結晶欠陥密度の高い基板(3)ほどピット密度も高くなりSIMOX製品表面に約10個/cm2以上存在していた。更に、表面ヘイズレベルを測定したが全てのサンプルで約1〜4ppbの値を示していた。
また、実施例2では、基板(1)から(3)の全てが0.3〜0.5個/cm2のピット数、かつヘイズレベルを測定した結果、全てのサンプルでヘイズレベルは約1〜5ppbの範囲であり従来SIMOX品と同等であることがわかった。
以上の結果からすると、本発明により低コスト基板を使用したSIMOX基板の品質は高価な基板を使用したSIMOX基板品質と同等レベルになることがわかる。
Claims (3)
- 酸素イオンを注入したシリコン基板をアルゴンと酸素の混合ガス雰囲気において1300〜1350℃の熱処理を行うことによりSIMOX基板を得るSIMOX基板の製造方法において、
酸素イオンの注入後であって前記熱処理以前に前記シリコン基板を不活性ガス若しくは還元性ガス又は不活性ガスと還元性ガスとの混合ガス雰囲気において1000℃から1280℃の温度範囲で5分〜4時間の前熱処理を行うことを特徴とするSIMOX基板の製造方法。 - 酸素イオンが注入されるシリコン基板は、ボイド欠陥又はCOPからなる結晶欠陥密度が1×105cm-3以上でありかつ前記結晶欠陥のサイズ分布の最大頻度が0.12μm以下である請求項1記載のSIMOX基板の製造方法。
- 前熱処理後にシリコン基板を600℃〜1100℃まで不活性ガス若しくは還元性ガス又は不活性ガスと還元性ガスとの混合ガス雰囲気において降温させた後にアルゴンと酸素の混合ガス雰囲気における熱処理を行う請求項1又は2記載のSIMOX基板の製造方法。
Priority Applications (7)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004211127A JP4706199B2 (ja) | 2004-07-20 | 2004-07-20 | Simox基板の製造方法 |
KR1020077003782A KR100834231B1 (ko) | 2004-07-20 | 2005-07-19 | Simox 기판의 제조 방법 |
EP05762053A EP1786023B1 (en) | 2004-07-20 | 2005-07-19 | Simox substrate manufacturing method |
US11/632,875 US7560363B2 (en) | 2004-07-20 | 2005-07-19 | Manufacturing method for SIMOX substrate |
TW094124383A TWI270959B (en) | 2004-07-20 | 2005-07-19 | Production method for SIMOX substrate |
CNB2005800246636A CN100501922C (zh) | 2004-07-20 | 2005-07-19 | Simox基板的制造方法 |
PCT/JP2005/013259 WO2006009148A1 (ja) | 2004-07-20 | 2005-07-19 | Simox基板の製造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004211127A JP4706199B2 (ja) | 2004-07-20 | 2004-07-20 | Simox基板の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2006032752A true JP2006032752A (ja) | 2006-02-02 |
JP4706199B2 JP4706199B2 (ja) | 2011-06-22 |
Family
ID=35785256
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2004211127A Expired - Fee Related JP4706199B2 (ja) | 2004-07-20 | 2004-07-20 | Simox基板の製造方法 |
Country Status (7)
Country | Link |
---|---|
US (1) | US7560363B2 (ja) |
EP (1) | EP1786023B1 (ja) |
JP (1) | JP4706199B2 (ja) |
KR (1) | KR100834231B1 (ja) |
CN (1) | CN100501922C (ja) |
TW (1) | TWI270959B (ja) |
WO (1) | WO2006009148A1 (ja) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2010040589A (ja) * | 2008-07-31 | 2010-02-18 | Covalent Materials Corp | シリコンウェーハの製造方法 |
JP2010080582A (ja) * | 2008-09-25 | 2010-04-08 | Covalent Materials Corp | シリコンウェーハの製造方法 |
JP2014168090A (ja) * | 2014-04-24 | 2014-09-11 | Globalwafers Japan Co Ltd | シリコンウェーハの製造方法 |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4706199B2 (ja) * | 2004-07-20 | 2011-06-22 | 株式会社Sumco | Simox基板の製造方法 |
JP5343371B2 (ja) * | 2008-03-05 | 2013-11-13 | 株式会社Sumco | シリコン基板とその製造方法 |
JP2010135538A (ja) * | 2008-12-04 | 2010-06-17 | Sumco Corp | 貼り合わせウェーハの製造方法 |
US8492290B2 (en) * | 2011-06-21 | 2013-07-23 | International Business Machines Corporation | Fabrication of silicon oxide and oxynitride having sub-nanometer thickness |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6472533A (en) * | 1987-09-11 | 1989-03-17 | Nippon Telegraph & Telephone | Manufacture of single crystal semiconductor substrate |
JPH05335301A (ja) * | 1992-06-03 | 1993-12-17 | Oki Electric Ind Co Ltd | シリコン酸化膜の形成方法 |
JPH07193072A (ja) * | 1993-12-27 | 1995-07-28 | Nec Corp | 半導体基板の製造方法 |
JPH1098047A (ja) * | 1996-09-12 | 1998-04-14 | Wacker Siltronic G Fuer Halbleitermaterialien Ag | 低欠陥密度を有するシリコン半導体ウエハの製造方法 |
JPH1140512A (ja) * | 1997-07-22 | 1999-02-12 | Komatsu Denshi Kinzoku Kk | 半導体基板の製造方法 |
JPH11220019A (ja) * | 1998-02-02 | 1999-08-10 | Nippon Steel Corp | Soi基板およびその製造方法 |
JP2001223220A (ja) * | 2000-02-08 | 2001-08-17 | Mitsubishi Materials Silicon Corp | 半導体ウェーハの熱処理方法及び半導体ウェーハ |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01122019A (ja) * | 1987-11-06 | 1989-05-15 | Hitachi Maxell Ltd | 信号入り磁気テープ |
JP3995286B2 (ja) * | 1996-04-26 | 2007-10-24 | Sumco Techxiv株式会社 | Simox基板の製造方法 |
JP3583870B2 (ja) | 1996-08-19 | 2004-11-04 | 新日本製鐵株式会社 | 半導体基板及びその製造方法 |
WO1999039380A1 (fr) * | 1998-02-02 | 1999-08-05 | Nippon Steel Corporation | Substrat soi et procede de fabrication dudit substrat |
EP0996145A3 (en) * | 1998-09-04 | 2000-11-08 | Canon Kabushiki Kaisha | Process for producing semiconductor substrate |
TWI313059B (ja) * | 2000-12-08 | 2009-08-01 | Sony Corporatio | |
US6734762B2 (en) * | 2001-04-09 | 2004-05-11 | Motorola, Inc. | MEMS resonators and method for manufacturing MEMS resonators |
US6632694B2 (en) * | 2001-10-17 | 2003-10-14 | Astralux, Inc. | Double heterojunction light emitting diodes and laser diodes having quantum dot silicon light emitters |
US6927422B2 (en) * | 2002-10-17 | 2005-08-09 | Astralux, Inc. | Double heterojunction light emitting diodes and laser diodes having quantum dot silicon light emitters |
US6927146B2 (en) * | 2003-06-17 | 2005-08-09 | Intel Corporation | Chemical thinning of epitaxial silicon layer over buried oxide |
JP2005340348A (ja) * | 2004-05-25 | 2005-12-08 | Sumco Corp | Simox基板の製造方法及び該方法により得られるsimox基板 |
JP4706199B2 (ja) * | 2004-07-20 | 2011-06-22 | 株式会社Sumco | Simox基板の製造方法 |
JP4815352B2 (ja) * | 2004-09-16 | 2011-11-16 | 株式会社日立国際電気 | 熱処理装置、基板の製造方法、基板処理方法、及び半導体装置の製造方法 |
US20080251879A1 (en) * | 2005-07-11 | 2008-10-16 | Naoshi Adachi | Method for Manufacturing Simox Substrate and Simox Substrate Obtained by this Method |
KR20080036209A (ko) * | 2005-08-26 | 2008-04-25 | 엠이엠씨 일렉트로닉 머티리얼즈, 인크. | 스트레인드 실리콘-온-인슐레이터 구조의 제조 방법 |
JP2007227424A (ja) * | 2006-02-21 | 2007-09-06 | Sumco Corp | Simoxウェーハの製造方法 |
-
2004
- 2004-07-20 JP JP2004211127A patent/JP4706199B2/ja not_active Expired - Fee Related
-
2005
- 2005-07-19 WO PCT/JP2005/013259 patent/WO2006009148A1/ja active Application Filing
- 2005-07-19 US US11/632,875 patent/US7560363B2/en not_active Expired - Fee Related
- 2005-07-19 EP EP05762053A patent/EP1786023B1/en not_active Expired - Fee Related
- 2005-07-19 TW TW094124383A patent/TWI270959B/zh not_active IP Right Cessation
- 2005-07-19 KR KR1020077003782A patent/KR100834231B1/ko not_active IP Right Cessation
- 2005-07-19 CN CNB2005800246636A patent/CN100501922C/zh not_active Expired - Fee Related
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6472533A (en) * | 1987-09-11 | 1989-03-17 | Nippon Telegraph & Telephone | Manufacture of single crystal semiconductor substrate |
JPH05335301A (ja) * | 1992-06-03 | 1993-12-17 | Oki Electric Ind Co Ltd | シリコン酸化膜の形成方法 |
JPH07193072A (ja) * | 1993-12-27 | 1995-07-28 | Nec Corp | 半導体基板の製造方法 |
JPH1098047A (ja) * | 1996-09-12 | 1998-04-14 | Wacker Siltronic G Fuer Halbleitermaterialien Ag | 低欠陥密度を有するシリコン半導体ウエハの製造方法 |
JPH1140512A (ja) * | 1997-07-22 | 1999-02-12 | Komatsu Denshi Kinzoku Kk | 半導体基板の製造方法 |
JPH11220019A (ja) * | 1998-02-02 | 1999-08-10 | Nippon Steel Corp | Soi基板およびその製造方法 |
JP2001223220A (ja) * | 2000-02-08 | 2001-08-17 | Mitsubishi Materials Silicon Corp | 半導体ウェーハの熱処理方法及び半導体ウェーハ |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2010040589A (ja) * | 2008-07-31 | 2010-02-18 | Covalent Materials Corp | シリコンウェーハの製造方法 |
JP2010080582A (ja) * | 2008-09-25 | 2010-04-08 | Covalent Materials Corp | シリコンウェーハの製造方法 |
JP2014168090A (ja) * | 2014-04-24 | 2014-09-11 | Globalwafers Japan Co Ltd | シリコンウェーハの製造方法 |
Also Published As
Publication number | Publication date |
---|---|
WO2006009148A1 (ja) | 2006-01-26 |
TW200608515A (en) | 2006-03-01 |
TWI270959B (en) | 2007-01-11 |
EP1786023A4 (en) | 2008-08-13 |
KR20070032823A (ko) | 2007-03-22 |
EP1786023B1 (en) | 2011-11-16 |
KR100834231B1 (ko) | 2008-05-30 |
US7560363B2 (en) | 2009-07-14 |
CN1989592A (zh) | 2007-06-27 |
EP1786023A1 (en) | 2007-05-16 |
US20080090384A1 (en) | 2008-04-17 |
CN100501922C (zh) | 2009-06-17 |
JP4706199B2 (ja) | 2011-06-22 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP3011178B2 (ja) | 半導体シリコンウェーハ並びにその製造方法と熱処理装置 | |
KR100358638B1 (ko) | 반도체기판 및 그 제조방법 | |
KR102453743B1 (ko) | 고유 게터링 및 게이트 산화물 무결성 수율을 갖도록 규소 웨이퍼들을 처리하는 방법 | |
CN101118845B (zh) | 用于制造键合晶片的方法 | |
JP2006216826A (ja) | Soiウェーハの製造方法 | |
JPWO2004008521A1 (ja) | 高抵抗シリコンウエーハ及びその製造方法 | |
JP2006261632A (ja) | シリコンウェーハの熱処理方法 | |
KR20150118037A (ko) | 실리콘 웨이퍼의 열처리 방법, 및 실리콘 웨이퍼 | |
JP6671436B2 (ja) | 熱処理により不活性な酸素析出核を活性化する高析出密度ウエハの製造 | |
KR100834231B1 (ko) | Simox 기판의 제조 방법 | |
JP2009170656A (ja) | 単結晶シリコンウェーハおよびその製造方法 | |
JP2006351632A (ja) | Simoxウェーハの製造方法およびsimoxウェーハ | |
WO2009031392A1 (ja) | 貼り合わせウェーハの製造方法 | |
JP2007281316A (ja) | Simoxウェーハの製造方法 | |
JP2010027959A (ja) | 高抵抗simoxウェーハの製造方法 | |
JP2010098167A (ja) | 貼り合わせウェーハの製造方法 | |
JP2010056316A (ja) | シリコンウェーハ及びその製造方法 | |
JP2010062291A (ja) | 半導体基板及びその製造方法 | |
KR20160013037A (ko) | 접합 웨이퍼의 제조방법 | |
JP2010027731A (ja) | Simoxウェーハの製造方法及びsimoxウェーハ | |
JP2013157453A (ja) | 半導体素子、及びその形成方法 | |
JP2008159868A (ja) | Simox基板の製造方法 | |
JP2005286282A (ja) | Simox基板の製造方法及び該方法により得られるsimox基板 | |
JPH08203913A (ja) | 半導体ウェーハの熱処理方法 | |
WO2011118205A1 (ja) | Soiウェーハの製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20061101 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20100831 |
|
A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20101101 |
|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20110215 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20110228 |
|
LAPS | Cancellation because of no payment of annual fees |