JP2005327816A - 半導体装置及びその製造方法 - Google Patents
半導体装置及びその製造方法 Download PDFInfo
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- JP2005327816A JP2005327816A JP2004142765A JP2004142765A JP2005327816A JP 2005327816 A JP2005327816 A JP 2005327816A JP 2004142765 A JP2004142765 A JP 2004142765A JP 2004142765 A JP2004142765 A JP 2004142765A JP 2005327816 A JP2005327816 A JP 2005327816A
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- semiconductor device
- columnar electrode
- sealing resin
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- wiring layer
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Abstract
【解決手段】半導体素子22と、この半導体素子22上に配設された配線層24と、この配線層24(電極パッド38)に一端部が接続された柱状電極26Aと、半導体素子22上に形成された封止樹脂28とを有する半導体装置であって、前記柱状電極26Aを封止樹脂28から突出するよう形成し、この柱状電極26Aの封止樹脂28から突出した他端部(先端部36A)に、封止樹脂28の表面から離間するようはんだボール27を配設した構成とする。
【選択図】図3
Description
図1及び図2は、柱状電極を有する従来の半導体装置の一例を示している。図1に示す半導体装置1Aは、半導体素子2Aの回路形成面側にポリイミド等の絶縁膜3が形成されており、この絶縁膜3の上部には配線層4(再配線層)が形成されている。この配線層4は、絶縁膜3に形成された孔を介して半導体素子2Aと電気的に接続されている。
半導体素子と、
前記半導体素子上に配設された配線層と、
該配線層に一端部が接続された柱状電極と、
前記半導体素子上に形成された封止樹脂とを有する半導体装置であって、
前記柱状電極を前記封止樹脂から突出するよう形成し、
該柱状電極の前記封止樹脂から突出した他端部に、前記封止樹脂の表面から離間するよう外部接続部材を配設したことを特徴とするものである。
請求項1記載の半導体装置において、
前記封止樹脂と前記外部接続部材との離間距離が10μm以上80μm以下であることを特徴とするものである。
請求項1または2記載の半導体装置において、
前記柱状電極と前記外部接続部材との間にバリアメタルが設けられていることを特徴とするものである。
請求項1乃至3のいずれか1項に記載の半導体装置において、
前記柱状電極と前記外部接続部材とが接する面積が、前記柱状電極と前記配線層とが接する面積に比べて広い面積となるよう構成されていることを特徴とするものである。
請求項4記載の半導体装置において、
前記柱状電極の面積が、前記配線層から離間するに従い連続的に大きくなるよう構成してもよい。
また、前記柱状電極の面積が、前記配線層から離間するに従い段階的に大きくなるよう構成してもよい。
請求項1乃至3のいずれか1項に記載の半導体装置において、
前記柱状電極の前記封止樹脂の表面から離間した側の端部の直径が、前記配線層と接する部分の直径に比べて大きくなるよう構成されていることを特徴とするものである。
請求項6記載の半導体装置において、
前記柱状電極の直径が、前記配線層から離間するに従い連続的に大きくなるよう構成してもよい。
半導体基板上に配線層を形成する工程と、
該配線層上に柱状電極を形成するための開口部を有するレジストを形成すると共に、該レジストを用いて導電性金属を前記開口部に前記レジストの厚さを超えて形成する工程と、
前記レジストを剥離した後、前記半導体基板上に封止樹脂を形成する工程と、
前記封止樹脂の厚さを薄くする処理を行う工程とを有することを特徴とするものである。
請求項8記載の半導体装置の製造方法において、
前記封止樹脂の厚さを薄くする処理として、アッシングを用いたことを特徴とするものである。
請求項8または9記載の半導体装置の製造方法において、
前記封止樹脂の厚さを薄くする処理を実施した後、前記柱状電極の前記封止樹脂から離間した端部に外部接続部材を形成する工程を実施することを特徴とするものである。
尚、高周波用電極パッド45Aは、通常の電極パッド45と同様に配線層24と一体的に形成されるものであるが、半導体素子22の高周波対応の接続パッドと接続されたものである。
(付記1)
半導体素子と、
前記半導体素子上に配設された配線層と、
該配線層に一端部が接続された柱状電極と、
前記半導体素子上に形成された封止樹脂とを有する半導体装置であって、
前記柱状電極を前記封止樹脂から突出するよう形成し、
該柱状電極の前記封止樹脂から突出した他端部に、前記封止樹脂の表面から離間するよう外部接続部材を配設したことを特徴とする半導体装置。
(付記2)
付記1記載の半導体装置において、
前記封止樹脂と前記外部接続部材との離間距離が10μm以上80μm以下であることを特徴とする半導体装置。
(付記3)
付記1または2記載の半導体装置において、
前記柱状電極と前記外部接続部材との間にバリアメタルが設けられていることを特徴とする半導体装置。
(付記4)
付記1乃至3のいずれかに記載の半導体装置において、
前記柱状電極と前記外部接続部材とが接する面積が、前記柱状電極と前記配線層とが接する面積に比べて広い面積となるよう構成されていることを特徴とする半導体装置。
(付記5)
付記4記載の半導体装置において、
前記柱状電極の面積が、前記配線層から離間するに従い連続的に大きくなるよう構成したことを特徴とする半導体装置。
(付記6)
付記4記載の半導体装置において、
前記柱状電極の面積が、前記配線層から離間するに従い段階的に大きくなるよう構成したことを特徴とする半導体装置。
(付記7)
付記1乃至3のいずれかに記載の半導体装置において、
前記柱状電極の前記封止樹脂の表面から離間した側の端部の直径が、前記配線層と接する部分の直径に比べて大きくなるよう構成されていることを特徴とする半導体装置。
(付記8)
付記7記載の半導体装置において、
前記柱状電極の直径が、前記配線層から離間するに従い連続的に大きくなるよう構成したことを特徴とする半導体装置。
(付記9)
付記7記載の半導体装置において、
前記柱状電極の直径が、前記配線層から離間するに従い段階的に大きくなるよう構成したことを特徴とする半導体装置。
(付記10)
半導体基板上に配線層を形成する工程と、
該配線層上に柱状電極を形成するための開口部を有するレジストを形成すると共に、該レジストを用いて導電性金属を前記開口部に前記レジストの厚さを超えて形成する工程と、
前記レジストを剥離した後、前記半導体基板上に封止樹脂を形成する工程と、
前記封止樹脂の厚さを薄くする処理を行う工程と
を有することを特徴とする半導体装置の製造方法。
(付記11)
付記10記載の半導体装置の製造方法において、
前記封止樹脂の厚さを薄くする処理として、アッシングを用いたことを特徴とする半導体装置の製造方法。
(付記12)
付記10または11記載の半導体装置の製造方法において、
前記封止樹脂の厚さを薄くする処理を実施した後、前記柱状電極の前記封止樹脂から離間した端部に外部接続部材を形成する工程を実施することを特徴とする半導体装置の製造方法。
(付記13)
請求項10乃至12のいずれかに記載の半導体装置の製造方法において、
前記封止樹脂を、トランスファーモールド法を用いて形成したことを特徴とする半導体装置の製造方法。
21 半導体基板
22 半導体素子
23 絶縁膜
24 配線層
25A〜25G 柱状電極
25F,25H 高周波用柱状電極
26 バリアメタル
27 はんだボール
28 封止樹脂
30 実装基板
31 接続電極
33 応力集中部
34 溶剤成分
35A〜35D ポスト部
36A〜36D 先端部
42 配線用レジスト
43 電極用レジスト
44 治具
45,45A 電極パッド
48 開口部
50 開口パターン
53 第2の絶縁膜
Claims (10)
- 半導体素子と、
前記半導体素子上に配設された配線層と、
該配線層に一端部が接続された柱状電極と、
前記半導体素子上に形成された封止樹脂とを有する半導体装置であって、
前記柱状電極を前記封止樹脂から突出するよう形成し、
該柱状電極の前記封止樹脂から突出した他端部に、前記封止樹脂の表面から離間するよう外部接続部材を配設したことを特徴とする半導体装置。 - 請求項1記載の半導体装置において、
前記封止樹脂と前記外部接続部材との離間距離が10μm以上80μm以下であることを特徴とする半導体装置。 - 請求項1または2記載の半導体装置において、
前記柱状電極と前記外部接続部材との間にバリアメタルが設けられていることを特徴とする半導体装置。 - 請求項1乃至3のいずれか1項に記載の半導体装置において、
前記柱状電極と前記外部接続部材とが接する面積が、前記柱状電極と前記配線層とが接する面積に比べて広い面積となるよう構成されていることを特徴とする半導体装置。 - 請求項4記載の半導体装置において、
前記柱状電極の面積が、前記配線層から離間するに従い連続的に大きくなるよう構成したことを特徴とする半導体装置。 - 請求項1乃至3のいずれか1項に記載の半導体装置において、
前記柱状電極の前記封止樹脂の表面から離間した側の端部の直径が、前記配線層と接する部分の直径に比べて大きくなるよう構成されていることを特徴とする半導体装置。 - 請求項6記載の半導体装置において、
前記柱状電極の直径が、前記配線層から離間するに従い連続的に大きくなるよう構成したことを特徴とする半導体装置。 - 半導体基板上に配線層を形成する工程と、
該配線層上に柱状電極を形成するための開口部を有するレジストを形成すると共に、該レジストを用いて導電性金属を前記開口部に前記レジストの厚さを超えて形成する工程と、
前記レジストを剥離した後、前記半導体基板上に封止樹脂を形成する工程と、
前記封止樹脂の厚さを薄くする処理を行う工程と
を有することを特徴とする半導体装置の製造方法。 - 請求項8記載の半導体装置の製造方法において、
前記封止樹脂の厚さを薄くする処理として、アッシングを用いたことを特徴とする半導体装置の製造方法。 - 請求項8または9記載の半導体装置の製造方法において、
前記封止樹脂の厚さを薄くする処理を実施した後、前記柱状電極の前記封止樹脂から離間した端部に外部接続部材を形成する工程を実施することを特徴とする半導体装置の製造方法。
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US7122897B2 (en) | 2006-10-17 |
CN1697148A (zh) | 2005-11-16 |
CN101136344A (zh) | 2008-03-05 |
US7456089B2 (en) | 2008-11-25 |
KR20050108308A (ko) | 2005-11-16 |
TWI238477B (en) | 2005-08-21 |
US20070249093A1 (en) | 2007-10-25 |
TW200537627A (en) | 2005-11-16 |
CN100521125C (zh) | 2009-07-29 |
KR100625632B1 (ko) | 2006-09-20 |
JP4119866B2 (ja) | 2008-07-16 |
US20050253264A1 (en) | 2005-11-17 |
CN100386875C (zh) | 2008-05-07 |
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