JP2001185519A - 半導体装置及びその製造方法 - Google Patents

半導体装置及びその製造方法

Info

Publication number
JP2001185519A
JP2001185519A JP36794299A JP36794299A JP2001185519A JP 2001185519 A JP2001185519 A JP 2001185519A JP 36794299 A JP36794299 A JP 36794299A JP 36794299 A JP36794299 A JP 36794299A JP 2001185519 A JP2001185519 A JP 2001185519A
Authority
JP
Japan
Prior art keywords
semiconductor
support substrate
holes
semiconductor wafer
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP36794299A
Other languages
English (en)
Japanese (ja)
Other versions
JP2001185519A5 (enExample
Inventor
Masaki Nakanishi
正樹 中西
Susumu Tanmachi
進 反町
Kiichi Yamashita
喜市 山下
Koji Yamada
宏治 山田
Kikuo Fukushima
喜久男 福島
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Renesas Eastern Japan Semiconductor Inc
Original Assignee
Hitachi Ltd
Hitachi Tohbu Semiconductor Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Hitachi Tohbu Semiconductor Ltd filed Critical Hitachi Ltd
Priority to JP36794299A priority Critical patent/JP2001185519A/ja
Priority to US09/734,927 priority patent/US6492195B2/en
Publication of JP2001185519A publication Critical patent/JP2001185519A/ja
Publication of JP2001185519A5 publication Critical patent/JP2001185519A5/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76256—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques using silicon etch back techniques, e.g. BESOI, ELTRAN
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    • H01L2221/68368—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used in a transfer process involving at least two transfer steps, i.e. including an intermediate handle substrate
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Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Weting (AREA)
  • Dicing (AREA)
JP36794299A 1999-12-24 1999-12-24 半導体装置及びその製造方法 Pending JP2001185519A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP36794299A JP2001185519A (ja) 1999-12-24 1999-12-24 半導体装置及びその製造方法
US09/734,927 US6492195B2 (en) 1999-12-24 2000-12-13 Method of thinning a semiconductor substrate using a perforated support substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP36794299A JP2001185519A (ja) 1999-12-24 1999-12-24 半導体装置及びその製造方法

Publications (2)

Publication Number Publication Date
JP2001185519A true JP2001185519A (ja) 2001-07-06
JP2001185519A5 JP2001185519A5 (enExample) 2004-10-28

Family

ID=18490589

Family Applications (1)

Application Number Title Priority Date Filing Date
JP36794299A Pending JP2001185519A (ja) 1999-12-24 1999-12-24 半導体装置及びその製造方法

Country Status (2)

Country Link
US (1) US6492195B2 (enExample)
JP (1) JP2001185519A (enExample)

Cited By (24)

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Publication number Priority date Publication date Assignee Title
JP2007067167A (ja) * 2005-08-31 2007-03-15 Tokyo Ohka Kogyo Co Ltd サポートプレート、サポートプレートの剥離装置及び剥離方法
JP2007073929A (ja) * 2006-06-21 2007-03-22 Tokyo Ohka Kogyo Co Ltd 基板の薄板化方法及び回路素子の製造方法
JP2007073798A (ja) * 2005-09-08 2007-03-22 Tokyo Ohka Kogyo Co Ltd 基板の薄板化方法及び回路素子の製造方法
JP2007158124A (ja) * 2005-12-06 2007-06-21 Tokyo Ohka Kogyo Co Ltd サポートプレート及びサポートプレートの貼り合わせ方法
JP2007242812A (ja) * 2006-03-07 2007-09-20 Sanyo Electric Co Ltd 半導体装置の製造方法及び支持テープ
WO2008007455A1 (en) * 2006-07-14 2008-01-17 Tokyo Ohka Kogyo Co., Ltd. Method of wafer thinning and support plate
JP2008041985A (ja) * 2006-08-08 2008-02-21 Tokyo Ohka Kogyo Co Ltd サポートプレート
US7399683B2 (en) 2002-06-18 2008-07-15 Sanyo Electric Co., Ltd. Manufacturing method of semiconductor device
JP2009155652A (ja) * 2002-06-03 2009-07-16 Three M Innovative Properties Co 被研削基材を含む積層体、その製造方法並びに積層体を用いた極薄基材の製造方法及びそのための装置
JP2009177033A (ja) * 2008-01-25 2009-08-06 Furukawa Electric Co Ltd:The 回路素子形成方法
JP2009535664A (ja) * 2006-04-28 2009-10-01 コーニング インコーポレイテッド 可撓性基板のための多孔質加工キャリヤ
US7662670B2 (en) 2002-10-30 2010-02-16 Sanyo Electric Co., Ltd. Manufacturing method of semiconductor device
US7719102B2 (en) 2002-06-18 2010-05-18 Sanyo Electric Co., Ltd. Semiconductor device
US7795115B2 (en) 2005-12-28 2010-09-14 Sanyo Electric Co., Ltd. Method of manufacturing semiconductor device
JP2010267653A (ja) * 2009-05-12 2010-11-25 Disco Abrasive Syst Ltd ウエーハの加工方法
JP2010278235A (ja) * 2009-05-28 2010-12-09 Disco Abrasive Syst Ltd ウエーハの加工方法
US7919875B2 (en) 2003-08-06 2011-04-05 Sanyo Electric Co., Ltd. Semiconductor device with recess portion over pad electrode
JP2011233679A (ja) * 2010-04-27 2011-11-17 Tokyo Ohka Kogyo Co Ltd 剥離方法及び剥離装置
JP2011249589A (ja) * 2010-05-27 2011-12-08 Disco Abrasive Syst Ltd ウエーハの加工方法
US8105856B2 (en) 2002-04-23 2012-01-31 Semiconductor Components Industries, Llc Method of manufacturing semiconductor device with wiring on side surface thereof
US8302651B2 (en) 2010-04-27 2012-11-06 Tokyo Ohka Kogyo Co., Ltd. Stripping device and stripping method
JP2014059527A (ja) * 2012-09-19 2014-04-03 Stanley Electric Co Ltd 光偏向器の製造方法
US9017932B2 (en) 2008-12-19 2015-04-28 Tokyo Ohka Kogyo Co., Ltd. Processed substrate and method for manufacturing same
JP2018511172A (ja) * 2015-03-11 2018-04-19 エンベー ベカルト ソシエテ アノニムＮＶ Ｂｅｋａｅｒｔ ＳＡ 一時的に接着されるウェハ用のキャリア

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US6425971B1 (en) * 2000-05-10 2002-07-30 Silverbrook Research Pty Ltd Method of fabricating devices incorporating microelectromechanical systems using UV curable tapes
JP2002237515A (ja) * 2001-02-07 2002-08-23 Mitsubishi Gas Chem Co Inc 薄葉化半導体基板の剥離装置および剥離法
US6982184B2 (en) * 2001-05-02 2006-01-03 Silverbrook Research Pty Ltd Method of fabricating MEMS devices on a silicon wafer
JP4468609B2 (ja) * 2001-05-21 2010-05-26 株式会社ルネサステクノロジ 半導体装置
FR2828579B1 (fr) * 2001-08-13 2004-01-30 St Microelectronics Sa Procede de manipulation d'une plaquette de silicium mince
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