FR2828579B1 - Procede de manipulation d'une plaquette de silicium mince - Google Patents

Procede de manipulation d'une plaquette de silicium mince

Info

Publication number
FR2828579B1
FR2828579B1 FR0110768A FR0110768A FR2828579B1 FR 2828579 B1 FR2828579 B1 FR 2828579B1 FR 0110768 A FR0110768 A FR 0110768A FR 0110768 A FR0110768 A FR 0110768A FR 2828579 B1 FR2828579 B1 FR 2828579B1
Authority
FR
France
Prior art keywords
handling
silicon wafer
thin silicon
thin
wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0110768A
Other languages
English (en)
Other versions
FR2828579A1 (fr
Inventor
Pascal Gardes
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Priority to FR0110768A priority Critical patent/FR2828579B1/fr
Priority to US10/217,577 priority patent/US6884726B2/en
Publication of FR2828579A1 publication Critical patent/FR2828579A1/fr
Application granted granted Critical
Publication of FR2828579B1 publication Critical patent/FR2828579B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68318—Auxiliary support including means facilitating the separation of a device or wafer from the auxiliary support

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
FR0110768A 2001-08-13 2001-08-13 Procede de manipulation d'une plaquette de silicium mince Expired - Fee Related FR2828579B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR0110768A FR2828579B1 (fr) 2001-08-13 2001-08-13 Procede de manipulation d'une plaquette de silicium mince
US10/217,577 US6884726B2 (en) 2001-08-13 2002-08-13 Method for handling a thin silicon wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0110768A FR2828579B1 (fr) 2001-08-13 2001-08-13 Procede de manipulation d'une plaquette de silicium mince

Publications (2)

Publication Number Publication Date
FR2828579A1 FR2828579A1 (fr) 2003-02-14
FR2828579B1 true FR2828579B1 (fr) 2004-01-30

Family

ID=8866499

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0110768A Expired - Fee Related FR2828579B1 (fr) 2001-08-13 2001-08-13 Procede de manipulation d'une plaquette de silicium mince

Country Status (2)

Country Link
US (1) US6884726B2 (fr)
FR (1) FR2828579B1 (fr)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10330430A1 (de) * 2003-07-04 2005-02-17 Schott Ag Dünnstsubstratträger
FR2871291B1 (fr) * 2004-06-02 2006-12-08 Tracit Technologies Procede de transfert de plaques
EP1605502A1 (fr) * 2004-06-08 2005-12-14 Interuniversitair Microelektronica Centrum Vzw Methode de transfert pour la fabrication de dispostifs electronique
EP1605503A3 (fr) * 2004-06-04 2008-02-27 Interuniversitair Microelektronica Centrum ( Imec) Méthode de transfert pour la fabrication de dispostifs électroniques
US9847243B2 (en) 2009-08-27 2017-12-19 Corning Incorporated Debonding a glass substrate from carrier using ultrasonic wave
US9645205B2 (en) 2012-12-11 2017-05-09 Northrop Grumman Guidance And Electronics Company, Inc. Combined electron paramagnetic resonance (EPR) and nuclear magnetic resonance (NMR) magnetometer system
EP2747130B1 (fr) 2012-12-21 2017-10-11 ams AG Procédé de production d'une connexion de plaquette amovible et assemblage d'une plaquette et d'un support
CN114396420A (zh) * 2022-01-18 2022-04-26 常州时创能源股份有限公司 一种硅块拼接方法

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL7404364A (nl) * 1974-04-01 1975-10-03 Philips Nv Werkwijze en inrichting voor het bewerken van vlakke voorwerpen.
US5071792A (en) * 1990-11-05 1991-12-10 Harris Corporation Process for forming extremely thin integrated circuit dice
FR2684801B1 (fr) 1991-12-06 1997-01-24 Picogiga Sa Procede de realisation de composants semiconducteurs, notamment sur gaas ou inp, avec recuperation du substrat par voie chimique.
US5827751A (en) 1991-12-06 1998-10-27 Picogiga Societe Anonyme Method of making semiconductor components, in particular on GaAs of InP, with the substrate being recovered chemically
US5336930A (en) * 1992-06-26 1994-08-09 The United States Of America As Represented By The Secretary Of The Air Force Backside support for thin wafers
US5382541A (en) * 1992-08-26 1995-01-17 Harris Corporation Method for forming recessed oxide isolation containing deep and shallow trenches
JPH06236975A (ja) * 1993-02-08 1994-08-23 Sony Corp 半導体装置用多層構造基板及び半導体素子の作製方法
FR2715503B1 (fr) * 1994-01-26 1996-04-05 Commissariat Energie Atomique Substrat pour composants intégrés comportant une couche mince et son procédé de réalisation.
US5681775A (en) * 1995-11-15 1997-10-28 International Business Machines Corporation Soi fabrication process
US5882532A (en) * 1996-05-31 1999-03-16 Hewlett-Packard Company Fabrication of single-crystal silicon structures using sacrificial-layer wafer bonding
DE19648501A1 (de) * 1996-11-22 1998-05-28 Max Planck Gesellschaft Verfahren für die lösbare Verbindung und anschließende Trennung reversibel gebondeter und polierter Scheiben sowie eine Waferstruktur und Wafer
JP2001185519A (ja) * 1999-12-24 2001-07-06 Hitachi Ltd 半導体装置及びその製造方法
US6730595B2 (en) * 2000-12-12 2004-05-04 Mitsui Chemicals, Inc. Protecting method for semiconductor wafer and surface protecting adhesive film for semiconductor wafer used in said method
US6566158B2 (en) * 2001-08-17 2003-05-20 Rosemount Aerospace Inc. Method of preparing a semiconductor using ion implantation in a SiC layer

Also Published As

Publication number Publication date
US6884726B2 (en) 2005-04-26
FR2828579A1 (fr) 2003-02-14
US20030032294A1 (en) 2003-02-13

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Legal Events

Date Code Title Description
ST Notification of lapse

Effective date: 20080430