JP2001044294A5 - - Google Patents

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Publication number
JP2001044294A5
JP2001044294A5 JP1999218503A JP21850399A JP2001044294A5 JP 2001044294 A5 JP2001044294 A5 JP 2001044294A5 JP 1999218503 A JP1999218503 A JP 1999218503A JP 21850399 A JP21850399 A JP 21850399A JP 2001044294 A5 JP2001044294 A5 JP 2001044294A5
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JP
Japan
Prior art keywords
gate
oxide film
gate electrode
film
semiconductor substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1999218503A
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English (en)
Japanese (ja)
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JP2001044294A (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP11218503A priority Critical patent/JP2001044294A/ja
Priority claimed from JP11218503A external-priority patent/JP2001044294A/ja
Priority to US09/494,785 priority patent/US6299314B1/en
Priority to KR1020000026893A priority patent/KR100362336B1/ko
Priority to TW089109648A priority patent/TW507329B/zh
Publication of JP2001044294A publication Critical patent/JP2001044294A/ja
Priority to US09/927,635 priority patent/US6468857B2/en
Publication of JP2001044294A5 publication Critical patent/JP2001044294A5/ja
Pending legal-status Critical Current

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JP11218503A 1999-08-02 1999-08-02 半導体装置およびその製造方法 Pending JP2001044294A (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP11218503A JP2001044294A (ja) 1999-08-02 1999-08-02 半導体装置およびその製造方法
US09/494,785 US6299314B1 (en) 1999-08-02 2000-01-31 Semiconductor device with electrical isolation means
KR1020000026893A KR100362336B1 (ko) 1999-08-02 2000-05-19 반도체 장치 및 그 제조 방법
TW089109648A TW507329B (en) 1999-08-02 2000-05-19 Semiconductor device
US09/927,635 US6468857B2 (en) 1999-08-02 2001-08-13 Method for forming a semiconductor device having a plurality of circuits parts

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11218503A JP2001044294A (ja) 1999-08-02 1999-08-02 半導体装置およびその製造方法

Publications (2)

Publication Number Publication Date
JP2001044294A JP2001044294A (ja) 2001-02-16
JP2001044294A5 true JP2001044294A5 (enExample) 2006-08-31

Family

ID=16720957

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11218503A Pending JP2001044294A (ja) 1999-08-02 1999-08-02 半導体装置およびその製造方法

Country Status (4)

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US (2) US6299314B1 (enExample)
JP (1) JP2001044294A (enExample)
KR (1) KR100362336B1 (enExample)
TW (1) TW507329B (enExample)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4618914B2 (ja) * 2001-03-13 2011-01-26 ルネサスエレクトロニクス株式会社 半導体装置
JP4911838B2 (ja) * 2001-07-06 2012-04-04 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
US6524938B1 (en) * 2002-02-13 2003-02-25 Taiwan Semiconductor Manufacturing Company Method for gate formation with improved spacer profile control
JP4094376B2 (ja) * 2002-08-21 2008-06-04 富士通株式会社 半導体装置及びその製造方法
JP4294298B2 (ja) 2002-11-18 2009-07-08 株式会社ルネサステクノロジ 半導体装置の製造方法
JP2005064127A (ja) * 2003-08-08 2005-03-10 Renesas Technology Corp 半導体装置およびその製造方法
US20060108616A1 (en) * 2004-11-22 2006-05-25 Himax Technologies, Inc. High-voltage metal-oxide-semiconductor transistor
US20060157819A1 (en) * 2005-01-20 2006-07-20 Bing-Chang Wu Efuse structure
US20070048076A1 (en) * 2005-08-31 2007-03-01 To Chun Y Fastening system for a ring binder mechanism
US7485934B2 (en) * 2005-10-25 2009-02-03 Taiwan Semiconductor Manufacturing Co., Ltd. Integrated semiconductor structure for SRAM cells
JP2007214538A (ja) * 2006-01-11 2007-08-23 Renesas Technology Corp 半導体装置およびその製造方法
JP2008311457A (ja) * 2007-06-15 2008-12-25 Renesas Technology Corp 半導体装置の製造方法
US20090142915A1 (en) * 2007-12-04 2009-06-04 Weize Xiong Gate structure and method of forming the same
DE102008012858B4 (de) * 2008-03-06 2016-08-04 Infineon Technologies Austria Ag Halbleiterbauelement mit einem das Halbleiterbauelement durchdringenden Isoliergraben und metallischen Bahnen zur galvanisch getrennten Signalübertragung und Verfahren zu dessen Herstellung
JP2010067645A (ja) * 2008-09-08 2010-03-25 Renesas Technology Corp 半導体装置およびその製造方法
JP2012064854A (ja) * 2010-09-17 2012-03-29 Toshiba Corp 半導体装置
KR101797964B1 (ko) * 2010-10-01 2017-11-15 삼성전자주식회사 반도체 장치의 제조 방법 및 그 방법으로 제조된 반도체 장치
JP2013098374A (ja) * 2011-11-01 2013-05-20 Fujitsu Semiconductor Ltd 半導体装置の製造方法
US9748232B2 (en) * 2014-12-31 2017-08-29 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device structure and method for forming the same
KR102320047B1 (ko) 2017-07-05 2021-11-01 삼성전자주식회사 집적회로 소자 및 그 제조 방법
US12142686B2 (en) 2021-05-26 2024-11-12 Globalfoundries U.S. Inc. Field effect transistor
US11764225B2 (en) * 2021-06-10 2023-09-19 Globalfoundries U.S. Inc. Field effect transistor with shallow trench isolation features within source/drain regions
US20230141681A1 (en) * 2021-11-11 2023-05-11 Taiwan Semiconductor Manufacturing Company, Ltd. Cmos image sensors and manufacturing methods thereof

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2982249B2 (ja) * 1990-08-09 1999-11-22 日本電気株式会社 半導体集積回路装置
JPH05102428A (ja) * 1991-10-07 1993-04-23 Sony Corp 半導体メモリ装置及びその製造方法
JPH0923005A (ja) 1995-07-06 1997-01-21 Mitsubishi Electric Corp 半導体装置およびその製造方法
US6917083B1 (en) * 1995-07-27 2005-07-12 Micron Technology, Inc. Local ground and VCC connection in an SRAM cell
JPH0955440A (ja) * 1995-08-17 1997-02-25 Sony Corp 半導体装置及び半導体装置の製造方法
JPH0974143A (ja) * 1995-09-07 1997-03-18 Sony Corp 半導体装置及びその製造方法
JPH09326440A (ja) * 1996-06-04 1997-12-16 Sony Corp 半導体装置の製造方法
JP3781136B2 (ja) 1996-06-17 2006-05-31 富士通株式会社 半導体装置及びその製造方法
US5849621A (en) * 1996-06-19 1998-12-15 Advanced Micro Devices, Inc. Method and structure for isolating semiconductor devices after transistor formation
JPH1012747A (ja) * 1996-06-25 1998-01-16 Sony Corp 半導体装置の製造方法
JPH1056078A (ja) * 1996-08-08 1998-02-24 Fujitsu Ltd 半導体装置
JPH10223770A (ja) * 1997-02-10 1998-08-21 Toshiba Corp 半導体装置及びその製造方法
JP4010425B2 (ja) * 1997-03-19 2007-11-21 富士通株式会社 半導体装置及びその製造方法
US5792684A (en) * 1997-04-21 1998-08-11 Taiwan Semiconductor Manufacturing Company Ltd Process for fabricating MOS memory devices, with a self-aligned contact structure, and MOS logic devices with salicide, both on a single semiconductor chip
JPH1117027A (ja) * 1997-06-19 1999-01-22 Hitachi Ltd 半導体記憶装置及びその製造方法
TW365065B (en) * 1997-07-19 1999-07-21 United Microelectronics Corp Embedded memory structure and manufacturing method thereof
JPH11163281A (ja) * 1997-11-26 1999-06-18 Toshiba Corp 半導体装置の製造方法
US5863820A (en) * 1998-02-02 1999-01-26 Taiwan Semiconductor Manufacturing Company, Ltd. Integration of sac and salicide processes on a chip having embedded memory
JPH11345887A (ja) * 1998-03-31 1999-12-14 Seiko Epson Corp 半導体装置およびその製造方法
US6037222A (en) * 1998-05-22 2000-03-14 Taiwan Semiconductor Manufacturing Company Method for fabricating a dual-gate dielectric module for memory embedded logic using salicide technology and polycide technology

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