IT1252138B - Dispositivo bicmos e metodo di fabbricazione dello stesso - Google Patents
Dispositivo bicmos e metodo di fabbricazione dello stessoInfo
- Publication number
- IT1252138B IT1252138B ITMI913210A ITMI913210A IT1252138B IT 1252138 B IT1252138 B IT 1252138B IT MI913210 A ITMI913210 A IT MI913210A IT MI913210 A ITMI913210 A IT MI913210A IT 1252138 B IT1252138 B IT 1252138B
- Authority
- IT
- Italy
- Prior art keywords
- impurities
- polysilicon layer
- implanted
- bicmos device
- manufacturing
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title abstract 2
- 239000012535 impurity Substances 0.000 abstract 4
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract 4
- 229920005591 polysilicon Polymers 0.000 abstract 4
- 238000000034 method Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
- H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
- H01L27/0623—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with bipolar transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28035—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
- H01L21/28044—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer
- H01L21/28061—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer the conductor comprising a metal or metal silicide formed by deposition, e.g. sputter deposition, i.e. without a silicidation reaction
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8248—Combination of bipolar and field-effect technology
- H01L21/8249—Bipolar and MOS technology
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Chemical & Material Sciences (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Bipolar Transistors (AREA)
- Bipolar Integrated Circuits (AREA)
Abstract
Dispositivo BICMOS e metodo per la sua fabbricazione in cui le porte dei transitor PMOS e NMOS vengono formate mediante costituzione di un primo strato di polisilicio nel quale non sono impiantate impurità e di un secondo strato di polisilicio , in cui sono impiantate impurità, applicato sul primo strato di polisilicio privo di impurità, in maniera tale da impedire che le impurità impiantate nel secondo strato di polisilicio si diffondano nella regione di canale, impedire modifiche della caratteristica di tensione e anche far sì che regioni emettitrici del transitor bipolare PNP verticale e del transitor bipolare NPN si allineino in una piccola area del microcircuito integrato e tale da migliorare l'efficienza del dispositivo ottenendo un'elevata densità unitamente ad un miglioramento della velocità di servizio (Fig. 1)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019910010768A KR930008018B1 (ko) | 1991-06-27 | 1991-06-27 | 바이씨모스장치 및 그 제조방법 |
Publications (3)
Publication Number | Publication Date |
---|---|
ITMI913210A0 ITMI913210A0 (it) | 1991-11-29 |
ITMI913210A1 ITMI913210A1 (it) | 1993-05-29 |
IT1252138B true IT1252138B (it) | 1995-06-05 |
Family
ID=19316394
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ITMI913210A IT1252138B (it) | 1991-06-27 | 1991-11-29 | Dispositivo bicmos e metodo di fabbricazione dello stesso |
Country Status (7)
Country | Link |
---|---|
US (1) | US5192992A (it) |
JP (1) | JPH0521726A (it) |
KR (1) | KR930008018B1 (it) |
DE (1) | DE4139490A1 (it) |
FR (1) | FR2678429A1 (it) |
GB (1) | GB2257296A (it) |
IT (1) | IT1252138B (it) |
Families Citing this family (32)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0549055A3 (en) * | 1991-12-23 | 1996-10-23 | Koninkl Philips Electronics Nv | Method of manufacturing a semiconductor device provided with a field effect transistor, and such a semiconductor device |
JP3175973B2 (ja) * | 1992-04-28 | 2001-06-11 | 株式会社東芝 | 半導体装置およびその製造方法 |
JPH05308128A (ja) * | 1992-04-30 | 1993-11-19 | Fuji Electric Co Ltd | 半導体装置およびその製造方法 |
JP3022689B2 (ja) * | 1992-08-31 | 2000-03-21 | 日本電気株式会社 | バイポーラトランジスタの製造方法 |
JP2886420B2 (ja) * | 1992-10-23 | 1999-04-26 | 三菱電機株式会社 | 半導体装置の製造方法 |
US5488003A (en) * | 1993-03-31 | 1996-01-30 | Intel Corporation | Method of making emitter trench BiCMOS using integrated dual layer emitter mask |
JPH07297400A (ja) * | 1994-03-01 | 1995-11-10 | Hitachi Ltd | 半導体集積回路装置の製造方法およびそれにより得られた半導体集積回路装置 |
DE19523536A1 (de) * | 1994-07-12 | 1996-01-18 | Siemens Ag | Verfahren zur Herstellung von MOS-Transistoren und Bipolartransistoren auf einer Halbleiterscheibe |
JPH08195399A (ja) * | 1994-09-22 | 1996-07-30 | Texas Instr Inc <Ti> | 埋込み層を必要としない絶縁された垂直pnpトランジスタ |
US5683924A (en) * | 1994-10-31 | 1997-11-04 | Sgs-Thomson Microelectronics, Inc. | Method of forming raised source/drain regions in a integrated circuit |
JPH08172100A (ja) * | 1994-12-16 | 1996-07-02 | Mitsubishi Electric Corp | 半導体装置 |
JP3467138B2 (ja) * | 1995-03-07 | 2003-11-17 | 株式会社リコー | 画像形成装置 |
US5783850A (en) * | 1995-04-27 | 1998-07-21 | Taiwan Semiconductor Manufacturing Company | Undoped polysilicon gate process for NMOS ESD protection circuits |
EP0746033A3 (en) * | 1995-06-02 | 1999-06-02 | Texas Instruments Incorporated | Improvements in or relating to semiconductor processing |
US5682055A (en) * | 1995-06-07 | 1997-10-28 | Sgs-Thomson Microelectronics, Inc. | Method of forming planarized structures in an integrated circuit |
US5589414A (en) * | 1995-06-23 | 1996-12-31 | Taiwan Semiconductor Manufacturing Company Ltd. | Method of making mask ROM with two layer gate electrode |
FR2736208B1 (fr) * | 1995-06-30 | 1997-09-19 | Motorola Semiconducteurs | Procede de fabrication de circuits integres |
EP0789401A3 (en) * | 1995-08-25 | 1998-09-16 | Matsushita Electric Industrial Co., Ltd. | LD MOSFET or MOSFET with an integrated circuit containing thereof and manufacturing method |
US6245604B1 (en) * | 1996-01-16 | 2001-06-12 | Micron Technology | Bipolar-CMOS (BiCMOS) process for fabricating integrated circuits |
US5723893A (en) * | 1996-05-28 | 1998-03-03 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method for fabricating double silicide gate electrode structures on CMOS-field effect transistors |
FR2756100B1 (fr) | 1996-11-19 | 1999-02-12 | Sgs Thomson Microelectronics | Transistor bipolaire a emetteur inhomogene dans un circuit integre bicmos |
FR2756103B1 (fr) * | 1996-11-19 | 1999-05-14 | Sgs Thomson Microelectronics | Fabrication de circuits integres bipolaires/cmos et d'un condensateur |
FR2756101B1 (fr) * | 1996-11-19 | 1999-02-12 | Sgs Thomson Microelectronics | Procede de fabrication d'un transistor npn dans une technologie bicmos |
FR2756104B1 (fr) * | 1996-11-19 | 1999-01-29 | Sgs Thomson Microelectronics | Fabrication de circuits integres bipolaires/cmos |
JP3919885B2 (ja) * | 1997-06-18 | 2007-05-30 | 株式会社ルネサステクノロジ | 半導体装置の製造方法 |
JP2982759B2 (ja) * | 1997-08-12 | 1999-11-29 | 日本電気株式会社 | 半導体装置の製造方法 |
US5911104A (en) * | 1998-02-20 | 1999-06-08 | Texas Instruments Incorporated | Integrated circuit combining high frequency bipolar and high power CMOS transistors |
JP2001203288A (ja) * | 2000-01-20 | 2001-07-27 | Mitsubishi Electric Corp | 半導体装置の製造方法 |
KR100431183B1 (ko) * | 2001-12-20 | 2004-05-12 | 삼성전기주식회사 | 바이폴라 트랜지스터와 그 제조방법 |
US7927948B2 (en) | 2005-07-20 | 2011-04-19 | Micron Technology, Inc. | Devices with nanocrystals and methods of formation |
US20090127629A1 (en) * | 2007-11-15 | 2009-05-21 | Zia Alan Shafi | Method of forming npn and pnp bipolar transistors in a CMOS process flow that allows the collectors of the bipolar transistors to be biased differently than the substrate material |
US9245755B2 (en) * | 2013-12-30 | 2016-01-26 | Texas Instruments Incorporated | Deep collector vertical bipolar transistor with enhanced gain |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4249968A (en) * | 1978-12-29 | 1981-02-10 | International Business Machines Corporation | Method of manufacturing a metal-insulator-semiconductor utilizing a multiple stage deposition of polycrystalline layers |
JPS5987851A (ja) * | 1982-11-10 | 1984-05-21 | Matsushita Electric Ind Co Ltd | 半導体集積回路及びその製造方法 |
US4752589A (en) * | 1985-12-17 | 1988-06-21 | Siemens Aktiengesellschaft | Process for the production of bipolar transistors and complementary MOS transistors on a common silicon substrate |
US4737472A (en) * | 1985-12-17 | 1988-04-12 | Siemens Aktiengesellschaft | Process for the simultaneous production of self-aligned bipolar transistors and complementary MOS transistors on a common silicon substrate |
JPS62147033A (ja) * | 1985-12-19 | 1987-07-01 | Toyota Motor Corp | 内燃機関の空燃比制御装置 |
ATE94688T1 (de) * | 1986-07-04 | 1993-10-15 | Siemens Ag | Integrierte bipolar- und komplementaere mostransistoren auf einem gemeinsamen substrat enthaltende schaltung und verfahren zu ihrer herstellung. |
US4734382A (en) * | 1987-02-20 | 1988-03-29 | Fairchild Semiconductor Corporation | BiCMOS process having narrow bipolar emitter and implanted aluminum isolation |
JPS63244667A (ja) * | 1987-03-30 | 1988-10-12 | Mitsubishi Electric Corp | バイポ−ラ集積回路の製造方法 |
EP0325181B1 (en) * | 1988-01-19 | 1995-04-05 | National Semiconductor Corporation | A method of manufacturing a polysilicon emitter and a polysilicon gate using the same etch of polysilicon on a thin gate oxide |
JPH01205459A (ja) * | 1988-02-10 | 1989-08-17 | Nec Corp | バイcmos集積回路とその製造方法 |
JPH07112024B2 (ja) * | 1988-11-10 | 1995-11-29 | 株式会社東芝 | 半導体装置 |
US5047357A (en) * | 1989-02-03 | 1991-09-10 | Texas Instruments Incorporated | Method for forming emitters in a BiCMOS process |
JP2866389B2 (ja) * | 1989-03-20 | 1999-03-08 | 株式会社日立製作所 | 半導体集積回路装置 |
JPH02246264A (ja) * | 1989-03-20 | 1990-10-02 | Hitachi Ltd | 半導体装置およびその製造方法 |
JPH0348457A (ja) * | 1989-04-14 | 1991-03-01 | Toshiba Corp | 半導体装置およびその製造方法 |
US5091760A (en) * | 1989-04-14 | 1992-02-25 | Kabushiki Kaisha Toshiba | Semiconductor device |
EP0409041B1 (en) * | 1989-07-21 | 1995-10-11 | Texas Instruments Incorporated | A method for forming a thick base oxide in a BiCMOS process |
US5102811A (en) * | 1990-03-20 | 1992-04-07 | Texas Instruments Incorporated | High voltage bipolar transistor in BiCMOS |
-
1991
- 1991-06-27 KR KR1019910010768A patent/KR930008018B1/ko not_active IP Right Cessation
- 1991-11-18 US US07/794,739 patent/US5192992A/en not_active Expired - Fee Related
- 1991-11-25 JP JP3309174A patent/JPH0521726A/ja active Pending
- 1991-11-29 DE DE4139490A patent/DE4139490A1/de not_active Ceased
- 1991-11-29 FR FR9114802A patent/FR2678429A1/fr not_active Withdrawn
- 1991-11-29 IT ITMI913210A patent/IT1252138B/it active IP Right Grant
-
1992
- 1992-05-15 GB GB9210392A patent/GB2257296A/en not_active Withdrawn
Also Published As
Publication number | Publication date |
---|---|
KR930001409A (ko) | 1993-01-16 |
US5192992A (en) | 1993-03-09 |
ITMI913210A0 (it) | 1991-11-29 |
FR2678429A1 (fr) | 1992-12-31 |
GB9210392D0 (en) | 1992-07-01 |
JPH0521726A (ja) | 1993-01-29 |
DE4139490A1 (de) | 1993-01-07 |
ITMI913210A1 (it) | 1993-05-29 |
GB2257296A (en) | 1993-01-06 |
KR930008018B1 (ko) | 1993-08-25 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
0001 | Granted | ||
TA | Fee payment date (situation as of event date), data collected since 19931001 |
Effective date: 19971126 |