HK1201985A1 - 半導體器件以及互連基板 - Google Patents

半導體器件以及互連基板

Info

Publication number
HK1201985A1
HK1201985A1 HK15102309.5A HK15102309A HK1201985A1 HK 1201985 A1 HK1201985 A1 HK 1201985A1 HK 15102309 A HK15102309 A HK 15102309A HK 1201985 A1 HK1201985 A1 HK 1201985A1
Authority
HK
Hong Kong
Prior art keywords
semiconductor device
interconnect substrate
interconnect
substrate
semiconductor
Prior art date
Application number
HK15102309.5A
Other languages
English (en)
Inventor
Shuuichi Kariyazaki
Ryuichi Oikawa
Original Assignee
Renesas Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Electronics Corp filed Critical Renesas Electronics Corp
Publication of HK1201985A1 publication Critical patent/HK1201985A1/zh

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Classifications

    • H—ELECTRICITY
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    • H01L23/00—Details of semiconductor or other solid state devices
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5222—Capacitive arrangements or effects of, or between wiring layers
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    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
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    • H01L2924/181—Encapsulation

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
HK15102309.5A 2013-04-09 2015-03-06 半導體器件以及互連基板 HK1201985A1 (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2013081064A JP6088893B2 (ja) 2013-04-09 2013-04-09 半導体装置及び配線基板

Publications (1)

Publication Number Publication Date
HK1201985A1 true HK1201985A1 (zh) 2015-09-11

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Family Applications (1)

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HK15102309.5A HK1201985A1 (zh) 2013-04-09 2015-03-06 半導體器件以及互連基板

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Country Link
US (2) US9035450B2 (zh)
JP (1) JP6088893B2 (zh)
CN (1) CN104103627B (zh)
HK (1) HK1201985A1 (zh)

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TWI637568B (zh) 2015-01-11 2018-10-01 莫仕有限公司 Circuit board bypass assembly and its components
JP6543129B2 (ja) * 2015-07-29 2019-07-10 ルネサスエレクトロニクス株式会社 電子装置
US10397142B2 (en) * 2015-08-17 2019-08-27 Mediatek Inc. Multi-chip structure having flexible input/output chips
JP6449760B2 (ja) * 2015-12-18 2019-01-09 ルネサスエレクトロニクス株式会社 半導体装置
WO2017111867A1 (en) * 2015-12-23 2017-06-29 Intel Corporation Redundant through-hole interconnect structures
DE112015007234T5 (de) * 2015-12-26 2018-10-04 Intel Corporation Vertikale masseebenenisolierung, masseleiter-koaxialisolierung und impedanzabstimmung von durch gehäusevorrichtungen geführten horizontalen datensignalübertragungsleitungen
DE112015007235T5 (de) * 2015-12-26 2018-10-11 Intel Corporation Vertikale isolation durch erdungsebenen von, koaxiale isolation durch erdungsleitungen und impedanzanpassung von durch gehäusevorrichtungen geleiteten horizontalen datensignalübertragungsleitungen
JP6549327B2 (ja) 2016-01-11 2019-07-24 モレックス エルエルシー ルーティングアセンブリ及びそれを使用するシステム
JP6626213B2 (ja) 2016-01-19 2019-12-25 モレックス エルエルシー 一体型ルーティングアセンブリ及びそれを用いたシステム
JP6553531B2 (ja) * 2016-03-08 2019-07-31 ルネサスエレクトロニクス株式会社 半導体装置
JP6744202B2 (ja) * 2016-12-06 2020-08-19 ルネサスエレクトロニクス株式会社 半導体装置
US10455691B1 (en) 2017-03-28 2019-10-22 Juniper Networks, Inc. Grid array pattern for crosstalk reduction
CN108695583A (zh) * 2017-04-07 2018-10-23 大容科技顾问有限公司 三维互补传导带结构
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