HK1206868A1 - 半導體器件 - Google Patents

半導體器件

Info

Publication number
HK1206868A1
HK1206868A1 HK15107363.7A HK15107363A HK1206868A1 HK 1206868 A1 HK1206868 A1 HK 1206868A1 HK 15107363 A HK15107363 A HK 15107363A HK 1206868 A1 HK1206868 A1 HK 1206868A1
Authority
HK
Hong Kong
Prior art keywords
semiconductor device
semiconductor
Prior art date
Application number
HK15107363.7A
Other languages
English (en)
Inventor
Shintaro Yamamichi
Atsushi Nakamura
Masayuki Ito
Naoto Taoka
Kentaro Mori
Original Assignee
Renesas Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Electronics Corp filed Critical Renesas Electronics Corp
Publication of HK1206868A1 publication Critical patent/HK1206868A1/zh

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    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
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    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
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    • H01L2924/1517Multilayer substrate
    • H01L2924/15182Fan-in arrangement of the internal vias
    • H01L2924/15184Fan-in arrangement of the internal vias in different layers of the multilayer substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
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  • Physics & Mathematics (AREA)
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  • Condensed Matter Physics & Semiconductors (AREA)
  • Ceramic Engineering (AREA)
  • General Engineering & Computer Science (AREA)
  • Geometry (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
HK15107363.7A 2013-12-18 2015-07-31 半導體器件 HK1206868A1 (zh)

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WO2017040967A1 (en) * 2015-09-04 2017-03-09 Octavo Systems Llc Improved system using system in package components
CN106898585A (zh) * 2015-12-21 2017-06-27 中国电力科学研究院 一种利用多芯片封装技术实现的温度采集模块
CN105895541B (zh) * 2016-06-15 2018-10-23 通富微电子股份有限公司 封装结构的形成方法
CN105845672B (zh) * 2016-06-15 2018-10-23 通富微电子股份有限公司 封装结构
US10960583B2 (en) * 2016-07-19 2021-03-30 Asm Technology Singapore Pte Ltd Molding system for applying a uniform clamping pressure onto a substrate
JP6827401B2 (ja) * 2017-10-25 2021-02-10 三菱電機株式会社 パワー半導体モジュールの製造方法およびパワー半導体モジュール
JP2019165046A (ja) * 2018-03-19 2019-09-26 東芝メモリ株式会社 半導体装置およびその製造方法
CN110660805B (zh) * 2018-06-28 2023-06-20 西部数据技术公司 包含分支存储器裸芯模块的堆叠半导体装置
JP7199921B2 (ja) * 2018-11-07 2023-01-06 ローム株式会社 半導体装置
US11302611B2 (en) 2018-11-28 2022-04-12 Texas Instruments Incorporated Semiconductor package with top circuit and an IC with a gap over the IC
JP7487213B2 (ja) 2019-04-15 2024-05-20 長江存儲科技有限責任公司 プロセッサおよびダイナミック・ランダムアクセス・メモリを有する接合半導体デバイスおよびそれを形成する方法
TWI739150B (zh) * 2019-08-30 2021-09-11 南茂科技股份有限公司 微型記憶體封裝結構以及記憶體封裝結構
CN112635476B (zh) 2019-10-12 2023-08-08 长江存储科技有限责任公司 具有氢阻挡层的三维存储设备及其制造方法
CN111584478B (zh) * 2020-05-22 2022-02-18 甬矽电子(宁波)股份有限公司 一种叠层芯片封装结构和叠层芯片封装方法
US11178473B1 (en) * 2020-06-05 2021-11-16 Marvell Asia Pte, Ltd. Co-packaged light engine chiplets on switch substrate
JP2022030232A (ja) 2020-08-06 2022-02-18 キオクシア株式会社 半導体装置
JP2022165097A (ja) * 2021-04-19 2022-10-31 三菱電機株式会社 半導体装置および半導体装置の製造方法
CN117337489A (zh) * 2021-06-15 2024-01-02 华为技术有限公司 三维堆叠封装及三维堆叠封装制造方法

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JP2005260053A (ja) * 2004-03-12 2005-09-22 Nec Electronics Corp 半導体装置及び半導体装置の製造方法
TWI414580B (zh) * 2006-10-31 2013-11-11 Sumitomo Bakelite Co 黏著帶及使用該黏著帶而成之半導體裝置
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