HK1201376A1 - 半導體裝置 - Google Patents
半導體裝置Info
- Publication number
- HK1201376A1 HK1201376A1 HK15101659.3A HK15101659A HK1201376A1 HK 1201376 A1 HK1201376 A1 HK 1201376A1 HK 15101659 A HK15101659 A HK 15101659A HK 1201376 A1 HK1201376 A1 HK 1201376A1
- Authority
- HK
- Hong Kong
- Prior art keywords
- semiconductor device
- semiconductor
- Prior art date
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- H—ELECTRICITY
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- H01L24/42—Wire connectors; Manufacturing methods related thereto
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- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07718—Constructional details, e.g. mounting of circuits in the carrier the record carrier being manufactured in a continuous process, e.g. using endless rolls
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- H01L2224/85438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/85444—Gold (Au) as principal constituent
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
- H01L2224/9222—Sequential connecting processes
- H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
- H01L2224/92247—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
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- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
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- H—ELECTRICITY
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/78—Apparatus for connecting with wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/1015—Shape
- H01L2924/1016—Shape being a cuboid
- H01L2924/10161—Shape being a cuboid with a rectangular active surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/10251—Elemental semiconductors, i.e. Group IV
- H01L2924/10253—Silicon [Si]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
- H01L2924/183—Connection portion, e.g. seal
- H01L2924/18301—Connection portion, e.g. seal being an anchoring portion, i.e. mechanical interlocking between the encapsulation resin and another package part
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Theoretical Computer Science (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Geometry (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Wire Bonding (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2013115580A JP6125332B2 (ja) | 2013-05-31 | 2013-05-31 | 半導体装置 |
Publications (1)
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HK1201376A1 true HK1201376A1 (zh) | 2015-08-28 |
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Family Applications (1)
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HK15101659.3A HK1201376A1 (zh) | 2013-05-31 | 2015-02-13 | 半導體裝置 |
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EP (1) | EP2816590A3 (zh) |
JP (1) | JP6125332B2 (zh) |
KR (1) | KR20140141474A (zh) |
CN (2) | CN104218017B (zh) |
HK (1) | HK1201376A1 (zh) |
TW (1) | TWI611535B (zh) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
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US9362254B1 (en) * | 2015-02-12 | 2016-06-07 | Nanya Technology Corporation | Wire bonding method and chip structure |
JP6125332B2 (ja) * | 2013-05-31 | 2017-05-10 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
JP6279339B2 (ja) * | 2014-02-07 | 2018-02-14 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
DE102015102453A1 (de) * | 2015-02-20 | 2016-08-25 | Heraeus Deutschland GmbH & Co. KG | Bandförmiges Substrat zur Herstellung von Chipkartenmodulen, Chipkartenmodul, elektronische Einrichtung mit einem derartigen Chipkartenmodul und Verfahren zur Herstellung eines Substrates |
US20170039462A1 (en) * | 2015-08-03 | 2017-02-09 | Johnson Electric S.A. | Contact Smart Card and Method of Forming Such |
WO2017094185A1 (ja) | 2015-12-04 | 2017-06-08 | ルネサスエレクトロニクス株式会社 | 半導体チップおよび半導体装置並びに電子装置 |
US9881870B2 (en) | 2015-12-30 | 2018-01-30 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor device and manufacturing method thereof |
CN107025481B (zh) * | 2016-02-02 | 2021-08-20 | 上海伯乐电子有限公司 | 柔性印制电路板及应用其的智能卡模块和智能卡 |
KR102521893B1 (ko) * | 2016-09-23 | 2023-04-14 | 삼성전자주식회사 | 패키지 기판 및 이를 포함하는 반도체 패키지 |
IT201700089965A1 (it) * | 2017-08-03 | 2019-02-03 | St Microelectronics Srl | Procedimento di produzione di componenti elettronici e corrispondente componente elettronico |
JP2019186326A (ja) * | 2018-04-05 | 2019-10-24 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
JP2020101484A (ja) * | 2018-12-25 | 2020-07-02 | セイコーエプソン株式会社 | 慣性センサー、電子機器および移動体 |
TWI785619B (zh) * | 2021-05-21 | 2022-12-01 | 德商Ses Rfid解決方案有限公司 | 晶片封裝結構、用以製造一晶片封裝結構的方法及無線識別標籤 |
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JPH11163204A (ja) | 1997-11-28 | 1999-06-18 | Fujitsu Ltd | 半導体装置及びその実装構造 |
JP3181243B2 (ja) * | 1997-06-25 | 2001-07-03 | 富士通株式会社 | 半導体装置及びその製造方法 |
JP3506002B2 (ja) * | 1997-07-28 | 2004-03-15 | 松下電工株式会社 | プリント配線板の製造方法 |
US6117704A (en) * | 1999-03-31 | 2000-09-12 | Irvine Sensors Corporation | Stackable layers containing encapsulated chips |
US6271057B1 (en) * | 1999-11-19 | 2001-08-07 | Advanced Semiconductor Engineering, Inc. | Method of making semiconductor chip package |
DE10325566A1 (de) * | 2003-06-05 | 2005-01-13 | Infineon Technologies Ag | Chipkartenmodul |
JP4361828B2 (ja) * | 2004-04-30 | 2009-11-11 | 富士通マイクロエレクトロニクス株式会社 | 樹脂封止型半導体装置 |
US20050253245A1 (en) * | 2004-05-12 | 2005-11-17 | Mark Lynch | Package design and method for electrically connecting die to package |
JP4528100B2 (ja) * | 2004-11-25 | 2010-08-18 | 新光電気工業株式会社 | 半導体装置及びその製造方法 |
JP2006156574A (ja) * | 2004-11-26 | 2006-06-15 | Sanyo Electric Co Ltd | 回路装置およびその製造方法 |
JP2007188489A (ja) * | 2005-12-21 | 2007-07-26 | Infineon Technologies Ag | スマートカードモジュール |
FR2895548B1 (fr) | 2005-12-26 | 2008-03-21 | Oberthur Card Syst Sa | Procede de fabrication d'une carte a microcircuit, et carte a microcircuit associee |
JP4503039B2 (ja) | 2006-04-27 | 2010-07-14 | 三洋電機株式会社 | 回路装置 |
JP2008066331A (ja) * | 2006-09-04 | 2008-03-21 | Renesas Technology Corp | 半導体装置の製造方法 |
US7573131B2 (en) * | 2006-10-27 | 2009-08-11 | Compass Technology Co., Ltd. | Die-up integrated circuit package with grounded stiffener |
KR100932680B1 (ko) * | 2007-02-21 | 2009-12-21 | 가부시키가이샤 신가와 | 반도체 장치 및 와이어 본딩 방법 |
KR100891330B1 (ko) * | 2007-02-21 | 2009-03-31 | 삼성전자주식회사 | 반도체 패키지 장치와, 반도체 패키지의 제조방법과,반도체 패키지 장치를 갖는 카드 장치 및 반도체 패키지장치를 갖는 카드 장치의 제조 방법 |
JP2009038145A (ja) | 2007-07-31 | 2009-02-19 | Toshiba Components Co Ltd | リード端子型半導体装置 |
TWI358816B (en) * | 2008-03-19 | 2012-02-21 | Chipmos Technologies Inc | Chip package structure |
JP2010040902A (ja) * | 2008-08-07 | 2010-02-18 | Panasonic Corp | 半導体装置 |
US20100059883A1 (en) * | 2008-09-05 | 2010-03-11 | Freescale Semiconductor, Inc. | Method of forming ball bond |
JP5116643B2 (ja) | 2008-11-27 | 2013-01-09 | 京セラ株式会社 | 発光装置 |
KR101113891B1 (ko) | 2009-10-01 | 2012-02-29 | 삼성테크윈 주식회사 | 리드 프레임 및 리드 프레임 제조 방법 |
JP2011210936A (ja) * | 2010-03-30 | 2011-10-20 | Renesas Electronics Corp | 半導体装置の製造方法および半導体装置 |
TW201209971A (en) * | 2010-08-17 | 2012-03-01 | Powertech Technology Inc | Semiconductor package with bonding wires in window encapsulated by underfill material and method fabricated for the same |
TWI416682B (zh) * | 2010-09-01 | 2013-11-21 | Unimicron Technology Corp | 封裝結構 |
US8991711B2 (en) * | 2012-07-19 | 2015-03-31 | Infineon Technologies Ag | Chip card module |
JP6125332B2 (ja) * | 2013-05-31 | 2017-05-10 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
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2013
- 2013-05-31 JP JP2013115580A patent/JP6125332B2/ja active Active
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2014
- 2014-03-06 TW TW103107631A patent/TWI611535B/zh active
- 2014-05-13 CN CN201410200904.9A patent/CN104218017B/zh active Active
- 2014-05-13 CN CN201420243438.8U patent/CN203983265U/zh not_active Withdrawn - After Issue
- 2014-05-15 US US14/278,300 patent/US9337134B2/en active Active
- 2014-05-26 KR KR20140063244A patent/KR20140141474A/ko not_active Application Discontinuation
- 2014-05-27 EP EP20140169979 patent/EP2816590A3/en not_active Withdrawn
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2015
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2016
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US20140353822A1 (en) | 2014-12-04 |
JP2014236056A (ja) | 2014-12-15 |
US9337134B2 (en) | 2016-05-10 |
US20160293564A1 (en) | 2016-10-06 |
TWI611535B (zh) | 2018-01-11 |
EP2816590A3 (en) | 2015-04-08 |
TW201445690A (zh) | 2014-12-01 |
KR20140141474A (ko) | 2014-12-10 |
CN104218017B (zh) | 2018-12-18 |
CN203983265U (zh) | 2014-12-03 |
CN104218017A (zh) | 2014-12-17 |
US9583455B2 (en) | 2017-02-28 |
JP6125332B2 (ja) | 2017-05-10 |
EP2816590A2 (en) | 2014-12-24 |
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