JP2008066331A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法 Download PDF

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Publication number
JP2008066331A
JP2008066331A JP2006239252A JP2006239252A JP2008066331A JP 2008066331 A JP2008066331 A JP 2008066331A JP 2006239252 A JP2006239252 A JP 2006239252A JP 2006239252 A JP2006239252 A JP 2006239252A JP 2008066331 A JP2008066331 A JP 2008066331A
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Prior art keywords
capillary
wire
bump electrode
semiconductor device
pad
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JP2006239252A
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JP2008066331A5 (ja
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Hideyuki Shinkawa
秀之 新川
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Renesas Technology Corp
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Renesas Technology Corp
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Priority to JP2006239252A priority Critical patent/JP2008066331A/ja
Priority to US11/833,643 priority patent/US20080054052A1/en
Publication of JP2008066331A publication Critical patent/JP2008066331A/ja
Publication of JP2008066331A5 publication Critical patent/JP2008066331A5/ja
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    • BPERFORMING OPERATIONS; TRANSPORTING
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    • B23K20/00Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating
    • B23K20/002Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating specially adapted for particular articles or work
    • B23K20/004Wire welding
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    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K20/00Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating
    • B23K20/10Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating making use of vibrations, e.g. ultrasonic welding
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Abstract

【課題】ワイヤを容易にカットすることができ、適切な形状のバンプ電極を得ることができ、キャピラリからワイヤを容易に引き出すことができる半導体装置の製造方法を得る。
【解決手段】本発明に係る半導体装置の製造方法は、キャピラリに通したワイヤにより、パッド上に、一部がキャピラリ内に食い込んだ状態でバンプ電極を形成する工程と、キャピラリを30μm〜45μmだけ上昇させる工程と、キャピラリを上昇させた後に、キャピラリを35μm〜55μmだけ横方向に移動させてワイヤを細らせる工程と、ワイヤを細らせた後に、キャピラリを上昇させてキャピラリからワイヤを引き出す工程と、キャピラリからワイヤを引き出した後に、クランパでワイヤを挟んで上方向に引っ張ることでワイヤをカットする工程とを有する。
【選択図】図12

Description

本発明は、キャピラリに通したワイヤによりパッド上にバンプ電極を形成する半導体装置の製造方法に関し、特にバンプ電極からのワイヤのカットを容易にし、適切な形状のバンプ電極を得ることができる半導体装置の製造方法に関するものである。
チップ上のAlパッドに直接に金ワイヤをボンディングする場合、キャピラリの荷重が集中してAlパッド下のSiO層間絶縁膜にクラックが入る。このため、チップツーチップ(chip-to-chip)のワイヤボンディングにはバンプ電極が用いられる。また、薄型パッケージでは、金ワイヤの高さを低くするために、バンプ電極を用いた逆ボンディングが行われる。このバンプ電極は、キャピラリに通したワイヤによりパッド上に形成される(例えば、特許文献1〜3参照)。
特開平5−235002号公報 米国特許第5,060,843号明細書 特開2000−106381号公報
従来は、バンプ電極を形成した後、キャピラリにより金ワイヤを押し潰して肉薄化して、クランパで金ワイヤを挟んで引っ張ることで金ワイヤをカットしていた。しかし、バンプ電極は柔らかいため、金ワイヤの押し潰しが不十分となり、金ワイヤを十分に肉薄化することができなかった。これにより、金ワイヤの強度が高くなるため、金ワイヤをカットした際の反動による金ワイヤのヨレや、バンプ電極のAlパッドからの引き剥がしが発生していた。即ち、ワイヤを容易にカットすることができないという問題があった。
また、キャピラリにより金ワイヤを押し潰す際にバンプ電極の上部が凹形状に変形した場合や、金ワイヤをカットした後にバンプ電極にツノが残った場合、逆ボンディングにおけるワイヤのステッチ接合性が不安定となるという問題があった。そして、バンプ電極は、ワイヤボンディングにおいてクッション剤となり、逆ボンディングに用いられるため、ある程度の高さが必要である。さらに、特許文献1の方法では、キャピラリを横方向に移動させることで、ワイヤを細らせ、バンプ電極からのワイヤのカットを容易にしている。しかし、一部がキャピラリ内に食い込んだ状態でバンプ電極を形成する場合は、バンプ電極の一部が削り取られてしまう。即ち、適切な形状のバンプ電極を得ることができないという問題があった。
また、特許文献2の方法では、キャピラリを横方向に移動させる際にワイヤをカットしていた。従って、次のバンプ電極を形成するためのワイヤをキャピラリから引き出すために、複雑な工程が必要であった。即ち、キャピラリからワイヤを容易に引き出すことができないという問題があった。また、特許文献3の方法では、ボンディングの際に、金ボールが塑性変形することによって、キャピラリの貫通孔の内部に入り込んだ状態で、金ワイヤの付け根付近までキャピラリを上昇させてから、水平移動させることによって、ワイヤのネック部分を細らせる工程について開示がある。特許文献3においては、キャピラリの水平移動量について、金ワイヤの直径の3分の2を超える距離だけ移動させると有るが、キャピラリの移動量が不適切な場合、バンプ形状が安定せず、バンプ上にワイヤの一部が残った形状になる場合がある。
本発明は、上述のような課題を解決するためになされたもので、その目的は、ワイヤを容易にカットすることができ、適切な形状のバンプ電極を得ることができ、キャピラリからワイヤを容易に引き出すことができる半導体装置の製造方法を得るものである。
本発明に係る半導体装置の製造方法は、キャピラリに通したワイヤにより、パッド上に、一部がキャピラリ内に食い込んだ状態でバンプ電極を形成する工程と、キャピラリを30μm〜45μmだけ上昇させる工程と、キャピラリを上昇させた後に、キャピラリを35μm〜55μmだけ横方向に移動させてワイヤを細らせる工程と、ワイヤを細らせた後に、キャピラリを上昇させてキャピラリからワイヤを引き出す工程と、キャピラリからワイヤを引き出した後に、クランパでワイヤを挟んで上方向に引っ張ることでワイヤをカットする工程とを有する。本発明のその他の特徴は以下に明らかにする。
本発明により、ワイヤを容易にカットすることができ、適切な形状のバンプ電極を得ることができ、キャピラリからワイヤを容易に引き出すことができる。
実施の形態1.
図1は、本発明の実施の形態1に係る製造方法により製造される半導体装置の一例を示す断面図であり、図2はその上面図である。ガラスエポキシ配線基板11上に、チップ12、スペーサチップ13、チップ14、チップ15が積載されている。また、チップ12,14,15のアルミパッド16上にはバンプ電極17が形成されている。そして、金ワイヤ18が、パッド19にボールボンディングされ、バンプ電極17上にステッチボンディングされている。さらに、全体が封止樹脂20により封止され、ガラスエポキシ配線基板11の底面に半田ボール21が形成されている。
以下、本発明の実施の形態1に係る半導体装置の製造方法について説明する。まず、図3に示すように、キャピラリ22に通した金ワイヤ18の先端をトーチ(不図示)からの放電により溶融することによって、金ワイヤ18よりも直径が大きい金ボール24を形成する。この状態を上方から見ると図4のようになる。ここで、金ワイヤ18の直径は25μm、金ボール24の直径は56μmである。図4におけるキャピラリの形状は、キャピラリの先端面の投影部分として描かれている。すなわち、内側の円はキャピラリの貫通孔の内壁の位置を示し、本実施の形態においては、その直径は42μmである。また、外側の円は、キャピラリの側面との境界部分を指すが、図3もしくは図5に示すとおり、キャピラリの先端面と、側面との境界は、曲面によって構成されている。そこで、チップ15主面に対して、45度以下の角度をなす面が、キャピラリの先端面であり、45度以上の角度をなす面が、キャピラリの側面、もしくは貫通孔内壁であると定義する。本実施の形態においては、キャピラリの先端面の直径は125μmである。
次に、図5に示すように、キャピラリ22によって、金ボール24をチップ15のアルミパッド16上に押圧し、加重30g、熱、超音波などを印可することによって、金ボール24とアルミパッド16の界面を接合する。この状態を上方から見ると図6のようになる。これにより、アルミパッド16上に、一部がキャピラリ22内に食い込んだ状態でバンプ電極17を形成する。ここで、バンプ電極17のキャピラリ22内に食い込んだ部分の高さは35±5μmであり、その幅は、キャピラリ貫通孔の内径と同じ42μmである。また、バンプ電極17のキャピラリ22外にある部分の高さは10μmであり、その幅は70μmである。そして、キャピラリ22先端のテーパー部の幅は56μmである。
次に、図7に示すように、キャピラリ22を30μm〜45μmだけ上昇させる。これにより、キャピラリ22の先端が、バンプ電極17と金ワイヤ18との境目に対して−5μm〜10μmの高さにくる。
次に、キャピラリ22を35μm〜55μm、例えば45μmだけ横方向に移動させて金ワイヤ18を細らせる。ここで、キャピラリ22を35μmだけ横方向に移動させると、図8に示すように、キャピラリ22の内壁が、キャピラリ22の内壁とは反対側にある金ワイヤ18の外壁の位置にくる。この状態を上方から見ると図9のようになる。図9の状態で、金ワイヤ18とバンプ電極17との接合部分は、キャピラリ22先端面の直下に位置する。このように、金ワイヤ18とバンプ電極17との接合部分の全面が、平面図上で、キャピラリ22先端面の直下に位置するように、キャピラリ22を移動させることにより、金ワイヤ18の一部を十分に細くすることができ、金ワイヤ18切断後の、バンプ電極17の形状を安定させることができる。一方、キャピラリ22を55μmだけ横方向に移動させると、図10に示すように、キャピラリ22の内壁と、金ワイヤ18とバンプ電極17の接合部分との水平方向の距離が大きくなる。ここで、キャピラリ22を55μm横方向に移動させた状態では、キャピラリ22の内壁と、金ワイヤ18とバンプ電極17の接合部分との水平距離は、金ワイヤ18の直径である25μmよりも小さくなっている。この状態を上方から見ると図15のようになる。これらの位置の範囲内でキャピラリ22を横方向に移動させることで、金ワイヤ18を切れない程度に細らせることができる。すなわち、キャピラリ22を横方向に移動させた状態で、キャピラリ22の内壁と、金ワイヤ18とバンプ電極17の接合部分との水平距離が、金ワイヤ18の直径よりも大きくなると、金ワイヤ18が切れてしまう場合が発生し、その後のワイヤボンディング工程に悪影響を及ぼす可能性が高くなる。
図12は、キャピラリの上昇量と横移動量に応じバンプ電極の形状を調べた実験結果を示す図である。この結果から、キャピラリの上昇量が30μm〜45μmであり、横移動量が35μm〜55μmの場合に、適切な形状のバンプ電極を得ることができることが分かる。即ち、一部がキャピラリ内に食い込んだ状態でバンプ電極を形成する場合でも、バンプ電極にツノが残らず、ある程度の高さを確保して、適切な形状のバンプ電極を得ることができる。
次に、図13に示すように、金ワイヤ18とバンプ電極17が接続された状態で、キャピラリ22を上昇させることで、キャピラリ22から金ワイヤ18を引き出す。これにより、次のバンプ電極を形成するための金ワイヤ18をキャピラリ22から容易に引き出すことができる。
次に、図14に示すように、キャピラリ22より上の金ワイヤ18をクランパ25で挟んで上方向に引っ張ることで、バンプ電極17の上で金ワイヤ18をカットする。ここで、上記のようにキャピラリ22の上昇及び横移動により金ワイヤ18を細らせているため、金ワイヤ18を容易にカットすることができる。
次に、図3と同様にキャピラリ22から排出した金ワイヤ18の先端に金ボール24を形成し、図15に示すように、キャピラリ22を用いて金ワイヤ18の先端の金ボール24をガラスエポキシ配線基板11のパッド19にボールボンディングする。その後、金ボール24から延びる金ワイヤ18をキャピラリ22から排出して、バンプ電極17上まで伸ばし、キャピラリ22により金ワイヤ18をバンプ電極17に10ms間押圧し、超音波振動をかけて、金ボール24から延びる金ワイヤ18の一部をバンプ電極17上にステッチボンディングする。
次に、図16に示すように、クランパ25で金ワイヤ18を挟んで上方向に引っ張ることで金ワイヤ18をカットする。このようにして、キャピラリ22から排出した金ワイヤ18によって、バンプ電極17とガラスエポキシ配線基板11のパッド19を電気的に接続する。その後、通常の製造工程を経て、図16に示す半導体装置を製造する。
実施の形態2.
以下、本発明の実施の形態2に係る半導体装置の製造方法について説明する。本実施の形態では、図17に示すように、アルミパッド16はチップ14のスペーサチップ13に対するオーバーハング部分に設けられている。この場合、図18に示すように、バンプ電極17の形成時のアルミパッド16に対するキャピラリ22の荷重30gにより、チップ14は下方に撓む。
そこで、アルミパッド16上にバンプ電極17を形成した後であって、図7に示すようにキャピラリ22を上昇させる前に、アルミパッド16に対するキャピラリ22の荷重をバンプ電極17の形成時よりも低く、例えば5g以下にする。そして、そのままキャピラリ22の先端がバンプ電極17に接した状態で5ms以上維持する。ここで、図17に示すように、チップ14のオーバーハング部分の長さが1.2mmで、チップ14の厚さが90μmの場合、チップ14のオーバーハング部分の長さがチップ14の厚さの10倍以上である。この場合は、上記の状態を最低でも10ms以上、好ましくは16ms以上維持する。
上記の工程により、下方に撓んでいたチップ14は上昇して、図19に示すように、チップ14の撓みが解消される。その後に、図7に示すように、キャピラリ22を30μm〜45μmだけ上昇させる。その他の工程は実施の形態1と同様である。これにより、チップのオーバーハング部分にバンプ電極を形成する場合でも、実施の形態1と同様に、バンプ電極にツノが残らず、ある程度の高さを確保して、適切な形状のバンプ電極を得ることができる。
本発明の実施の形態1に係る製造方法により製造される半導体装置の一例を示す断面図である。 本発明の実施の形態1に係る製造方法により製造される半導体装置の一例を示す上面図である。 本発明の実施の形態1に係る半導体装置の製造方法を説明するための側面図である。 図3の状態を上方から見た平面図である。 本発明の実施の形態1に係る半導体装置の製造方法を説明するための側面図である。 図5の状態を上方から見た平面図である。 本発明の実施の形態1に係る半導体装置の製造方法を説明するための側面図である。 本発明の実施の形態1に係る半導体装置の製造方法を説明するための側面図である。 図8の状態を上方から見た平面図である。 本発明の実施の形態1に係る半導体装置の製造方法を説明するための側面図である。 図10の状態を上方から見た平面図である。 キャピラリの上昇量と横移動量に応じバンプ電極の形状を調べた実験結果を示す図である。 本発明の実施の形態1に係る半導体装置の製造方法を説明するための側面図である。 本発明の実施の形態1に係る半導体装置の製造方法を説明するための側面図である。 本発明の実施の形態1に係る半導体装置の製造方法を説明するための側面図である。 本発明の実施の形態1に係る半導体装置の製造方法を説明するための側面図である。 本発明の実施の形態2に係る半導体装置の製造方法を説明するための側面図である。 本発明の実施の形態2に係る半導体装置の製造方法を説明するための側面図である。 本発明の実施の形態2に係る半導体装置の製造方法を説明するための側面図である。
符号の説明
12,14,15 チップ
16 アルミパッド(パッド)
17 バンプ電極
18 金ワイヤ(ワイヤ)
22 キャピラリ
25 クランパ



Claims (5)

  1. キャピラリに通したワイヤにより、パッド上に、一部が前記キャピラリ内に食い込んだ状態でバンプ電極を形成する工程と、
    前記キャピラリを30μm〜45μmだけ上昇させる工程と、
    前記キャピラリを上昇させた後に、前記キャピラリを35μm〜55μmだけ横方向に移動させて前記ワイヤを細らせる工程と、
    前記ワイヤを細らせた後に、前記キャピラリを上昇させて前記キャピラリから前記ワイヤを引き出す工程と、
    前記キャピラリから前記ワイヤを引き出した後に、クランパで前記ワイヤを挟んで上方向に引っ張ることで前記ワイヤをカットする工程とを有することを特徴とする半導体装置の製造方法。
  2. キャピラリに通したワイヤにより、パッド上に、一部が前記キャピラリ内に食い込んだ状態でバンプ電極を形成する工程と、
    前記バンプ電極と前記ワイヤとの境目に対して−5μm〜10μmの高さに前記キャピラリの先端がくるように前記キャピラリを上昇させる工程と、
    前記キャピラリを上昇させた後に、前記キャピラリの内壁が、前記キャピラリの内壁とは反対側にある前記ワイヤの外壁の位置と、前記キャピラリの内壁とは反対側にある前記ワイヤの外壁の位置から更に前記ワイヤの直径だけ進んだ位置までの間にくるように前記キャピラリを横方向に移動させて前記ワイヤを細らせる工程と、
    前記ワイヤを細らせた後に、前記キャピラリを上昇させて前記キャピラリから前記ワイヤを引き出す工程と、
    前記ワイヤを引き出した後に、クランパで前記ワイヤを挟んで上方向に引っ張ることで前記ワイヤをカットする工程とを有することを特徴とする半導体装置の製造方法。
  3. 前記パッドはチップのオーバーハング部分に設けられ、
    前記パッド上に前記バンプ電極を形成した後であって、前記キャピラリを上昇させる前に、前記パッドに対する前記キャピラリの荷重を前記バンプ電極の形成時よりも低くし、前記キャピラリの先端が前記バンプ電極に接した状態で5ms以上維持する工程を更に有することを特徴とする請求項1又は2に記載の半導体装置の製造方法。
  4. 前記パッドはチップのオーバーハング部分に設けられ、
    前記チップのオーバーハング部分の長さは前記チップの厚さの10倍以上であり、
    前記パッド上に前記バンプ電極を形成した後であって、前記キャピラリを上昇させる前に、前記パッドに対する前記キャピラリの荷重を前記バンプ電極の形成時よりも低くし、前記キャピラリの先端が前記バンプ電極に接した状態で10ms以上維持する工程を更に有することを特徴とする請求項1又は2に記載の半導体装置の製造方法。
  5. 前記パッドはチップのオーバーハング部分に設けられ、
    前記チップのオーバーハング部分の長さは前記チップの厚さの10倍以上であり、
    前記パッド上に前記バンプ電極を形成した後であって、前記キャピラリを上昇させる前に、前記パッドに対する前記キャピラリの荷重を前記バンプ電極の形成時よりも低くし、前記キャピラリの先端が前記バンプ電極に接した状態で16ms以上維持する工程を更に有することを特徴とする請求項1又は2に記載の半導体装置の製造方法。

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JP2015142011A (ja) * 2014-01-29 2015-08-03 スタンレー電気株式会社 半導体発光装置およびその製造方法
WO2022269772A1 (ja) * 2021-06-22 2022-12-29 株式会社新川 バンプ形成装置、バンプ形成方法及びバンプ形成プログラム

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